DATASHEET
HDTV CLOCK SYNTHESIZER
Description
The ICS667-01 is a low-cost, low jitter, high-performance
PLL clock synthesizer designed to produce the 74.176 MHz
clock necessary for HDTV systems. Using IDT’s patented
analog Phase-Locked Loop (PLL) techniques, the device
accepts a 27 MHz crystal or clock input. The zero ppm
synthesis error exactly locks the display to the digital
stream.
IDT manufactures the largest variety multimedia clock
synthesizers for all applications. Consult IDT to eliminate
crystals and oscillators from your board.
ICS667-01
Features
•
•
•
•
•
•
•
Packaged in 8-pin SOIC
Pb (lead) free package, RoHS compliant
Input frequency of 27 MHz
Zero ppm synthesis error in output clock
3.3 V ±5% operating supply
Ideal for HDTV applications and oscillator manufacturers
Advanced, low power, sub-micron CMOS process
Block Diagram
VDD
OE
Clock
Synthesis
and Control
Circuitry
27 MHz
crystal or
clock input
ICLK/X1
Clock
Buffer
CLK
74.17582418 MHz
27.0000 MHz
X2
Optional tuning crystal capacitors
2
GND
IDT™ / ICS™
HDTV CLOCK SYNTHESIZER
1
ICS667-01
REV E 051310
ICS667-01
HDTV CLOCK SYNTHESIZER
CLOCK SYNTHESIZER
Pin Assignment
ICLK/X1
VDD
GND
CLK
1
2
3
4
8
7
6
5
X2
27M
OE
GND
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
Pin
Name
ICLK/X1
VDD
GND
CLK
GND
OE
27M
X2
Pin
Type
XI
Power
Power
Output
Power
Input
Output
XO
Connect to +3.3 V.
Connect to ground.
74.17582418 MHz.
Connect to ground.
Pin Description
Crystal connection. Connect to a 27 MHz fundamental crystal or clock.
Output enable. Tri-states CLK output when low. Internal pull-up to VDD.
27 MHz buffered clock or crystal oscillator output.
Crystal connection. Connect to a 27 MHz crystal, or leave unconnected
for clock input.
External Components
Decoupling Capacitor
As with any high performance mixed-signal IC, the
ICS667-01 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01µF must be connected
between VDD and GND on pins 2 and 3. It must be
connected close to the ICS667-01 to minimize lead
inductance. Pin 5 can be connected to pin 3. No external
power supply filtering is required for the ICS667-01.
include pads for small capacitors from X1 to ground and
from X2 to ground. These capacitors are used to adjust the
stray capacitance of the board to match the nominally
required crystal load capacitance. Because load
capacitance can only be increased in this trimming process,
it is important to keep stray capacitance to a minimum by
using very short PCB traces (and no vias) between the
crystal and device. Crystal capacitors, if needed, must be
connected from each of the pins X1 and X2 to ground.
The value (in pF) of these crystal caps should equal (C
L
-16
pF)*2. In this equation, C
L
= crystal load capacitance in pF.
Example: For a crystal with an 18 pF load capacitance, each
crystal capacitor would be 4 pF [(18-16) x 2] = 4.
Series Termination Resistor
A 33Ω terminating resistor can be used next to the clock
outputs for trace lengths over one inch.
Crystal Load Capacitors
The total on-chip capacitance is approximately 18 pF. A
parallel resonant, fundamental mode, AT cut 27 MHz crystal
should be used. The device crystal connections should
IDT™ / ICS™
HDTV CLOCK SYNTHESIZER
2
ICS667-01
REV E 051310
ICS667-01
HDTV CLOCK SYNTHESIZER
CLOCK SYNTHESIZER
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS667-01. These ratings, which are
standard values for IDT commercially rated parts, are stress ratings only. Functional operation of the device at these
or any other conditions above those indicated in the operational sections of the specifications is not implied.
Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical
parameters are guaranteed only over the recommended operating temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Soldering Temperature
7V
Rating
-0.5 V to VDD+0.5 V
0 to +70° C
-65 to +150° C
260° C
Recommended Operation Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Min.
0
+3.150
Typ.
3.3
Max.
+70
+3.465
Units
°
C
V
DC Electrical Characteristics
VDD=3.3 V+ 5%
unless otherwise noted, Ambient temperature 0 to +70° C
Parameter
Operating Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Operating Supply Current
Short Circuit Current
Input Capacitance
Symbol
VDD
V
IH
V
IL
V
OH
V
OL
IDD
Conditions
ICLK, OE
ICLK, OE
I
OH
= -4 mA
I
OL
= 4 mA
No load
Each output
Min.
3.15
2.0
Typ.
3.3
Max.
3.465
0.8
Units
V
V
V
V
V
mA
mA
pF
VDD-0.4
0.4
30
+50
7
C
IN
IDT™ / ICS™
HDTV CLOCK SYNTHESIZER
3
ICS667-01
REV E 051310
ICS667-01
HDTV CLOCK SYNTHESIZER
CLOCK SYNTHESIZER
AC Electrical Characteristics
VDD =3.3V+ 5%, C
L
=15pF
unless otherwise noted, Ambient Temperature 0 to +70° C
Parameter
Input Frequency
Frequency Error, Output Clock
Output Clock Rise Time
Output Clock Fall Time
Output Clock Duty Cycle
Maximum Absolute Jitter, short term
Maximum Absolute Jitter, Long term
term over 1µs
Output Enable Time
Internal Pull-up Resistor
Symbol
F
IN
t
OR
t
OF
t
ja
t
jl
Conditions
Min.
Typ.
27
Max. Units
MHz
0
ppm
ns
ns
%
ps
ps
ns
kΩ
1.5
1.5
0.8 to 2.0 V
2.0 to 8.0 V
at 1.4 V
Deviation from mean
Deviation from mean
OE going from Low to
High
40
50
200
500
20
750
60
R
PUP
OE pin
Thermal Characteristics
Parameter
Thermal Resistance Junction to
Ambient
Symbol
θ
JA
θ
JA
θ
JA
θ
JC
Conditions
Still air
1 m/s air flow
3 m/s air flow
Min.
Typ.
150
140
120
40
Max. Units
°
C/W
°
C/W
°
C/W
°
C/W
Thermal Resistance Junction to Case
Marking Diagram
8
5
667M01LF
######
YYWW$$
1
4
Notes:
1. ###### is the lot number.
2. YYWW is the last two digits of the year and week that the part was assembled.
3. Bottom marking: (origin)
Origin = country of origin if other than USA.
4. “LF” denotes Pb (lead) free package.
IDT™ / ICS™
HDTV CLOCK SYNTHESIZER
4
ICS667-01
REV E 051310
ICS667-01
HDTV CLOCK SYNTHESIZER
CLOCK SYNTHESIZER
Package Outline and Package Dimensions
(8-pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
8
Inches
Min
Max
Symbol
Min
Max
E
INDEX
AREA
H
1 2
D
A
A1
B
C
D
E
e
H
h
L
α
1.35
1.75
0.10
0.25
0.33
0.51
0.19
0.25
4.80
5.00
3.80
4.00
1.27 BASIC
5.80
6.20
0.25
0.50
0.40
1.27
0
°
8
°
.0532
.0688
.0040
.0098
.013
.020
.0075
.0098
.1890
.1968
.1497
.1574
0.050 BASIC
.2284
.2440
.010
.020
.016
.050
0
°
8
°
A
A1
h x 45
C
-C-
e
B
SEATING
PLANE
L
.10 (.004)
C
Ordering Information
Part / Order Number
667M-01LF
667M-01LFT
Marking
see page 5
Shipping Packaging
Tubes
Tape and Reel
Package
8-pin SOIC
8-pin SOIC
Temperature
0 to +70° C
0 to +70° C
"LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes
no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No
other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications
such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT
does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.
IDT™ / ICS™
HDTV CLOCK SYNTHESIZER
5
ICS667-01
REV E 051310
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