Integrated
Circuit
Systems, Inc.
ICS843023I
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-3.3V, 2.5V
LVPECL C
LOCK
G
ENERATOR
F
EATURES
•
1 differential 3.3V LVPECL output
•
Crystal oscillator interface designed for 25MHz,
18pF parallel resonant crystal
•
Output frequency range: 245MHz - 320MHz
•
VCO range: 490MHz - 640MHz
•
RMS phase jitter @ 250MHz, using a 25MHz crystal
(1.875MHz - 20MHz): 0.39ps (typical)
Phase noise:
Offset
Noise Power
100Hz ............... -86.3 dBc/Hz
1kHz .............. -114.6 dBc/Hz
10kHz .............. -125.6 dBc/Hz
100kHz ................ -126 dBc/Hz
•
3.3V or 2.5V operating supply
•
-40°C to 85°C ambient operating temperature
•
Lead-Free package fully RoHS compliant
G
ENERAL
D
ESCRIPTION
The ICS843023I is a Gigabit Ethernet Clock
Generator and a member of the HiPerClocks
TM
HiPerClockS™
family of high performance devices from ICS.
The ICS843023I uses a 25MHz crystal to
synthesize 250MHz. The ICS843023I has
excellent phase jitter performance, over the 1.875MHz – 20MHz
integration range. The ICS843023I is packaged in a small
8-pin TSSOP, making it ideal for use in systems with
limited board space.
ICS
B
LOCK
D
IAGRAM
OE
25MHz
XTAL_IN
P
IN
A
SSIGNMENT
V
CC
XTAL_OUT
XTAL_IN
V
EE
1
2
3
4
8
7
6
5
Q
nQ
V
CC
OE
OSC
XTAL_OUT
Phase
Detector
VCO
÷2
(fixed)
Q
nQ
ICS843023I
÷20
(fixed)
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm package body
G Package
Top View
843023AGI
www.icst.com/products/hiperclocks.html
1
REV. A JUNE 29, 2005
Integrated
Circuit
Systems, Inc.
ICS843023I
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-3.3V, 2.5V
LVPECL C
LOCK
G
ENERATOR
Type
Description
Core supply pin.
Cr ystal oscillator interface. XTAL_IN is the input, XTAL_OUT is the output.
Negative supply pin.
Active high output enable. When logic HIGH, the outputs are enabled and
active. When logic LOW, the outputs are disabled and the device is in
power down mode. LVCMOS/LVTTL interface levels.
Differential clock outputs. LVPECL interface levels.
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1, 6
2, 3
4
5
7, 8
Name
V
CC
XTAL_OUT,
XTAL_IN
V
EE
OE
nQ, Q
Power
Input
Power
Input
Output
Pullup
Pullup
refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
R
PULLUP
Parameter
Input Capacitance
Input Pullup Resistor
Test Conditions
Minimum
Typical
4
51
Maximum
Units
pF
kΩ
843023AGI
www.icst.com/products/hiperclocks.html
2
REV. A JUNE 29, 2005
Integrated
Circuit
Systems, Inc.
ICS843023I
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-3.3V, 2.5V
LVPECL C
LOCK
G
ENERATOR
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
101.7°C/W (0 mps)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
T
ABLE
3A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= -40°C
TO
85°C
Symbol
V
CC
V
CCA
I
EE
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
Maximum
3.465
3.465
75
Units
V
V
mA
T
ABLE
3B. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
V
CC
V
CCA
I
EE
Parameter
Core Supply Voltage
Analog Supply Voltage
Power Supply Current
Test Conditions
Minimum
2.375
2.375
Typical
2.5
2.5
Maximum
2.625
2.625
70
Units
V
V
mA
T
ABLE
3C. LVCMOS/LVTTL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%
OR
2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
V
IH
V
IL
I
IH
I
IL
Parameter
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
OE
OE
Test Conditions
V
CC
= 3.3V
V
CC
= 2.5V
V
CC
= 3.3V
V
CC
= 2.5V
V
CC
= V
IN
= 3.465V or 2.625V
V
CC
= 3.465V or 2.625V, V
IN
= 0V
-150
Minimum
2
1.7
-0.3
-0.3
Typical
Maximum
V
CC
+ 0.3
V
CC
+ 0.3
0.8
0.7
5
Units
V
V
V
V
µA
µA
T
ABLE
3D. LVPECL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%
OR
2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
- 1.4
V
CC
- 2.0
0.6
Typical
Maximum
V
CC
- 0.9
V
CC
- 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50
Ω
to V
CC
- 2V.
www.icst.com/products/hiperclocks.html
3
843023AGI
REV. A JUNE 29, 2005
Integrated
Circuit
Systems, Inc.
ICS843023I
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-3.3V, 2.5V
LVPECL C
LOCK
G
ENERATOR
Test Conditions
Minimum
24.5
Typical
Fundamental
32
50
7
1
MHz
Ω
pF
mW
Maximum
Units
T
ABLE
4. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
Drive Level
T
ABLE
5A. AC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= -40°C
TO
85°C
Symbol
f
OUT
Parameter
Output Frequency
RMS Phase Jitter (Random);
NOTE 1
Output Rise/Fall Time
Test Conditions
250MHz,
Integration Range: 1.875MHz - 20MHz
20% to 80%
Minimum
245
0.39
300
47
600
53
Typical
Maximum
320
Units
MHz
ps
ps
%
t
jit(Ø)
t
R
/ t
F
odc
Output Duty Cycle
NOTE 1: Please refer to the Phase Noise Plot after this section.
T
ABLE
5B. AC C
HARACTERISTICS
,
V
CC
= 2.5V±5%, T
A
= -40°C
TO
85°C
Symbol
f
OUT
Parameter
Output Frequency
RMS Phase Jitter (Random);
NOTE 1
Output Rise/Fall Time
Test Conditions
250MHz,
Integration Range: 1.875MHz - 20MHz
20% to 80%
Minimum
245
0.39
300
47
600
53
Typical
Maximum
320
Units
MHz
ps
ps
%
t
jit(Ø)
t
R
/ t
F
odc
Output Duty Cycle
NOTE 1: Please refer to the Phase Noise Plot after this section.
843023AGI
www.icst.com/products/hiperclocks.html
4
REV. A JUNE 29, 2005
Integrated
Circuit
Systems, Inc.
ICS843023I
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-3.3V, 2.5V
LVPECL C
LOCK
G
ENERATOR
T
YPICAL
P
HASE
N
OISE AT
250MH
Z
(3.3V)
0
-10
-20
-30
-40
-50
➤
Gigabit Ethernet Filter
250MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.39ps (typical)
N
OISE
P
OWER
dBc
Hz
-60
-70
-80
-90
-100
Raw Phase Noise Data
➤
-110
-120
-130
-140
-150
-170
-180
-190
100
1k
10k
➤
-160
Phase Noise Result by adding
Gigabit Ethernet Filter to raw data
100k
1M
10M
100M
500M
O
FFSET
F
REQUENCY
(H
Z
)
T
YPICAL
P
HASE
N
OISE AT
250MH
Z
(2.5V)
0
-20
-30
-40
-50
➤
Gigabit Ethernet Filter
250MHz
RMS Phase Jitter (Random)
1.875MHz to 20MHz = 0.39ps (typical)
-10
N
OISE
P
OWER
dBc
Hz
-60
-70
-80
-90
-100
Raw Phase Noise Data
➤
-110
-120
-130
-140
-150
-160
-170
-180
-190
100
1k
10k
O
FFSET
F
REQUENCY
(H
Z
)
843023AGI
www.icst.com/products/hiperclocks.html
5
➤
Phase Noise Result by adding
Gigabit Ethernet Filter to raw data
100k
1M
10M
100M
500M
REV. A JUNE 29, 2005
