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IDT6116SA55L32B

Standard SRAM, 2KX8, 55ns, CMOS, CQCC32, LCC-32

器件类别:存储    存储   

厂商名称:IDT (Integrated Device Technology)

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器件参数
参数名称
属性值
是否Rohs认证
不符合
零件包装代码
QFJ
包装说明
LCC-32
针数
32
Reach Compliance Code
not_compliant
ECCN代码
3A001.A.2.C
最长访问时间
55 ns
I/O 类型
COMMON
JESD-30 代码
R-CQCC-N32
JESD-609代码
e0
长度
13.97 mm
内存密度
16384 bit
内存集成电路类型
STANDARD SRAM
内存宽度
8
功能数量
1
端口数量
1
端子数量
32
字数
2048 words
字数代码
2000
工作模式
ASYNCHRONOUS
最高工作温度
125 °C
最低工作温度
-55 °C
组织
2KX8
输出特性
3-STATE
可输出
YES
封装主体材料
CERAMIC, METAL-SEALED COFIRED
封装代码
QCCN
封装等效代码
LCC32,.45X.55
封装形状
RECTANGULAR
封装形式
CHIP CARRIER
并行/串行
PARALLEL
电源
5 V
认证状态
Not Qualified
筛选级别
38535Q/M;38534H;883B
座面最大高度
3.048 mm
最大待机电流
0.01 A
最小待机电流
4.5 V
最大压摆率
0.1 mA
最大供电电压 (Vsup)
5.5 V
最小供电电压 (Vsup)
4.5 V
标称供电电压 (Vsup)
5 V
表面贴装
YES
技术
CMOS
温度等级
MILITARY
端子面层
Tin/Lead (Sn/Pb)
端子形式
NO LEAD
端子节距
1.27 mm
端子位置
QUAD
宽度
11.43 mm
Base Number Matches
1
文档预览
CMOS STATIC RAM
16K (2K x 8 BIT)
Integrated Device Technology, Inc.
IDT6116SA
IDT6116LA
FEATURES:
• High-speed access and chip select times
— Military: 20/25/35/45/55/70/90/120/150ns (max.)
— Commercial: 15/20/25/35/45ns (max.)
• Low-power consumption
• Battery backup operation
— 2V data retention voltage (LA version only)
• Produced with advanced CMOS high-performance
technology
• CMOS process virtually eliminates alpha particle
soft-error rates
• Input and output directly TTL-compatible
• Static operation: no clocks or refresh required
• Available in standard 24-pin DIP, 24-pin Thin Dip and
Plastic DIP, 28- and 32-pin LCC, 24-pin SOIC, 24-lead
CERPACK and 24-pin SOJ
• Military product compliant to MIL-STD-833, Class B
DESCRIPTION:
The IDT6116SA/LA is a 16,384-bit high-speed static RAM
organized as 2K x 8. It is fabricated using IDT's high-perfor-
mance, high-reliability CMOS technology.
Access times as fast as 15ns are available. The circuit also
offers a reduced power standby mode. When
CS
goes HIGH,
the circuit will automatically go to, and remain in, a standby
power mode, as long as
CS
remains HIGH. This capability
provides significant system level power and cooling savings.
The low-power (LA) version also offers a battery backup data
retention capability where the circuit typically consumes only
1µW to 4µW operating off a 2V battery.
All inputs and outputs of the IDT6116SA/LA are TTL-
compatible. Fully static asynchronous circuitry is used, requir-
ing no clocks or refreshing for operation.
The IDT6116SA/LA is packaged in 24-pin 600 and 300 mil
plastic or ceramic DIP, 28- and 32-pin leadless chip carriers,
24-lead CERPACK, and a 24-lead gull-wing SOIC, providing
high board-level packing densities.
Military grade product is manufactured in compliance to the
latest version of MIL-STD-883, Class B, making it ideally
suited to military temperature applications demanding the
highest level of performance and reliability.
FUNCTIONAL BLOCK DIAGRAM
A
0
V
CC
ADDRESS
DECODER
A
10
128 X 128
MEMORY
ARRAY
GND
I/O
0
INPUT
DATA
CIRCUIT
I/O
7
I/O CONTROL
CS
OE
WE
CONTROL
CIRCUIT
3089 drw 01
The IDT logo is aregistered trademark of Integrated Device Technology, Inc.
MILITARY AND COMMERCIAL TEMPERATURE RANGES
©1994
Integrated Device Technology, Inc.
MAY 1994
DSC-1120/-
5.4
1
IDT6116SA/ILA
CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
A
7
A
6
A
5
A
4
A
3
A
2
A
1
A
0
I/O
0
I/O
1
I/O
2
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
V
CC
A
8
A
9
WE
OE
PIN DESCRIPTIONS
A
0
–A
13
I/O
0
–I/O
7
CS
WE
OE
Address Inputs
Data Input/Output
Chip Select
Write Enable
Output Enable
Power
Ground
3089 tbl 01
P24-2
P24-1
D24-2
D24-1
SO24-2
E24-1
&
S024-4
A
10
CS
V
CC
GND
I/O
7
I/O
6
I/O
5
I/O
4
I/O
3
3089 drw 02
DIP/SOIC/CERPACK/SOJ
TOP VIEW
INDEX
TRUTH TABLE
(1)
Mode
CS
OE
WE
I/O
High-Z
DATA
OUT
High-Z
DATA
IN
3089 tbl 02
V
CC
A
7
A
8
A
4
A
5
A
9
A
6
Standby
Read
Read
25
24
23
WE
OE
H
L
L
L
X
L
H
X
X
H
H
L
4
A
3
A
2
NC
NC
A
1
A
0
I/O
0
5
6
7
8
9
10
11
3
2
1
28 2
7
2
6
Write
NOTE:
1. H = V
IH
, L = V
IL
, X = Don't Care.
A
10
NC
NC
CS
L28-1
22
21
20
19
CAPACITANCE
(T
A
= +25°C, F = 1.0 MH
Z
)
Symbol
C
IN
C
I/O
Parameter
(1)
Input Capacitance
I/O Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
8
8
Unit
pF
pF
I/O
7
12 13 14 15 16 17 18
GND
I/O
1
I/O
2
I/O
4
I/O
5
I/O
3
I/O
6
3089 drw 03
NOTE:
3089 tbl 03
1. This parameter is determined by device characterization, but is not
production tested.
28-PIN LCC
TOP VIEW
NC
Vcc
NC
NC
A
7
NC
NC
INDEX
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
29
28
27
26
25
24
23
22
21
A
9
A
8
NC
WE
OE
Rating
Commercial
Military
Unit
V
°C
°C
°C
W
mA
A
6
A
5
A
4
A
3
A
2
A
1
A
0
NC
I/O
0
32 31 30
4
3 2
5
1
6
7
8
9
L32-1
10
11
12
13
14 15 16 17 18 19 20
GND
I/O
1
I/O
2
NC
I/O
4
I/O
3
I/O
5
Terminal Voltage
with Respect to GND –0.5 to + 7.0 –0.5 to +7.0
Operating
Temperature
Temperature
Under Bias
Storage
Temperature
Power
Dissipation
DC Output Current
0 to + 70
–55 to +125
T
A
T
BIAS
T
STG
P
T
I
OUT
–55 to + 125 –65 to +135
–55 to + 125 –65 to +150
1.0
50
1.0
50
A
10
CS
I/O
7
I/O
6
3089 drw 04
32-PIN LCC
TOP VIEW
NOTES:
3089 tbl 04
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliability.
2. V
TERM
must not exceed V
CC
+0.5V.
5.4
2
IDT6116SA/LA
CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
RECOMMENDED OPERATING
TEMPERATURE AND SUPPLY VOLTAGE
Grade
Military
Commercial
Ambient
Temperature
–55°C to +125°C
0°C to +70°C
GND
0V
0V
VCC
5.0V
±
10%
5.0V
±
10%
3089 tbl 05
RECOMMENDED DC
OPERATING CONDITIONS
Symbol
V
CC
G
ND
V
IH
V
IL
Parameter
Supply Voltage
Supply Ground
Input High Voltage
Input Low Voltage
Min.
4.5
0
2.2
–0.5
(1)
Typ.
5.0
0
3.5
Max.
5.5
(2)
0
VCC +0.5
0.8
Unit
V
V
V
V
NOTES:
3089 tbl 06
1. V
IL
(min.) = –3.0V for pulse width less than 20ns, once per cycle.
2. V
IN
must not exceed V
CC
+0.5V.
DC ELECTRICAL CHARACTERISTICS
V
CC
= 5.0V
±
10%
Symbol
|I
LI
|
|I
LO
|
V
OL
V
OH
Parameter
Input Leakage Current
Output Leakage Current
Output Low Voltage
Output High Voltage
Test Conditions
MIL.
V
CC
= Max., V
IN
= GND to V
CC
V
CC
= Max.
CS
IDT6116SA
Min.
Max.
2.4
10
5
10
5
0.4
COM'L.
MIL.
COM'L.
IDT6116LA
Min.
Max.
2.4
5
2
5
2
0.4
Unit
µA
µA
V
V
3089 tbl 07
= V
IH
, V
OUT
= GND to V
CC
I
OL
= 8mA, V
CC
= Min.
I
OH
= –4mA, V
CC
= Min.
DC ELECTRICAL CHARACTERISTICS
(1)
V
CC
= 5.0V
±
10%, V
LC
= 0.2V, V
HC
= V
CC
- 0.2V
6116SA15
(2)
6116LA15
(2)
Symbol
I
CC1
Parameter
Operating Power Supply
Current,
CS
V
IL
,
Outputs Open,
V
CC
= Max., f = 0
Dynamic Operating
Current,
CS
V
IL
,
V
CC
= Max.,
Outputs Open, f = f
MAX
(4)
Standby Power Supply
Current (TTL Level)
CS
V
IH
, V
CC
= Max.,
Outputs Open, f = f
MAX
(4)
Full Standby Power
Supply Current
(CMOS Level),
CS
V
HC
,
V
CC
= Max., V
IN
V
HC
or V
IN
V
LC
, f = 0
Power Com'l.
SA
LA
SA
LA
SA
LA
SA
LA
105
95
150
140
40
35
2
0.1
Mil.
6116SA20
6116LA20
Com'l.
105
95
130
120
40
35
2
0.1
Mil.
130
120
150
140
50
45
10
0.9
6116SA25
6116LA25
Com'l.
80
75
120
110
40
35
2
0.1
Mil.
90
85
135
125
45
40
10
0.9
6116SA35
6116LA35
Com'l.
80
75
100
95
25
25
2
0.1
Mil.
90
85
115
105
35
30
10
0.9
mA
mA
mA
Unit
mA
I
CC2
I
SB
I
SB1
NOTES:
1.
All values are maximum guaranteed values.
2. 0°C to + 70°C temperature range only.
3. –55°C to + 125°C temperature range only.
4. f
MAX
= 1/t
RC
, only address inputs are cycling at f
MAX,
f = 0 means address inputs are not changing.
3089 tbl 08
5.4
3
IDT6116SA/ILA
CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS
(1)
(Continued)
V
CC
= 5.0V
±
10%, V
LC
= 0.2V, V
HC
= V
CC
- 0.2V
6116SA45
6116LA45
6116SA55
(3)
6116LA55
(3)
Com'l.
Mil.
6116SA70
(3)
6116LA70
(3)
Com'l.
Mil.
6116SA90
(3)
6116LA90
(3)
Com'l.
Mil.
6116SA120
(3)
6116LA120
(3)
Com'l.
Mil.
6116SA150
(3)
6116LA150
(3)
Com'l.
Mil.
Symbol
I
CC1
Parameter
Operating Power Supply
Current,
CS
V
IL
,
Outputs Open,
V
CC
= Max., f = 0
Dynamic Operating
Current,
CS
V
IL
,
V
CC
= Max.,
Outputs Open, f = f
MAX
(4)
Standby Power Supply
Current (TTL Level)
CS
V
IH
, V
CC
= Max.,
Outputs Open, f = f
MAX
(4)
Full Standby Power
Supply Current
(CMOS Level),
CS
V
HC
,
V
CC
= Max., V
IN
V
HC
or V
IN
V
LC
, f = 0
Power
Com'l. Mil.
SA
LA
SA
LA
SA
LA
SA
LA
80
75
100
90
25
20
2
0.1
90
85
100
95
25
20
10
0.9
Unit
mA
90
85
100
90
25
20
10
0.9
90
85
100
90
25
20
10
0.9
90
85
100
85
25
25
10
0.9
90
85
100
85
25
15
10
0.9
90
85
90
85
25
15
10
0.9
I
CC2
mA
I
SB
mA
I
SB1
mA
NOTES:
1. All values are maximum guaranteed values.
2. 0°C to + 70°C temperature range only.
3. –55°C to + 125°C temperature range only.
4. f
MAX
= 1/t
RC
, only address inouts are toggling at f
MAX
, f = 0 means address inputs are not changing.
3089 tbl 09
DATA RETENTION CHARACTERISTICS OVER ALL TEMPERATURE RANGES
(LA Version Only) V
LC
= 0.2V, V
HC
= V
CC
– 0.2V
Typ.
(1)
V
CC
Symbol
V
DR
I
CCDR
t
CDR
(3)
t
R
(3)
|I
LI
|
Parameter
V
CC
for Data Retention
Data Retention Current
CS
Max.
V
CC
2.0V
200
20
2
3.0V
300
30
2
ns
ns
µA
3089 tbl 10
Test Conditions
MIL.
V
HC
COM'L.
V
IN
V
HC
or
V
LC
Min.
2.0
t
RC
(2)
2.0V
0.5
0.5
0
3.0V
1.5
1.5
Unit
V
µA
Data Deselect to Data
Retention Time
Operation Recovery Time
Input Leakage Current
NOTES:
1. T
A
= + 25°C
2. t
RC
= Read Cycle Time.
3. This parameter is guaranteed by device characterization, but is not production tested.
5.4
4
IDT6116SA/LA
CMOS STATIC RAM 16K (2K x 8-BIT)
MILITARY AND COMMERCIAL TEMPERATURE RANGES
LOW V
CC
DATA RETENTION WAVEFORM
DATA RETENTION MODE
V
CC
t
CDR
V
DR
CS
4.5V
V
DR
2V
4.5V
t
R
V
IH
3089 drw 05
V
IH
AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
GND to 3.0V
5ns
1.5V
1.5V
See Figures 1 and 2
3089 tbl 11
5V
5V
480Ω
DATA
OUT
255Ω
30pF*
DATA
OUT
255Ω
3089 drw 06
480Ω
5pF*
3089 drw 07
Figure 1. AC Test Load
Figure 2. AC Test Load
(for t
OLZ
, t
CLZ
, t
OHZ
,
t
WHZ
, t
CHZ
& t
OW
)
*Including scope and jig.
5.4
5
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