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IDT7200LA15J

1K X 9 OTHER FIFO, 15 ns, PDSO28
1K × 9 其他先进先出, 15 ns, PDSO28

器件类别:存储   

厂商名称:IDT(艾迪悌)

厂商官网:http://www.idt.com/

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器件参数
参数名称
属性值
功能数量
1
端子数量
28
最大工作温度
70 Cel
最小工作温度
0.0 Cel
最大供电/工作电压
5.5 V
最小供电/工作电压
4.5 V
额定供电电压
5 V
最大存取时间
15 ns
加工封装描述
SOIC-28
状态
DISCONTINUED
工艺
CMOS
包装形状
矩形的
包装尺寸
SMALL OUTLINE
表面贴装
Yes
端子形式
GULL WING
端子间距
1.27 mm
端子涂层
锡 铅
端子位置
包装材料
塑料/环氧树脂
温度等级
COMMERCIAL
内存宽度
9
组织
1K × 9
存储密度
9216 deg
操作模式
ASYNCHRONOUS
位数
1024 words
位数
1K
周期
25 ns
内存IC类型
其他先进先出
文档预览
CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9, 1,024 x 9
Integrated Device Technology, Inc.
IDT7200L
IDT7201LA
IDT7202LA
FEATURES:
First-In/First-Out dual-port memory
256 x 9 organization (IDT7200)
512 x 9 organization (IDT7201)
1,024 x 9 organization (IDT7202)
Low power consumption
— Active: 770mW (max.)
—Power-down: 2.75mW (max.)
Ultra high speed—12ns access time
Asynchronous and simultaneous read and write
Fully expandable by both word depth and/or bit width
Pin and functionally compatible with 720X family
Status Flags: Empty, Half-Full, Full
Auto-retransmit capability
High-performance CEMOS™ technology
Military product compliant to MIL-STD-883, Class B
Standard Military Drawing #5962-87531, 5962-89666,
5962-89863 and 5962-89536 are listed on this function
Industrial temperature range (–40°C to +85°C) is
available (plastic packages only)
DESCRIPTION:
The IDT7200/7201/7202 are dual-port memories that load
and empty data on a first-in/first-out basis. The devices use
Full and Empty flags to prevent data overflow and underflow
and expansion logic to allow for unlimited expansion capability
in both word size and depth.
The reads and writes are internally sequential through the
use of ring pointers, with no address information required to
load and unload data. Data is toggled in and out of the devices
through the use of the Write (
W
) and Read (
R
) pins.
The devices utilize a 9-bit wide data array to allow for
control and parity bits at the user’s option. This feature is
especially useful in data communications applications where
it is necessary to use a parity bit for transmission/reception
error checking. It also features a Retransmit (
RT
) capability
that allows for reset of the read pointer to its initial position
when
RT
is pulsed low to allow for retransmission from the
beginning of data. A Half-Full Flag is available in the single
device mode and width expansion modes.
These FIFOs are fabricated using IDT’s high-speed CMOS
technology. They are designed for those applications requir-
ing asynchronous and simultaneous read/writes in multiproc-
essing and rate buffer applications. Military grade product is
manufactured in compliance with the latest revision of MIL-
STD-883, Class B.
FUNCTIONAL BLOCK DIAGRAM
DATA INPUTS
(D
0
–D
8
)
W
WRITE
CONTROL
WRITE
POINTER
RAM
ARRAY
256 x 9
512 x 9
1,024 x 9
READ
POINTER
R
READ
CONTROL
THREE-
STATE
BUFFERS
DATA OUTPUTS
(Q
0
–Q
8
)
RS
RESET
LOGIC
FLAG
LOGIC
EF
FF
XO
/
HF
FL
/
RT
XI
The IDT logo is a trademark of Integrated Device Technology, Inc.
EXPANSION
LOGIC
2679 drw 01
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
©1997
Integrated Device Technology, Inc.
For latest information contact IDT's web site at www.idt.com or fax-on-demand at 408-492-8391.
SEPTEMBER 1997
DSC-2679/7
1
IDT7200/7201A/7202A CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
D
3
D
8
W
D
8
D
3
D
2
D
1
D
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
D
4
D
5
D
6
D
7
D
2
D
1
D
0
5
6
7
8
9
10
11
12
13
14 15 16 17 18 19 20
4 3 2 1 32 31 30
29
28
27
26
25
24
23
22
21
D
6
D
7
NC
FL
/
RT
XI
FF
Q
0
Q
1
Q
2
Q
3
Q
8
GND
FL
/
RT
RS
EF
XO
/
HF
Q
7
Q
6
Q
5
Q
4
XI
FF
Q
0
Q
1
NC
Q
2
D
5
W
INDEX
NC
V
CC
D
4
PIN CONFIGURATIONS
RS
EF
XO
/
HF
Q
7
Q
6
GND
NC
Q
3
Q
8
R
R
2679 drw 02a
Q
4
Q
5
2679 drw 02b
PLASTIC DIP
(1)
PLASTIC THIN DIP
CERDIP
(1)
THIN CERDIP
SOIC
CERPAK
(1)
Reference
Identifier
P28-1
P28-2
D28-1
D28-3
SO28-3
E28-2
Order
Code
P
TP
D
TD
SO
XE
LCC
(1)
PLCC
Reference
Identifier
L32- 1
J32-1
TOP VIEW
Order
Code
L
J
TOP VIEW
NOTE:
1. The 600-mil-wide DIP (P28-1 and D28-1), CERPACK and LCC are not available for the 7200.
ABSOLUTE MAXIMUM RATINGS
Symbol
Rating
V
TERM
Terminal Voltage
with Respect
to GND
T
STG
Storage
Temperature
I
OUT
DC Output
Current
Com’l & Ind'l
–0.5 to +7.0
Mil.
Unit
–0.5 to +7.0 V
RECOMMENDED OPERATING
CONDITIONS
Symbol
V
CCM
V
CCC
GND
V
IH
(1)
V
IH
(1)
V
IL
(2)
Parameter
Military Supply
Voltage
Commercial Supply
Voltage
Supply Voltage
Input High Voltage
Commercial
Input High Voltage
Military
Input Low Voltage
Commercial and
Military
Operating Temperature
Commercial
Operating Temperature
Industrial
Operating Temperature
Military
Min.
4.5
4.5
0
2.0
2.2
Typ.
5.0
5.0
0
Max. Unit
5.5
5.5
0
0.8
V
V
V
V
V
V
–55 to +125
–50 to +50
–65 to +155
–50 to +50
°C
mA
NOTE:
2679 tbl 01
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS
may cause permanent damage to the device. This is a stress rating only
and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not
implied. Exposure to absolute maximum rating conditions for extended
periods may affect reliabilty.
T
A
0
–40
–55
70
85
125
°C
°C
°C
CAPACITANCE
(T
A
= +25°C, f = 1.0 MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output Capacitance
Condition
V
IN
= 0V
V
OUT
= 0V
Max.
8
8
Unit
pF
pF
2679 tbl 02
T
A
T
A
NOTE:
1. This parameter is sampled and not 100% tested.
NOTES:
1. V
IH
= 2.6V for
XI
input (commercial).
V
IH
= 2.8V for
XI
input (military).
2. 1.5V undershoots are allowed for 10ns once per cycle.
2679 tbl 03
2
IDT7200/7201A/7202A CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS
(Commercial: V
CC
= 5V
±
10%, T
A
= 0°C to +70°C; Industrial: V
CC
= 5V
±
10%, T
A
= –40°C to +85°C; Military: V
CC
= 5V
±
10%, T
A
= –55°C to +125°C)
IDT7200L
IDT7201LA
IDT7202LA
Com'l & Ind'l
(1)
t
A
= 12, 15, 20, 25, 35 ns
Symbol
I
LI(2)
I
LO(3)
V
OH
V
OL
I
CC1(4,5,6)
I
CC2(4,6,7)
I
CC3
(L)
(4,6,7)
Parameter
Input Leakage Current (Any Input)
Output Leakage Current
Output Logic “1” Voltage I
OH
= –2mA
Output Logic “0” Voltage I
OL
= 8mA
Active Power Supply Current
Standby Current (
R
=
W
=
RS
=
FL
/
RT
=V
IH
)
Power Down Current
Min.
–1
–10
2.4
Typ.
Max.
1
10
0.4
125
15
0.5
Min.
–10
–10
2.4
IDT7200L
IDT7201LA
IDT7202LA
Military
t
A
= 20, 30, 40 ns
Typ.
Max.
10
10
0.4
140
20
0.9
Unit
µA
µA
V
V
mA
mA
mA
2679 tbl 04
IDT7200L
IDT7201LA
IDT7202LA
Commercial
t
A
= 50 ns
Symbol
I
LI(2)
I
LO(3)
V
OH
V
OL
I
CC1(4,5,6)
I
CC2(4,6,7)
I
CC3
(L)
(4,6,7)
Parameter
Input Leakage Current (Any Input)
Output Leakage Current
Output Logic “1” Voltage I
OH
= –2mA
Output Logic “0” Voltage I
OL
= 8mA
Active Power Supply Current
Standby Current (
R
=
W
=
RS
=
FL
/
RT
=V
IH
)
Power Down Current
Min.
–1
–10
2.4
Typ.
50
5
Max.
1
10
0.4
80
8
0.5
IDT7200L
IDT7201LA
IDT7202LA
Military
t
A
= 50, 65, 80, 120 ns
Min.
–10
–10
2.4
Typ.
70
8
Max.
10
10
0.4
100
15
0.9
Unit
µA
µA
V
V
mA
mA
mA
NOTES:
2679 tbl 05
1. Industrial temperature range product for the 25 ns speed grade is available as a standard device. All other speed grades are available by special order.
2. Measurements with 0.4
V
IN
V
CC
.
3.
R
V
IH
, 0.4
V
OUT
V
CC
.
4. Tested with outputs open (I
OUT
= 0).
5. RCLK and WCLK toggle at 20 MHz and data inputs switch at 10 MHz.
6. I
CC
measurements are made with outputs open.
7. All Inputs = V
CC
- 0.2V or GND + 0.2V, except RCLK and WCLK, which toggle at 20 MHz.
AC TEST CONDITIONS
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
GND to 3.0V
5ns
1.5V
1.5V
See Figure 1
2679 tbl 08
3
IDT7200/7201A/7202A CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS
(1)
(Commercial: V
CC
= 5V
±
10%, T
A
= 0°C to +70°C; Industrial: V
CC
= 5V
±
10%, T
A
= –40°C to +85°C; Military: V
CC
= 5V
±
10%, T
A
= –55°C to +125°C)
Commercial
7200L12 7200L15
7201LA12 7201LA15
7202LA12 7202LA15
Symbol
t
S
t
RC
t
A
t
RR
t
RPW
t
RLZ
t
WLZ
t
DV
t
RHZ
t
WC
t
WPW
t
WR
t
DS
t
DH
t
RSC
t
RS
t
RSS
t
RSR
t
RTC
t
RT
t
RTS
t
RTR
t
EFL
t
RTF
t
REF
t
RFF
t
RPE
t
WEF
t
WFF
t
WHF
t
RHF
t
WPF
t
XOL
t
XOH
t
XI
t
XIR
t
XIS
Parameter
Shift Frequency
Read Cycle Time
Access Time
Read Recovery Time
Read Pulse Width
(3)
Read Pulse Low to Data Bus at Low Z
(4)
Write Pulse High to Data Bus at Low Z
(4,5)
Data Valid from Read Pulse High
Read Pulse High to Data Bus at High Z
(4)
Write Cycle Time
Write Pulse Width
(3)
Write Recovery Time
Data Set-up Time
Data Hold Time
Reset Cycle Time
Reset Pulse Width
(3)
Reset Set-up Time
(4)
Reset Recovery Time
Retransmit Cycle Time
Retransmit Pulse Width
(3)
Retransmit Set-up Time
(4)
Com'l & Mil. Com'l & Ind'l
(2)
7200L20
7201LA20
7202LA20
30
10
20
5
5
5
30
20
10
12
0
30
20
20
10
30
20
20
10
20
20
20
10
10
33.3
20
15
30
30
30
20
20
20
20
30
30
20
20
7200L25
7201LA25
7202LA25
Min.
35
10
25
5
5
5
35
25
10
15
0
35
25
25
10
35
25
25
10
25
25
25
10
10
28.5
25
18
35
35
35
25
25
25
25
35
35
25
25
Military
Com'l
7200L30 7200L35
7201LA30 7201LA35
7202LA30 7202LA35
40
10
30
5
5
5
40
30
10
18
0
40
30
30
10
40
30
30
10
30
30
30
10
10
25
30
20
40
40
40
30
30
30
30
40
40
30
30
45
10
35
5
10
5
45
35
10
18
0
45
35
35
10
45
35
35
10
35
35
35
10
10
22.2 MHz
35
20
45
45
45
30
30
30
30
45
45
35
35
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2679 tbl 06
Min. Max. Min. Max. Min. Max.
20
8
12
3
3
5
20
12
8
9
0
20
12
12
8
20
12
12
8
12
12
12
8
8
50
12
12
12
17
20
12
14
12
14
17
17
12
12
25
10
15
5
5
5
25
15
10
11
0
25
15
15
10
25
15
15
10
15
15
15
10
10
40
15
15
25
25
25
15
15
15
15
25
25
15
15
Max. Min. Max. Min. Max. Unit
Retransmit Recovery Time
Reset to Empty Flag Low
Retransmit Low to Flags Valid
Read Low to Empty Flag Low
Read High to Full Flag High
Read Pulse Width after
EF
High
Write High to Empty Flag High
Write Low to Full Flag Low
Write Low to Half-Full Flag Low
Read High to Half-Full Flag High
Write Pulse Width after
FF
High
Read/Write to
XO
Low
Read/Write to
XO
High
t
HFH,FFH
Reset to Half-Full and Full Flag High
XI
Pulse Width
(3)
XI
Recovery Time
XI
Set-up Time
NOTES:
1. Timings referenced as in AC Test Conditions.
2. Industrial temperature range is available by special order for
speed grades faster than 25ns.
3. Pulse widths less than minimum value are not allowed.
4. Values guaranteed by design, not currently tested.
5. Only applies to read data flow-through mode.
4
IDT7200/7201A/7202A CMOS ASYNCHRONOUS FIFO
256 x 9, 512 x 9 and 1,024 x 9
MILITARY, INDUSTRIAL AND COMMERCIAL TEMPERATURE RANGES
AC ELECTRICAL CHARACTERISTICS
(1)
(Continued)
(Commercial: V
CC
= 5V
±
10%, T
A
= 0°C to +70°C; Industrial: V
CC
= 5V
±
10%, T
A
= –40°C to +85°C; Military: V
CC
= 5V
±
10%, T
A
= –55°C to +125°C)
Military
7200 L40
7201LA40
7202LA40
Symbol
t
S
t
RC
t
A
t
RR
t
RPW
t
RLZ
t
WLZ
t
DV
t
RHZ
t
WC
t
WPW
t
WR
t
DS
t
DH
t
RSC
t
RS
t
RSS
t
RSR
t
RTC
t
RT
t
RTS
t
RTR
t
EFL
t
RTF
t
REF
t
RFF
t
RPE
t
WEF
t
WFF
t
WHF
t
RHF
t
WPF
t
XOL
t
XOH
t
XI
t
XIR
t
XIS
Parameter
Shift Frequency
Read Cycle Time
Access Time
Read Recovery Time
Read Pulse Width
(3)
Read Pulse Low to Data Bus at Low Z
(4)
Write Pulse High to Data Bus at Low Z
(4, 5)
Data Valid from Read Pulse High
Read Pulse High to Data Bus at High Z
(4)
Write Cycle Time
Write Pulse Width
(3)
Write Recovery Time
Data Set-up Time
Data Hold Time
Reset Cycle Time
Reset Pulse Width
(3)
Com'l & Mil.
7200L50
7201LA50
7202LA50
Max.
15
50
30
65
65
65
45
45
45
45
65
65
50
50
65
15
50
10
15
5
65
50
15
30
5
65
50
50
15
65
50
50
15
50
50
50
10
15
7200L65
7201LA65
7202LA65
Min.
80
15
65
10
15
5
80
65
15
30
10
80
65
65
15
80
65
65
15
65
65
65
10
15
Max.
12.5
65
30
80
80
80
60
60
60
60
80
80
65
65
Military
(2)
7200L80
7201LA80
7202LA80
Min.
100
20
80
10
20
5
100
80
20
40
10
100
80
80
20
100
80
80
20
80
80
80
10
15
Max.
10
80
30
100
100
100
60
60
60
60
100
100
80
80
7200L120
7201LA120
7202LA120
Min.
140
20
120
10
20
5
140
120
20
40
10
140
120
120
20
140
120
120
20
120
120
120
10
15
Max.
7
120
35
140
140
140
60
60
60
60
140
140
120
120
Unit
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2679 tbl 07
Min.
50
10
40
5
10
5
50
40
10
20
0
50
40
40
10
50
40
40
10
40
40
40
10
10
Max. Min.
20
40
25
50
50
50
30
35
35
35
50
50
40
40
Reset Set-up Time
(4)
Reset Recovery Time
Retransmit Cycle Time
Retransmit Pulse Width
(3)
Retransmit Set-up Time
(4)
Retransmit Recovery Time
Reset to Empty Flag Low
Retransmit Low to Flags Valid
Read Low to Empty Flag Low
Read High to Full Flag High
Read Pulse Width after
EF
High
Write High to Empty Flag High
Write Low to Full Flag Low
Write Low to Half-Full Flag Low
Read High to Half-Full Flag High
Write Pulse Width after
FF
High
Read/Write to
XO
Low
Read/Write to
XO
High
t
HFH,FFH
Reset to Half-Full and Full Flag High
XI
Pulse Width
(3)
XI
Recovery Time
XI
Set-up Time
NOTES:
1. Timings referenced as in AC Test Conditions
2. Speed grades 65, 80 and 120 not available in the CERPACK
3. Pulse widths less than minimum value are not allowed.
4. Values guaranteed by design, not currently tested.
5. Only applies to read data flow-through mode.
5
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L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ
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