3.3V CMOS
16-BIT BUS TRANSCEIVER/
REGISTERS
Integrated Device Technology, Inc.
IDT74FCT163646/A/C
FEATURES:
• 0.5 MICRON CMOS Technology
•
Typical t
SK
(o) (Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
• Packages include 25 mil pitch SSOP, 19.6 mil pitch
TSSOP and 15.7 mil pitch TVSOP
• Extended commercial range of -40°C to +85°C
• V
CC
= 3.3V
±0.3V,
Normal Range or
V
CC
= 2.7 to 3.6V, Extended Range
• CMOS power levels (0.4µW typ. static)
• Rail-to-Rail output swing for increased noise margin
• Low Ground Bounce (0.3V typ.)
• Inputs (except I/O) can be driven by 3.3V or 5V
components
DESCRIPTION:
The FCT163646/A/C 16-bit registered transceivers are
built using advanced dual metal CMOS technology. These
high-speed, low-power devices are organized as two inde-
pendant 8-bit bus transceivers with 3-state D-type registers.
The control circuitry is organized for multiplexed transmission
of data between A bus and B bus either directly or from the
internal storage registers. Each 8-bit transceiver/register
features direction control (xDIR), over-riding Output Enable
control (x
OE
) and Select lines (xSAB and xSBA) to select
either real-time data or stored data. Separate clock inputs are
provided for A and B port registers. Data on the A or B data
bus, or both, can be stored in the internal registers by the
LOW-to-HIGH transitions at the appropriate clock pins. Flow-
through organization of signal pins simplifies layout. All inputs
are designed with hysteresis for improved noise margin.
The FCT163646/A/C have series current limiting resistors.
This offers low ground bounce, minimal undershoot, and
controlled output fall times-reducing the need for external
series terminating resistors.
FUNCTIONAL BLOCK DIAGRAM
1
OE
1
DIR
1
CLKBA
1
SBA
1
CLKAB
1
SAB
B REG
2
OE
2
DIR
2
CLKBA
2
SBA
2
CLKAB
2
SAB
B REG
D
C
1
A
1
A REG
1
B
1
2
A
1
A REG
D
C
2
B
1
D
C
D
C
TO 7 OTHER CHANNELS
2778 drw 01
TO 7 OTHER CHANNELS
2778 drw 02
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
COMMERCIAL TEMPERATURE RANGES
©1996
Integrated Device Technology, Inc.
AUGUST 1996
8.8
DSC-2778/6
1
IDT74FCT163646/A/C
3.3V 16-BIT BUS TRANSCEIVER/REGISTERS
COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATIONS
1DIR
1
CLKAB
1
SAB
PIN DESCRIPTION
1
OE
1
CLKBA
1
SBA
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
SO56-1 43
SO56-2
SO56-3 42
41
40
39
38
37
36
35
34
33
32
31
30
29
Pin Names
xAx
xBx
xCAB, xCBA
Description
Data Register A Inputs
Data Register B Outputs
Data Register B Inputs
Data Register A Outputs
Clock Pulse Inputs
Output Data Source Select Inputs
Output Enable Inputs
2778 tbl 01
GND
1
A
1
1
A
2
GND
1
B
1
1
B
2
xSAB, xSBA
xDIR, x
OE
V
CC
1
A
3
1
A
4
1
A
5
V
CC
1
B
3
1
B
4
1
B
5
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
V
TERM(3)
V
TERM(4)
T
STG
I
OUT
Description
Terminal Voltage with
Respect to GND
Terminal Voltage with
Respect to GND
Terminal Voltage with
Respect to GND
Storage Temperature
DC Output Current
Max.
–0.5 to +4.6
–0.5 to +7.0
–0.5 to
V
CC
+ 0.5
–65 to +150
–60 to +60
Unit
V
V
V
°C
mA
GND
1
A
6
1
A
7
1
A
8
2
A
1
2
A
2
2
A
3
GND
1
B
6
1
B
7
1
B
8
2
B
1
2
B
2
2
B
3
GND
2
A
4
2
A
5
2
A
6
GND
2
B
4
2
B
5
2
B
6
2778 lnk 03
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RAT-
INGS may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is
not implied. Exposure to absolute maximum rating conditions for ex-
tended periods may affect reliability.
2. Vcc terminals.
3. Input terminals.
4. Output and I/O terminals.
CAPACITANCE
(T
A
= +25°C, f = 1.0MHz)
Symbol
Parameter
(1)
C
IN
Input
Capacitance
C
I/O
I/O
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
3.5
3.5
Max. Unit
6.0
pF
8.0
pF
V
CC
2
A
7
2
A
8
V
CC
2
B
7
2
B
8
2778 lnk 04
NOTE:
1. This parameter is measured at characterization but not tested.
GND
2
SAB
2
CLKAB
2
DIR
GND
2
SBA
2
CLKBA
2
OE
SSOP/
TSSOP/TVSOP
TOP VIEW
2778 drw 03
8.8
2
IDT74FCT163646/A/C
3.3V 16-BIT BUS TRANSCEIVER/REGISTERS
COMMERCIAL TEMPERATURE RANGES
FUNCTION TABLE
(2)
Inputs
x
OE
H
H
L
L
L
L
xDIR
X
X
L
L
H
H
xCLKAB xCLKBA
H or L
↑
X
X
X
H or L
H or L
↑
X
H or L
X
X
xSAB
X
X
X
X
L
H
xSBA
X
X
L
H
X
X
xAx
Input
Output
Input
Data I/O
(1)
xBx
Input
Input
Output
Isolation
Store A and B Data
Real Time B Data to A Bus
Stored B Data to A Bus
Real Time A Data to B Bus
Stored A Data to B Bus
2778 tbl 02
Operation or Function
NOTES:
1. The data output functions may be enabled or disabled by various signals at the x
OE
or xDIR inputs. Data
input functions are always enabled, i.e. data at the bus pins will be stored on every LOW-to-HIGH transition
on the clock inputs.
2. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑
=LOW-to-HIGH Transition
8.8
3
IDT74FCT163646/A/C
3.3V 16-BIT BUS TRANSCEIVER/REGISTERS
COMMERCIAL TEMPERATURE RANGES
BUS
A
BUS
B
BUS
A
BUS
B
2778 drw 05
2778 drw 06
x
DIR
x
OE
x
CLKAB
x
CLKBA
x
SAB
x
SBA
x
DIR
x
OE
x
CLKAB
x
CLKBA
x
SAB
x
SBA
L
L
X
X
X
L
H
L
X
X
L
X
REAL-TIME TRANSFER
BUS B TO A
REAL-TIME TRANSFER
BUS A TO B
BUS
A
BUS
B
BUS
A
BUS
B
2778 drw 07
2778 drw 08
x
DIR
x
OE
x
CLKAB
x
CLKBA
x
SAB
x
SBA
x
DIR
(1)
x
OE
x
CLKAB
x
CLKBA
x
SAB
x
SBA
H
L
X
L
L
H
↑
X
↑
X
↑
↑
X
X
X
X
X
X
L
H
L
L
X
H or L
H or L
X
X
H
H
X
STORAGE FROM
A AND/OR B
TRANSFER STORED
DATA TO A AND/OR B
NOTE:
1. Cannot transfer data to A bus and B bus simultaneously.
8.8
4
IDT74FCT163646/A/C
3.3V 16-BIT BUS TRANSCEIVER/REGISTERS
COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
A
= –40°C to +85°C, V
CC
= 2.7V to 3.6V
Symbol
V
IH
V
IL
I
I H
I
I L
I
OZH
I
OZL
V
IK
I
ODH
I
ODL
V
OH
Parameter
Input HIGH Level (Input pins)
Input HIGH Level (I/O pins)
Input LOW Level
(Input and I/O pins)
Input HIGH Current (Input pins)
Input HIGH Current (I/O pins)
Input LOW Current (Input pins)
Input LOW Current (I/O pins)
High Impedance Output Current
(3-State Output pins)
Clamp Diode Voltage
Output HIGH Current
Output LOW Current
Output HIGH Voltage
V
CC
= Max.
V
CC
= Max.
V
I
= 5.5V
V
I
= V
CC
V
I
= GND
V
I
= GND
V
O
= V
CC
V
O
= GND
V
CC
= Min., I
IN
= –18mA
V
CC
= 3.3V, V
IN
= V
IH
or V
IL,
V
O
= 1.5V
(3)
V
CC
= 3.3V, V
IN
= V
IH
or V
IL,
V
O
= 1.5V
(3)
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
CC
= 3.0V
V
IN
= V
IH
or V
IL
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OH
= –0.1mA
I
OH
= –3mA
I
OH
= –8mA
I
OL
= 0.1mA
I
OL
= 16mA
I
OL
= 24mA
V
CC
= 3.0V
I
OL
= 24mA
V
IN
= V
IH
or V
IL
V
CC
= Max., V
O
= GND
(3)
—
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
Min.
2.0
2.0
–0.5
—
—
—
—
—
—
—
–36
50
V
CC
–
0.2
2.4
2.4
(5)
—
—
—
—
–60
—
—
Typ.
(2)
—
—
—
Max.
5.5
V
CC
+0.5
0.8
Unit
V
V
—
—
—
—
—
—
–
0.7
±
1
±
1
±
1
±
1
±
1
±
1
–
1.2
µ
A
µ
A
V
mA
mA
V
–60
90
—
3.0
3.0
—
0.2
0.3
0.3
–
135
–110
200
—
—
—
0.2
0.4
0.55
0.50
–240
—
V
OL
Output LOW Voltage
V
I
OS
V
H
I
CCL
I
CCH
I
CCZ
Short Circuit Current
(4)
Input Hysteresis
Quiescent Power Supply Current
mA
mV
150
0.1
V
CC
= Max.,
V
IN
= GND or V
CC
10
µ
A
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at Vcc = 3.3V, +25°C ambient.
3. Not more than one output should be tested at one time. Duration of the test should not exceed one second.
4. This parameter is guaranteed but not tested.
5. V
OH
= V
CC
–0.6V at rated current.
2778 lnk 05
8.8
5
