IDT54/74FCT244/A/C
FAST CMOS OCTAL BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
FAST CMOS OCTAL
BUFFER/LINE DRIVER
IDT54/74FCT244/A/C
FEATURES:
−
−
−
−
−
−
−
−
IDT54/74FCT244A equivalent to FAST™ speed and drive
IDT54/74FCT244A 25% faster than FAST
IDT54/74FCT244C up to 55% faster than FAST
I
OL
= 64mA (commercial) and 48mA (military)
CMOS power levels (1mW typ. static)
Military product compliant to MIL-STD-883, Class B
Meets or exceeds JEDEC Standard 18 specifications
Available in the following packages:
•
Commercial: SOIC
•
Military: CERDIP, LCC, CERPACK
DESCRIPTION:
The IDT octal buffer/line drivers are built using an advanced dual metal
CMOS technology. The FCT244 is designed to be employed as a memory and
address driver, clock driver, and bus-oriented transmitter/receiver which
provides improved board density.
FUNCTIONAL BLOCK DIAGRAM
OE
A
1
19
OE
B
DA
0
2
18
OA
0
OB
0
DA
1
3
17
DB
0
4
16
OA
1
DB
1
OB
1
DA
2
5
15
6
14
OA
2
OB
2
7
13
DB
2
DA
3
8
12
OA
3
11
OB
3
9
DB
3
MILITARY AND COMMERCIAL TEMPERATURE RANGES
1
c
1999 Integrated Device Technology, Inc.
JUNE 2000
DSC-5420/-
IDT54/74FCT244/A/C
FAST CMOS OCTAL BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
PIN CONFIGURATION
OE
A
DA
0
OB
0
DA
1
OB
1
DA
2
OB
2
DA
3
OB
3
GND
INDEX
2
3
4
5
6
7
8
9
10
D20-1
SO20-2
E20-1
19
18
17
16
15
14
13
12
11
OE
B
OA
0
DB
0
OA
1
DB
1
OA
2
DB
2
OA
3
DA
1
OB
1
DA
2
OB
2
DA
3
4
5
6
7
8
9
10
11
12
13
L20-2
3
2
1
20
19
18
17
16
15
14
V
CC
1
DA
0
20
OB
0
V
CC
OE
A
OE
B
OA
0
DB
0
OA
1
DB
1
OA
2
OB
3
OA
3
DB
3
DB
3
DIP/ SOIC/ CERPACK
TOP VIEW
LCC
TOP VIEW
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
V
TERM(3)
T
A
T
BIAS
T
STG
P
T
I
OUT
Rating
Terminal Voltage
with Respect to GND
Terminal Voltage
with Respect to GND
Operating Temperature
Temperature Under
Bias
Storage Temperature
Power Dissipation
DC Output Current
Commercial
–0.5 to +7
–0.5 to V
CC
0 to +70
–55 to +125
–55 to +125
0.5
120
Military
–0.5 to +7
–0.5 to V
CC
–55 to +125
–65 to +135
–65 to +150
0.5
120
Unit
V
V
°C
°C
°C
W
mA
8-link
FUNCTION TABLE
(1)
OE
A
L
L
H
Inputs
OE
B
L
L
H
D
L
H
X
Outputs
L
GND
DB
2
H
Z
NOTE:
1. H = High Voltage Level
X = Don't Care
L = Low Voltage Level
Z = HIGH Impedance
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability. No
terminal voltage may exceed V
CC
by +.5V unless otherwise noted.
2. Input and V
CC
terminals only.
3. Outputs and I/O terminals only.
PIN DESCRIPTION
Pin Names
OE
A
,
OE
B
Dxx
Oxx
Description
3–State Output Enable Inputs (Active LOW)
Inputs
Outputs
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
Parameter
(1)
Input Capacitance
Output
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Typ.
6
8
Max.
10
12
Unit
pF
pF
8-link
NOTE:
1. This parameter is measured at characterization but not tested.
c
1998 Integrated Device Technology, Inc.
2
DSC-123456
IDT54/74FCT244/A/C
FAST CMOS OCTAL BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified: V
LC
= 0.2V; V
HC
= V
CC
- 0.2V
Commercial: T
A
= 0°C to +70°C, V
CC
= 5.0V ± 5%; Military: T
A
= –55°C to +125°C, V
CC
= 5.0V ± 10%
Symbol
V
IH
V
IL
I
I H
I
I L
I
OZH
I
OZL
V
IK
I
OS
V
OH
Clamp Diode Voltage
Short Circuit Current
Output HIGH Voltage
V
CC
= Min., I
N
= –18mA
V
CC
= Max.
(3)
, V
O
= GND
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OH
= –32µ A
V
CC
= Min.
V
IN
= V
IH
or V
IL
V
OL
Output LOW Voltage
I
OH
= –300µ A
I
OH
= –12mA MIL.
I
OH
= –15mA COM'L.
V
CC
= 3V, V
IN
= V
LC
or V
HC
, I
OL
= 300µ A
V
CC
= Min.
V
IN
= V
IH
or V
IL
I
OL
= 300µ A
I
OL
= 48mA MIL.
I
OL
= 64mA COM'L.
Parameter
Input HIGH Level
Input LOW Level
Input HIGH Current
Input LOW Current
Off State (High Impedance)
Output Current
V
CC
= Max.
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max.
V
I
= V
CC
V
I
= 2.7V
V
I
= 0.5V
V
I
= GND
V
O
= V
CC
V
O
= 2.7V
V
O
= 0.5V
V
O
= GND
Min.
2
—
—
—
—
—
—
—
—
—
—
–60
V
HC
V
HC
2.4
2.4
—
—
—
—
Typ.
(2)
—
—
—
—
—
—
—
—
—
—
–0.7
–120
V
CC
V
CC
4.3
4.3
GND
GND
0.3
0.3
Max.
—
0.8
5
5
(4)
–5
(4)
–5
10
10
(4)
–10
(4)
–10
–1.2
—
—
—
—
—
V
LC
V
LC(4)
0.55
0.55
8-link
Unit
V
V
µA
µA
V
mA
V
V
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient and maximum loading.
3. Not more than one output should be shorted at one time. Duration of the short circuit test should not exceed one second.
4. This parameter is guaranteed but not tested.
3
IDT54/74FCT244/A/C
FAST CMOS OCTAL BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
POWER SUPPLY CHARACTERISTICS
V
LC
= 0.2V; V
HC
= V
CC
- 0.2V
Symbol
I
CC
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4)
Test Conditions
(1)
V
CC
= Max.
V
IN
≥
V
HC;
V
IN
≤
V
LC
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
OE
A
=
OE
B
= GND
One Input Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
fi = 10MHz
50% Duty Cycle
OE
A
=
OE
B
= GND
One Bit Toggling
V
CC
= Max.
Outputs Open
fi = 2.5MHz
50% Duty Cycle
OE
A
=
OE
B
= GND
Eight Bits Toggling
Min.
—
—
V
IN
≥
V
HC
V
IN
≤
V
LC
—
Typ.
(2)
0.2
0.5
0.15
Max.
1.5
2
0.25
Unit
mA
mA
mA/
MHz
I
C
Total Power Supply Current
(6)
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
V
IN
≥
V
HC
V
IN
≤
V
LC
(FCT)
V
IN
= 3.4V
V
IN
= GND
—
1.7
4
mA
—
—
2
3.2
5
6.5
(5)
—
5.2
14.5
(5)
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type.
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V); all other inputs at V
CC
or GND.
4. This parameter is not directly testable, but is derived for use in Total Power Supply Calculations.
5. Values for these conditions are examples of the I
CC
formula. These limits are guaranteed but not tested.
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
CP
/2 + f
i
N
i
)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
CP
= Clock Frequency for Register Devices (Zero for Non-Register Devices)
f
i
= Input Frequency
N
i
= Number of Inputs at f
i
All currents are in milliamps and all frequencies are in megahertz.
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
54/74FCT244
Com'l.
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
Parameter
Propagation Delay
D
N
to O
N
Output Enable Time
Output Disable Time
Condition
C
L
= 50pF
R
L
= 500Ω
Mil.
54/74FCT244A
Com'l.
Mil.
(1,2)
54/74FCT244C
Com'l.
Mil.
Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Min. Max. Unit
1.5
1.5
1.5
6.5
8
7
1.5
1.5
1.5
7
8.5
7.5
1.5
1.5
1.5
4.8
6.2
5.6
1.5
1.5
1.5
5.1
6.5
5.9
1.5
1.5
1.5
4.1
5.8
5.2
1.5
1.5
1.5
4.6
6.5
5.7
ns
ns
ns
NOTES:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
4
IDT54/74FCT244/A/C
FAST CMOS OCTAL BUFFER/LINE DRIVER
MILITARY AND COMMERCIAL TEMPERATURE RANGES
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V
CC
500
Ω
V
IN
Pulse
Generator
D.U.T.
50pF
R
T
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Open
8-link
7.0V
Switch
Closed
V
OUT
500
Ω
C
L
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
O ctal lin k
SET-UP, HOLD, AND RELEASE TIMES
DATA
INPUT
t
SU
TIM ING
INPUT
ASYNCHRONOUS C ONTROL
PRES ET
CLEAR
ETC.
SYNCHRO NOUS CONTRO L
PRES ET
CLEAR
CLOCK ENABLE
ETC.
t
REM
t
H
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
O ctal lin k
PULSE WIDTH
LO W -HIGH-LOW
PULSE
t
W
HIGH-LOW -HIGH
PULSE
O ctal lin k
1.5V
1.5V
t
SU
t
H
PROPAGATION DELAY
SAM E PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
OPPOSITE P HASE
INPUT TRANSITION
t
PH L
t
PH L
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
O ctal lin k
ENABLE AND DISABLE TIMES
ENAB LE
DISA BLE
3V
CO NTROL
INPUT
t
PZL
OUTPUT
NO RM A LLY
LO W
SW ITCH
CLOSE D
t
PZH
OUTPUT
NO RM A LLY
HIGH
SW ITCH
OPEN
3.5V
1.5V
0.3V
t
PHZ
0.3V
1.5V
0V
0V
O ctal lin k
1.5V
t
PLZ
0V
3.5V
V
OL
V
OH
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control
Disable-HIGH.
2. Pulse Generator for All Pulses: Rate
≤
1.0MHz; Zo
≤
50Ω; t
F
≤
2.5ns;
t
R
≤
2.5ns.
5
