ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
Available in SSOP, TSSOP, and TVSOP Packages
Hot insertion capability
Very low power dissipation
DESCRIPTION:
The FST1632861 belongs to IDT's family of Bus switches. Bus switch
devices perform the function of connecting or isolating two ports without
providing any inherent current sink or source capability. They generate
little or no noise of their own while providing a low resistance path for an
external driver. These devices connect input and output ports through an
n-channel FET. When the gate-to-source junction of this FET is adequately
forward-biased, the device conducts and the resistance between input and
output ports is small. With-out adequate bias on the gate-to-source junction
of the FET, the FET is turned off, therefore with no V
CC
applied, the device
has hot insertion capability.
The FST1632861 bus switch has a built-in 28Ω series resistor to reduce
noise which can result from reflections. This 28Ω built-in series resistor
eliminates the need for an external terminating resistor.
FUNCTIONAL BLOCK DIAGRAM
1
OE
2
OE
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
B
9
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
A
18
A
19
B
10
B
11
B
12
B
13
B
14
B
15
B
16
B
17
B
18
B
19
INDUSTRIAL TEMPERATURE RANGE
1
c /-
1999
Integrated Device Technology, Inc.
NOVEMBER 1999
DSC-5582/-
IDT74FST1632861
20-BIT, TWO PORT BUS SWITCH WITH RESISTOR
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
NC
A
0
A
1
A
2
A
3
A
4
A
5
A
6
A
7
A
8
A
9
GN D
NC
A
10
A
11
A
12
A
13
A
14
A
15
A
16
A
17
A
18
A
19
GN D
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
SO 48-1
SO 48-2
SO 48-3
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
V
CC
1
OE
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM(2)
T
STG
I
OUT
B
0
B
1
B
2
B
3
B
4
B
5
B
6
B
7
B
8
B
9
Vcc
2
OE
Rating
Terminal Voltage with Respect to GND
Storage Temperature
Maximum Continuous Channel Current
Max.
–0.5 to +7
–65 to +150
128
Unit
V
°C
mA
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. Vcc, Control, and Switch terminals.
CAPACITANCE
(1)
Symbol
Parameter
C
IN
Control Input Capacitance
C
I/O
Switch Input/Output
Capacitance
Conditions
(2)
Switch Off
Typ.
6
12
Unit
pF
pF
NOTES:
1. Capacitance is characterized but not tested.
2. T
A
= 25°C, f = 1MHz, V
IN
= 0V, V
OUT
= 0V
B
10
B
11
B
12
B
13
B
14
B
15
B
16
B
17
B
18
B
19
PIN DESCRIPTION
Pin Names
X
OE
Ax
Bx
Description
Output Enable Inputs (Active LOW)
A Port Bits
B Port Bits
FUNCTION TABLE
(1)
Inputs
xOE
L
H
NOTE:
1. H = HIGH Voltage level
L= LOW Voltage Level
Outputs
Connect A to B
Disconnect A from B
SSOP/ TSSOP/ TVSOP
TOP VIEW
2
IDT74FST1632861
20-BIT, TWO PORT BUS SWITCH WITH RESISTOR
INDUSTRIAL TEMPERATURE RANGE
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Conditions: T
A
= -40°C to +85°C, V
CC
= 5.0V ±10%
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
V
IK
I
OFF
Parameter
Control Input HIGH Voltage
Control Input LOW Voltage
Control Input HIGH Current
Control Input LOW Voltage
Current during
Bus Switch DISCONNECT
Clamp Diode Voltage
V
CC
= Min., I
IN
= –18mA
V
CC
= Max., V
O
= 0 to 5V
Test Conditions
Guaranteed Logic HIGH for Control Inputs
Guaranteed Logic LOW for Control Inputs
V
CC
= Max.
V
I
= V
CC
V
I
= GND
Min.
2
—
—
—
—
—
—
Typ.
(1)
—
—
—
—
—
—
–0.7
Max.
—
0.8
±1
±1
±1
±1
–1.2
V
µA
Unit
V
V
µA
3
IDT74FST1632861
20-BIT, TWO PORT BUS SWITCH WITH RESISTOR
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
∆I
CC
I
CCD
Parameter
Quiescent Power Supply Current
TTL Inputs HIGH
Dynamic Power Supply Current
(4,5)
Test Conditions
(1)
V
CC
= Max.
V
IN
= 3.4V
(3)
V
CC
= Max.
Outputs Open
Enable Pin Toggling
50% Duty Cycle
V
CC
= Max.
Outputs Open
2 Enable Pins Toggling
fi = 10MHz
50% Duty Cycle
Min.
—
—
Typ.
(2)
0.5
30
Max.
1.5
400
Unit
mA
µ A/
MHz/
Enable
mA
V
IN
= V
CC
V
IN
= GND
I
C
Total Power Supply Current
(6)
V
IN
= V
CC
V
IN
= GND
V
IN
= 3.4
V
IN
= GND
—
0.6
8
—
0.7
9.5
NOTES:
1. For conditions shown as Max. or Min., use appropriate value specified under Electrical Characteristics for the applicable device type. T
A
= –40°C to
+85°C
2. Typical values are at V
CC
= 5.0V, +25°C ambient.
3. Per TTL driven input (V
IN
= 3.4V). All other inputs at V
CC
or GND. Switch inputs do not contribute to
∆I
CC.
4. This parameter represents the current required to switch the internal capacitance of the control inputs at the specified frequency.
Switch inputs generate no significant power supply currents as they transition. This parameter is not directly testable, but is derived for use in Total
Power Supply Calculations.
5. C
PD
= I
CCD
/V
CC
C
PD
= Power Dissipation Capacitance
6. I
C
= I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
I
C
= I
CC
+
∆I
CC
D
H
N
T
+ I
CCD
(f
i
N)
I
CC
= Quiescent Current
∆I
CC
= Power Supply Current for a TTL High Input (V
IN
= 3.4V)
D
H
= Duty Cycle for TTL Inputs High
N
T
= Number of TTL Inputs at D
H
I
CCD
= Dynamic Current Caused by an Input Transition Pair (HLH or LHL)
f
i
= Control Input Frequency
N = Number of Control Inputs Toggling at f
i
SWITCHING CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Commercial: T
A
= -40°C to +85°C, V
CC
= 5.0V ± 10%
V
CC
= 5V ± 10%
Symbol
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
|Q
CI
|
Description
(1)
Data Propagation Delay
A to B, Y to B
(2)
Switch CONNECT Delay
xOE to A or B
Switch DISCONNECT Delay
xOE to A or B
Charge Injection During Switch
DISCONNECT, xOE to A or B
(3)
Min.
—
1.5
1.5
—
Typ.
—
—
—
1.5
Max.
0.25
6.5
7
—
V
CC
= 4V
Max.
0.25
7
7
—
Unit
ns
ns
ns
pC
NOTES:
1. See test circuits and waveforms.
2. The bus switch contributes no Propagation Delay other than the RC Delay of the load interacting with the RC of the switch.
3. |Q
CI
| is the charge injection for a single switch DISCONNECT and applies to either single switches or multiplexers.
|Q
DCI
| is the charge injection for a multiplexer as the multiplexed port switches from one path to another. Charge injection is reduced because the
injection from the DISCONNECT of the first path is compensated by the CONNECT of the second path.
4
IDT74FST1632861
20-BIT, TWO PORT BUS SWITCH WITH RESISTOR
INDUSTRIAL TEMPERATURE RANGE
TEST CIRCUITS AND WAVEFORMS
TEST CIRCUITS FOR ALL OUTPUTS
V
CC
500
Ω
V
IN
Pulse
Generator
D.U.T.
50pF
R
T
PROPAGATION DELAY
7.0V
SAM E PHASE
INPUT TRANSITION
t
PLH
OUTPUT
t
PLH
t
PH L
t
PH L
3V
1.5V
0V
V
OH
1.5V
V
OL
3V
1.5V
0V
V
OUT
500
Ω
C
L
OPPOSITE PHASE
INPUT TRANSITION
SWITCH POSITION
Test
Open Drain
Disable Low
Enable Low
All Other Tests
Open
FCT LINK
SET-UP, HOLD, AND RELEASE TIMES
Switch
DATA
INPUT
t
SU
TIMING
INPUT
ASYNCHRO NOUS
CONTROL
SYNCHRONO US
CONTROL
t
REM
t
H
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
3V
1.5V
0V
Closed
DEFINITIONS:
C
L
= Load capacitance: includes jig and probe capacitance.
R
T
= Termination resistance: should be equal to Z
OUT
of the Pulse
Generator.
t
SU
t
H
CHARGE INJECTION
V
CC
ENABLE AND DISABLE TIMES
ENABLE
DISABLE
3V
V
O U T(3)
Switch
Out
1 MHz
Signal
Generator
Enable/Select
Switch In
(1)
D.U.T.
(2)
CONTROL
INPUT
t
PZL
OUTPUT
NORMALLY
LOW
SW ITCH
CLOSED
t
PZH
3.5V
1.5V
0.3V
t
PHZ
0.3V
1.5V
0V
t
PLZ
1.5V
0V
3.5V
V
OL
V
OH
Switch In (MU X)
C
L
=
50pF
NOTES:
1. Select is used with multiplexers for measuring IQ
DCI
I during multiplexer
select. During all other tests Enable is used.
2. Used with multiplexers to measure IQ
DCI
I only.
3. Charge Injection =
∆V
OUT
C
L
, with Enable toggling for IQ
CI
I or Select toggling
for IQ
DCI
I.
∆V
OUT
is the change in V
OUT
and is measured with a 10MΩ
probe.
OUTPUT
NORMALLY
HIGH
SW ITCH
OPEN
0V
PULSE WIDTH
LOW -HIGH-LOW
PULS E
t
W
HIGH-LOW -HIGH
PULS E
1.5V
1.5V
NOTES:
1. Diagram shown for input Control Enable-LOW and input Control Disable-
