IDT74LVC16652A
3.3V CMOS 16-BIT BUS REGISTERED TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT BUS
REGISTERED TRANSCEIVER,
5 VOLT TOLERANT I/O
FEATURES:
Typical
t
SK(0)
(Output Skew) < 250ps
ESD > 2000V per MIL-STD-883, Method 3015;
> 200V using machine model (C = 200pF, R = 0)
– 0.635mm pitch SSOP, 0.50mm pitch TSSOP
and 0.40mm pitch TVSOP packages
– Extended commercial range of -40°C to +85°C
– V
CC
= 3.3V ±0.3V, Normal Range
– V
CC
= 2.7V to 3.6V, Extended Range
– CMOS power levels (0.4µ W typ. static)
– All inputs, outputs and I/O are 5 Volt tolerant
– Supports hot insertion
Drive Features for LVC16652A:
– High Output Drivers: ±24mA
– Reduced system switching noise
–
–
IDT74LVC16652A
DESCRIPTION:
The LVC16652A 16-bit registered transceiver is built using advanced
dual metal CMOS technology. This high-speed, low power device is
organized as two independent 8-bit bus transceivers with 3-state D-type
registers. For example, the OEAB and
OEBA
signals control the transceiver
functions.
The SAB and the SBA control pins are provided to select either real time
or stored data transfer. The circuitry used for select control will eliminate the
typical decoding glitch that occurs in a multiplexer during the transition
between stored and real time data. A Low input level selects real-time data
and a High level selects stored data.
Data on the A or B data bus, or both, can be stored in the internal D-flip-
flops by the Low-to-High transitions at the appropriate clock pins (CLKAB
or CLKBA), regardless of the select or enable control pins. Flow-through
organization of signal pins simplifies layout. All inputs are designed with
hysteresis for improved noise margin.
The LVC16652A is ideally suited for driving high capacitance loads and
low-impedance backplanes.
All pins can be driven from either a 3.3V or 5V device. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
APPLICATIONS:
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
Functional Block Diagram
1
28
1
OEAB
1
OEBA
1
CLKBA
1
SBA
2
OEAB
2
O EBA
2
CLKBA
2
SBA
2
CLKAB
29
56
55
30
54
2
31
27
1
CLKAB
1
SAB
3
2
SAB
26
B R EG
D
C
5
B R EG
D
C
1
A
1
A REG
D
C
52
1
B
1
2
A
1
15
A REG
D
C
42
2
B
1
TO SEVEN OTHER CHANNELS
TO SEVEN O THER CHANNELS
EXTENDED COMMERCIAL TEMPERATURE RANGE
1
c
1998 Integrated Device Technology, Inc.
MARCH 1999
DSC-4487/1
IDT74LVC16652A
3.3V CMOS 16-BIT BUS REGISTERED TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
PIN CONFIGURATION
ABSOLUTE MAXIMUM RATINGS
Symbol
V
TERM(2)
Description
Terminal Voltage with Respect to GND
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
I
< 0 or V
O
< 0
Continuous Current through
each V
CC
or GND
(1)
Unit
V
V
°C
mA
mA
mA
LVC Link
Max.
– 0.5 to +6.5
– 0.5 to +6.5
– 65 to +150
– 50 to +50
– 50
±100
1
OEAB
1
CLKAB
1
SAB
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
SO56-1
SO56-2 43
SO56-3
42
41
40
39
38
37
36
35
34
33
32
31
30
29
1
OEBA
1
CLKBA
1
SBA
V
TERM(3)
T
STG
I
OUT
I
IK
I
OK
I
CC
I
SS
GND
1
A
1
1
A
2
GND
1
B
1
1
B
2
V
CC
1
A
3
1
A
4
1
A
5
V
CC
1
B
3
1
B
4
1
B
5
NOTES:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or
any other conditions above those indicated in the operational sections
of this specification is not implied. Exposure to absolute maximum
rating conditions for extended periods may affect reliability.
2. V
CC
terminals.
3. All terminals except V
CC
.
GND
1
A
6
1
A
7
1
A
8
2
A
1
2
A
2
2
A
3
GND
1
B
6
1
B
7
1
B
8
2
B
1
2
B
2
2
B
3
CAPACITANCE
(T
A
= +25
O
C, f = 1.0MHz)
Symbol
C
IN
C
OUT
C
I/O
Parameter
(1)
Input Capacitance
Output
Capacitance
I/O Port
Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
V
IN
= 0V
Typ.
4.5
6.5
6.5
Max.
6
8
8
Unit
pF
pF
pF
LVC Link
GND
2
A
4
2
A
5
2
A
6
GND
2
B
4
2
B
5
2
B
6
NOTE:
1. As applicable to the device type.
V
CC
2
A
7
2
A
8
V
CC
2
B
7
2
B
8
PIN DESCRIPTION
Pin Names
xAx
xBx
xCLKAB, xCLKBA
xSAB, xSBA
xOEAB, xOEBA
Description
Data Register A Inputs
Data Register B Outputs
Data Register B Inputs
Data Register A Outputs
Clock Pulse Inputs
Output Data Source Select Inputs
Output Enable Inputs
GND
2
SA B
2
CLKAB
2
OEAB
GND
2
SB A
2
CLKBA
2
OEBA
SSOP/ TSSOP/ TVSOP
TOP VIEW
c 1998 Integrated Device Technology, Inc.
2
DSC-123456
IDT74LVC16652A
3.3V CMOS 16-BIT BUS REGISTERED TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
FUNCTION TABLE
xOEAB
L
L
X
H
L
L
L
L
H
H
H
xOEBA
H
H
H
H
X
L
L
L
H
H
L
xCLKAB
H or L
↑
↑
↑
H or L
↑
X
X
X
H or L
H or L
(1, 2)
Data I/O
(3)
xSAB
X
X
X
X
(2)
X
X
X
X
L
H
H
xSBA
X
X
X
X
X
X
(2)
L
H
X
X
H
xAx
Input
Input
Input
Unspecified
(3)
Output
Output
Input
Output
xBx
Input
Unspecified
(3)
Output
Input
Input
Input
Output
Output
Operation or Function
Isolation
Store A and B Data
Store A, Hold B
Store A in both Registers
Hold A, Store B
Store B in both Registers
Real Time B Data to A Bus
Stored B Data to A Bus
Real Time A Data to B Bus
Stored A Data to B Bus
Store A Data to B Bus and Stored B
Data to A Bus
Inputs
xCLKBA
H or L
↑
H or L
↑
↑
↑
X
H or L
X
X
H or L
NOTES:
1. H = HIGH Voltage Level
L = LOW Voltage Level
X = Don’t Care
↑
= LOW-to-HIGH Transition
2. Select Control = L: clocks can occur simultaneously.
Select Control = H: clocks can be staggered to load both registers.
3. The data output functions may be enabled or disabled by various signals at the xOEAB or xOEBA inputs. Data input functions are always enabled,
i.e. data at the bus pins will be stored on every LOW-to-HIGH transition on the clock inputs.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
A
= –40
O
C to +85
O
C
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
OFF
V
IK
V
H
I
CCL
I
CCH
I
CCZ
∆I
CC
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
Input Leakage Current
High Impedance Output Current
(3-State Output pins)
Input/Output Power Off Leakage
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= 0V, V
IN
or V
O
≤
5.5V
V
CC
= 2.3V, I
IN
= – 18mA
V
CC
= 3.3V
V
CC
= 3.6V
V
IN
= GND or V
CC
3.6
≤
V
IN
≤
5.5V
(2)
Quiescent Power Supply
Current Variation
One input at V
CC
- 0.6V
other inputs at V
CC
or GND
—
—
—
—
—
—
—
– 0.7
100
—
—
—
±50
– 1.2
—
10
10
500
µA
LVC Link
Test Conditions
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V
V
CC
= 3.6V
V
I
= 0 to 5.5V
V
O
= 0 to 5.5V
Min.
1.7
2
—
—
—
—
Typ.
(1)
—
—
—
—
—
—
Max.
—
—
0.7
0.8
±5
±10
Unit
V
V
µA
µA
µA
V
mV
µA
NOTES:
1. Typical values are at V
CC
= 3.3V, +25°C ambient.
2. This applies in the disabled state only.
3
IDT74LVC16652A
3.3V CMOS 16-BIT BUS REGISTERED TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
BUS
A
BUS
B
BUS
A
BUS
B
xOEAB xOEBA xCLKAB
L
X
L
xCLKBA
X
xSAB
X
xSBA
L
xOEAB xOEBA xCLKAB
H
X
H
xCLKBA
X
xSAB
L
xSBA
X
REAL-TIME TRANSFER
BUS B TO A
REAL-TIME TRANSFER
BUS A TO B
BUS
A
BUS
B
BUS
A
BUS
B
xOEAB
X
L
L
xOEBA xCLKAB
H
↑
X
X
H
↑
xCLKBA
X
↑
↑
xSAB
X
X
X
xSBA
X
X
X
xOEAB
H
xOEBA xCLKAB
L
H or L
xCLKBA
H or L
xSAB
H
xSBA
H
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED
DATA TO A AND/OR B
4
IDT74LVC16652A
3.3V CMOS 16-BIT BUS REGISTERED TRANSCEIVER
EXTENDED COMMERCIAL TEMPERATURE RANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
Parameter
Output HIGH Voltage
V
CC
Test Conditions
(1)
= 2.3V to 3.6V
I
OH
= – 0.1mA
I
OH
= – 6mA
I
OH
= – 12mA
Min.
V
CC
– 0.2
2
1.7
2.2
2.4
I
OH
= – 24mA
I
OL
= 0.1mA
I
OL
= 6mA
I
OL
= 12mA
V
CC
= 2.7V
V
CC
= 3.0V
I
OL
= 12mA
I
OL
= 24mA
2.2
—
—
—
—
—
Max.
—
—
—
—
—
—
0.2
0.4
0.7
0.4
0.55
LVC Link
Unit
V
V
CC
= 2.3V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3.0V
V
CC
= 3.0V
V
OL
Output LOW Voltage
V
CC
= 2.3V to 3.6V
V
CC
= 2.3V
V
NOTE:
1. V
IH
and V
IL
must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the
appropriate V
CC
range. T
A
= – 40°C to +85°C.
OPERATING CHARACTERISTICS, VCC = 3.3V
±
0.3V, TA = 25°C
Symbol
C
PD
C
PD
Parameter
Power Dissipation Capacitance per transceiver Outputs enabled
Power Dissipation Capacitance per transceiver Outputs disabled
Test Conditions
C
L
= 0pF, f = 10Mhz
Typical
55
12
Unit
pF
pF
5
