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IDT74LVC16652APF8

Registered Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.40 MM PITCH, TVSOP-56

器件类别:逻辑    逻辑   

厂商名称:IDT (Integrated Device Technology)

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器件参数
参数名称
属性值
厂商名称
IDT (Integrated Device Technology)
零件包装代码
SSOP
包装说明
0.40 MM PITCH, TVSOP-56
针数
56
Reach Compliance Code
unknown
其他特性
WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
系列
LVC/LCX/Z
JESD-30 代码
R-PDSO-G56
JESD-609代码
e0
长度
11.3 mm
逻辑集成电路类型
REGISTERED BUS TRANSCEIVER
位数
8
功能数量
2
端口数量
2
端子数量
56
最高工作温度
85 °C
最低工作温度
-40 °C
输出特性
3-STATE
输出极性
TRUE
封装主体材料
PLASTIC/EPOXY
封装代码
TSSOP
封装形状
RECTANGULAR
封装形式
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟(tpd)
7.3 ns
认证状态
Not Qualified
座面最大高度
1.2 mm
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
2.7 V
标称供电电压 (Vsup)
3.3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
TIN LEAD
端子形式
GULL WING
端子节距
0.4 mm
端子位置
DUAL
宽度
4.4 mm
文档预览
IDT74LVC16652A
3.3V CMOS 16-BIT BUS REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT BUS
REGISTERED TRANSCEIVER,
5 VOLT TOLERANT I/O
FEATURES:
DESCRIPTION:
IDT74LVC16652A
• Typical t
SK(o)
(Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• V
CC
= 3.3V ± 0.3V, Normal Range
• V
CC
= 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µ W typ. static)
µ
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SSOP, TSSOP, and TVSOP packages
DRIVE FEATURES:
APPLICATIONS:
• High Output Drivers: ±24mA
• Reduced system switching noise
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
The LVC16652A 16-bit registered transceiver is built using advanced
dual metal CMOS technology. This high-speed, low power device is
organized as two independent 8-bit bus transceivers with 3-state D-type
registers. For example, the OEAB and
OEBA
signals control the transceiver
functions.
The SAB and the SBA control pins are provided to select either real time
or stored data transfer. The circuitry used for select control will eliminate the
typical decoding glitch that occurs in a multiplexer during the transition
between stored and real time data. A Low input level selects real-time data
and a High level selects stored data.
Data on the A or B data bus, or both, can be stored in the internal D-flip-
flops by the Low-to-High transitions at the appropriate clock pins (CLKAB
or CLKBA), regardless of the select or enable control pins. Flow-through
organization of signal pins simplifies layout. All inputs are designed with
hysteresis for improved noise margin.
The LVC16652A is ideally suited for driving high capacitance loads and
low-impedance backplanes.
All pins can be driven from either a 3.3V or 5V device. This feature allows
the use of this device as a translator in a mixed 3.3V/5V supply system.
FUNCTIONAL BLOCK DIAGRAM
1
OEAB
1
OEBA
1
CLKBA
1
SBA
1
CLKAB
1
SAB
1
2
OEAB
2
OEBA
2
CLKBA
2
SBA
2
CLKAB
28
56
29
55
54
2
30
31
27
26
3
B REG
D
C
2
SAB
B REG
D
C
1
A
1
5
A REG
D
C
52
1
B
1
2
A
1
15
A REG
D
C
42
2
B
1
TO SEVEN OTHER CHANNELS
TO SEVEN OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
1
© 1999 Integrated Device Technology, Inc.
MARCH 1999
DSC-4487/2
IDT74LVC16652A
3.3V CMOS 16-BIT BUS REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
PIN CONFIGURATION
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
Description
Max
V
TERM
Terminal Voltage with Respect to GND
Storage Temperature
DC Output Current
Continuous Clamp Current,
V
I
< 0 or V
O
< 0
Continuous Current through each
V
CC
or GND
–0.5 to +6.5
–65 to +150
–50 to +50
–50
±100
T
STG
I
OUT
I
IK
I
OK
I
CC
I
SS
Unit
V
°C
mA
mA
mA
1
OEAB
1
CLKAB
1
SAB
1
OEBA
1
CLKBA
1
SBA
GND
1
A
1
1
A
2
GND
1
B
1
1
B
2
V
CC
1
A
3
1
A
4
1
A
5
V
CC
1
B
3
1
B
4
1
B
5
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
GND
1
A
6
1
A
7
1
A
8
2
A
1
2
A
2
2
A
3
GND
1
B
6
1
B
7
1
B
8
2
B
1
2
B
2
2
B
3
CAPACITANCE
(T
A
= +25°C, F = 1.0MHz)
Symbol
C
IN
C
OUT
C
I/O
Parameter
(1)
Input Capacitance
Output Capacitance
I/O Port Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
V
IN
= 0V
Typ.
4.5
6.5
6.5
Max.
6
8
8
Unit
pF
pF
pF
NOTE:
1. As applicable to the device type.
GND
2
A
4
2
A
5
2
A
6
GND
2
B
4
2
B
5
2
B
6
V
CC
2
A
7
2
A
8
V
CC
2
B
7
2
B
8
PIN DESCRIPTION
Pin Names
xAx
Description
Data Register A Inputs
Data Register B Outputs
xBx
xCLKAB, xCLKBA
xSAB, xSBA
xOEAB, xOEBA
Data Register B Inputs
Data Register A Outputs
Clock Pulse Inputs
Output Data Source Select Inputs
Output Enable Inputs
GND
2
SAB
2
CLKAB
2
OEAB
GND
2
SBA
2
CLKBA
2
OEBA
SSOP/ TSSOP/ TVSOP
TOP VIEW
2
IDT74LVC16652A
3.3V CMOS 16-BIT BUS REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
FUNCTION TABLE
(1,2)
Inputs
xOEAB
L
L
X
H
L
L
L
L
H
H
H
xOEBA
H
H
H
H
X
L
L
L
H
H
L
xCLKAB
H or L
H or L
X
X
X
H or L
H or L
xCLKBA
H or L
H or L
X
H or L
X
X
H or L
xSAB
X
X
X
X
(2)
X
X
X
X
L
H
H
xSBA
X
X
X
X
X
X
(2)
L
H
X
X
H
Output
Output
Input
Output
Input
Input
Unspecified
(3)
Output
Output
Unspecified
Output
Input
Input
Input
(3)
Data I/O
xAx
Input
(3)
xBx
Input
Operation or Function
Isolation
Store A and B data
Store A, Hold B
Store A in both registers
Store B, Hold A
Store B in both registers
Real time B data to A bus
Store B data to A bus
Real time A data to B bus
Store A data to B bus
Store A data to B bus and
Store B data to A bus
NOTES:
1. H = HIGH Voltage Level
X = Don’t Care
L = LOW Voltage Level
= LOW-to-HIGH transition
2. Select Control = L: clocks can occur simultaneously.
Select Control = H: clocks can be staggered to load both registers.
3. The data output functions may be enabled or disabled by various signals at the xOEAB or xOEBA inputs. Data input functions are always enabled, i.e. data at the bus pins
will be stored on every LOW-to-HIGH transition of the clock inputs.
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Operating Condition: T
A
= –40°C to +85°C
Symbol
V
IH
V
IL
I
IH
I
IL
I
OZH
I
OZL
I
OFF
V
IK
V
H
I
CCL
I
CCH
I
CCZ
∆I
CC
High Impedance Output Current
(3-State Output pins)
Input/Output Power Off Leakage
Clamp Diode Voltage
Input Hysteresis
Quiescent Power Supply Current
V
CC
= 0V, V
IN
or V
O
5.5V
V
CC
= 2.3V, I
IN
= –18mA
V
CC
= 3.3V
V
CC
= 3.6V
V
IN
= GND or V
CC
–0.7
100
±50
–1.2
10
10
500
µA
V
mV
µA
V
CC
= 3.6V
V
O
= 0 to 5.5V
±10
µA
Parameter
Input HIGH Voltage Level
Input LOW Voltage Level
Input Leakage Current
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 2.3V to 2.7V
V
CC
= 2.7V to 3.6V
V
CC
= 3.6V
V
I
= 0 to 5.5V
Test Conditions
Min.
1.7
2
Typ.
(1)
Max.
0.7
0.8
±5
µA
V
Unit
V
Quiescent Power Supply Current
Variation
3.6
V
IN
5.5V
(2)
One input at V
CC
- 0.6V, other inputs at V
CC
or GND
µA
NOTES:
1. Typical values are at V
CC
= 3.3V, +25°C ambient.
2. This applies in the disabled state only.
3
IDT74LVC16652A
3.3V CMOS 16-BIT BUS REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
BUS
A
BUS
B
BUS
A
BUS
B
xOEAB xOEBA xCLKAB
L
X
L
xCLKBA
X
xSAB
X
xSBA
L
xOEAB xOEBA xCLKAB
H
X
H
xCLKBA
X
xSAB
L
xSBA
X
REAL-TIME TRANSFER
BUS B TO A
REAL-TIME TRANSFER
BUS A TO B
BUS
A
BUS
B
BUS
A
BUS
B
xOEAB xOEBA xCLKAB
H
X
X
L
X
H
L
xCLKBA
X
xSAB
X
X
X
xSBA
X
X
X
xOEAB xOEBA xCLKAB
L
H or L
H
xCLKBA
H or L
xSAB
H
xSBA
H
STORAGE FROM
A, B, OR A AND B
TRANSFER STORED
DATA TO A AND/OR B
4
IDT74LVC16652A
3.3V CMOS 16-BIT BUS REGISTERED TRANSCEIVER
INDUSTRIAL TEMPERATURE RANGE
OUTPUT DRIVE CHARACTERISTICS
Symbol
V
OH
Parameter
Output HIGH Voltage
V
CC
= 2.3V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3V
V
CC
= 3V
V
OL
Output LOW Voltage
V
CC
= 2.3V to 3.6V
V
CC
= 2.3V
V
CC
= 2.7V
V
CC
= 3V
I
OH
= – 24mA
I
OL
= 0.1mA
I
OL
= 6mA
I
OL
= 12mA
I
OL
= 12mA
I
OL
= 24mA
Test Conditions
(1)
V
CC
= 2.3V to 3.6V
I
OH
= – 0.1mA
I
OH
= – 6mA
I
OH
= – 12mA
Min.
V
CC
– 0.2
2
1.7
2.2
2.4
2.2
Max.
0.2
0.4
0.7
0.4
0.55
V
Unit
V
NOTE:
1. V
IH
and V
IL
must be within the min. or max. range shown in the DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE table for the appropriate V
CC
range.
T
A
= – 40°C to + 85°C.
OPERATING CHARACTERISTICS, V
CC
= 3.3V ± 0.3V, T
A
= 25°C
Symbol
C
PD
C
PD
Parameter
Power Dissipation Capacitance per Transceiver Outputs enabled
Power Dissipation Capacitance per Transceiver Outputs disabled
Test Conditions
C
L
= 0pF, f = 10Mhz
Typical
55
12
Unit
pF
5
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参数对比
与IDT74LVC16652APF8相近的元器件有:IDT74LVC16652APA8、IDT74LVC16652APV8。描述及对比如下:
型号 IDT74LVC16652APF8 IDT74LVC16652APA8 IDT74LVC16652APV8
描述 Registered Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.40 MM PITCH, TVSOP-56 Registered Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.50 MM PITCH, TSSOP-56 Registered Bus Transceiver, LVC/LCX/Z Series, 2-Func, 8-Bit, True Output, CMOS, PDSO56, 0.635 MM PITCH, SSOP-56
零件包装代码 SSOP TSSOP SSOP
包装说明 0.40 MM PITCH, TVSOP-56 0.50 MM PITCH, TSSOP-56 SSOP,
针数 56 56 56
Reach Compliance Code unknown unknown unknown
其他特性 WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
系列 LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z
JESD-30 代码 R-PDSO-G56 R-PDSO-G56 R-PDSO-G56
JESD-609代码 e0 e0 e0
长度 11.3 mm 14 mm 18.415 mm
逻辑集成电路类型 REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER
位数 8 8 8
功能数量 2 2 2
端口数量 2 2 2
端子数量 56 56 56
最高工作温度 85 °C 85 °C 85 °C
最低工作温度 -40 °C -40 °C -40 °C
输出特性 3-STATE 3-STATE 3-STATE
输出极性 TRUE TRUE TRUE
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 TSSOP TSSOP SSOP
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
传播延迟(tpd) 7.3 ns 7.3 ns 7.3 ns
认证状态 Not Qualified Not Qualified Not Qualified
座面最大高度 1.2 mm 1.1 mm 2.794 mm
最大供电电压 (Vsup) 3.6 V 3.6 V 3.6 V
最小供电电压 (Vsup) 2.7 V 2.7 V 2.7 V
标称供电电压 (Vsup) 3.3 V 3.3 V 3.3 V
表面贴装 YES YES YES
技术 CMOS CMOS CMOS
温度等级 INDUSTRIAL INDUSTRIAL INDUSTRIAL
端子面层 TIN LEAD TIN LEAD TIN LEAD
端子形式 GULL WING GULL WING GULL WING
端子节距 0.4 mm 0.5 mm 0.635 mm
端子位置 DUAL DUAL DUAL
宽度 4.4 mm 6.1 mm 7.5 mm
厂商名称 IDT (Integrated Device Technology) IDT (Integrated Device Technology) -
Base Number Matches - 1 1
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器件捷径:
00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W
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