Semiconductor
April 1999
CT
ODU ODUCT
R
PR
TE P
OLE TITUTE 508(A)
S
OB
BS
I-0
E SU 508A, H
BL DG
SI
POS G408,
D
IH6108
8-Channel
CMOS Analog Multiplexer
Features
• Ultra Low Leakage - I
D(OFF)
≤
100pA (Typ)
• r
DS(ON)
< 400Ω Over Full Signal and Temperature
Range
• Power Supply Quiescent Current Less Than 100µA
•
±14V
Analog Signal Range
• No SCR Latchup
• Break-Before-Make Switching
• Binary Address Control (3 Address Inputs Control 8
Channels)
• TTL and CMOS Compatible Strobe Control
• Pin Compatible with DG508A, HI-508 and ADG508A
• Internal Diode in Series with V+ for Fault Protection
Description
The IH6108 is a CMOS 1-of-8 multiplexer. The part is a plug-
in replacement for the DG508A. Three-line decoding is used
so that the 8 channels can be controlled by 3 Address
inputs; additionally a fourth input is provided for use as a
system enable. When the ENABLE input is high (5V), a
channel is selected by the three Address inputs, and when
low (0V) all channels are off. The 3 Address inputs are TTL
and CMOS logic compatible, with a “1” corresponding to any
voltage greater than 2.4V.
Part Number Information
PART
NUMBER
IH6108MJE
IH6108MJE/883B
IH6108CJE
IH6108CPE
TEMP.
RANGE (
o
C)
-55 to 125
-55 to 125
0 to 70
0 to 70
PACKAGE
16 Ld CERDIP
16 Ld CERDIP
16 Ld CERDIP
16 Ld PDIP
PKG.
NO.
F16.3
F16.3
F16.3
E16.3
Pinout
IH6108
(CERDIP, PDIP)
TOP VIEW
A
0
1
EN 2
V- 3
S
1
4
S
2
5
S
3
6
S
4
7
D 8
16 A
1
15 A
2
14 GND
13 V+
12 S
5
11 S
6
10 S
7
9 S
8
Functional Diagram
S
1
S
2
S
3
S
4
S
5
S
6
S
7
S
8
A
0
A
1
A
2
EN
3 LINE BINARY ADDRESS INPUT
(1 0 1) AND EN AT 5V
ABOVE EXAMPLE SHOWS
CHANNEL 6 TURNED ON.
V
OUT
D
ADDRESS DECODER
1 OF 8
ENABLE
INPUT
TRUTH TABLE
A
2
x
0
0
0
0
1
1
1
1
A
1
x
0
0
1
1
0
0
1
1
A
0
x
0
1
0
1
0
1
0
1
EN
0
1
1
1
1
1
1
1
1
ON SWITCH
None
1
2
3
4
5
6
7
8
NOTE: A
0
, A
1
, A
2
Logic “1” = V
AH
≥
2.4V, V
ENH
≥
4.5V
Logic “0” = V
AL
≤
0.8V.
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures.
Copyright
©
Harris Corporation 1997
File Number
3156.2
12-128
IH6108
Absolute Maximum Ratings
V
IN
(A, EN) to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . -15V to 15V
V
S
or V
D
to V+ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0V, -36V
V
S
to V
D
to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0V, 36V
V+ to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18V
V- to Ground . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-18V
Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Current (Analog Source or Drain) . . . . . . . . . . . . . . . . . . . . . . 20mA
Thermal Information
Thermal Resistance (Typical, Note 1)
θ
JA
(
o
C/W)
θ
JC
(
o
C/W)
PDIP Package . . . . . . . . . . . . . . . . . . .
100
N/A
CERDIP Package . . . . . . . . . . . . . . . .
75
20
Maximum Junction Temperature (Hermetic Package) . . . . . . . . 175
o
C
Maximum Junction Temperature (Plastic Package) . . . . . . . . 150
o
C
Maximum Storage Temperature Range . . . . . . . . . .-65
o
C to 150
o
C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300
o
C
Operating Conditions
Temperature Range
C Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0
o
C to 70
o
C
M Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55
o
C to 125
o
C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1.
θ
JA
is measured with the component mounted on an evaluation PC board in free air.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of
the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Electrical Specifications
V+ = 15V, V- = -15V, V
EN
= +5V, Ground = 0V, Unless Otherwise Specified, (Note 4)
NO
TESTS
PER
TEMP
M SUFFIX (
o
C)
TYP
25
o
C
C SUFFIX (
o
C)
PARAMETER
SWITCH
r
DS(ON)
MEASURED
TERMINAL
TEST CONDITIONS
-55
25
125
0
25
70
UNITS
Ω
S to D
8
180
V
D
= +10V, I
S
= -1.0mA
Sequence Each Switch On
V
AL
= 0.8V, V
AH
= 2.4V
V
D
= -10V, I
S
= -1.0mA
Sequence Each Switch On
V
AL
= 0.8V, V
AH
= 2.4V
∆r
DS(ON)
=
r
DS
(
ON
)MAX
–
r
DS
(
ON
)MIN
---------------------------------------------------------------------------------- ,
-
r
˙
DS
(
ON
)AV
G
300
300
400
350
350
450
8
150
300
300
400
350
350
450
Ω
∆r
DS(ON)
20
-
-
-
-
-
-
%
V
S
=
±10V
I
S(OFF)
S
8
8
I
D(OFF)
D
1
1
I
D(ON)
D
8
0.002
0.002
0.03
0.03
0.1
V
S
= 10V, V
D
= -10V
V
S
= -10V, V
D
= 10V,
V
EN
= 0.8V
V
D
= 10V, V
S
= -10V,
V
EN
= 0.8V
V
D
= -10V, V
S
= 10V,
V
EN
= 0.8V
V
S(ALL)
= V
D
= 10V,
Sequence Each Switch On
V
AL
= 0.8V, V
AH
= 2.4V
V
S(ALL)
= V
D
= -10V,
Sequence Each Switch On
V
AL
= 0.8V, V
AH
= 2.4V
V
A
= 0V
V
A
= 14V
V
EN
= 5V, All V
A
= 0V
(Address Pins)
V
EN
= 0V, All V
A
= 0V
(Address Pins)
-
-
-
-
-
±0.5
±0.5
±2
±2
±2
±50
±50
±100
±100
±100
-
-
-
-
-
±1
±1
±5
±5
±5
±50
±50
±100
±100
±100
nA
nA
nA
nA
nA
8
0.1
-
±2
±100
-
±5
±100
nA
INPUT
I
AN(ON)
or I
A(on)
I
AN(OFF)
I
A(off)
I
A
A
0
, A
1
, or A
2
Inputs
A
0
, A
1
, A
2
3
3
3
1
0.01
0.01
0.01
0.01
-
-
-
-
-10
10
-10
-10
-30
30
-30
-30
-
-
-
-
-10
10
-10
-10
-30
30
-30
-30
µA
µA
µA
µA
EN
12-129
IH6108
Electrical Specifications
V+ = 15V, V- = -15V, V
EN
= +5V, Ground = 0V, Unless Otherwise Specified, (Note 4)
(Continued)
NO
TESTS
PER
TEMP
M SUFFIX (
o
C)
TYP
25
o
C
C SUFFIX (
o
C)
PARAMETER
DYNAMIC
t
TRANSITION
t
OPEN
t
ON(EN)
t
OFF(EN)
“OFF” Isolation
MEASURED
TERMINAL
TEST CONDITIONS
-55
25
125
0
25
70
UNITS
µs
µs
µs
µs
dB
D
D
D
D
D
0.3
0.2
0.6
0.4
60
See Figure 1
See Figure 2
See Figure 3
See Figure 3
V
EN
= 0V, R
L
= 200Ω,
C
L
= 3pF, V
S
= 3V
RMS
,
f = 500kHz
V
S
= 0V, V
EN
= 0V,
f = 140kHz to 1MHz
V
D
= 0V,V
EN
= 0V,
f = 140kHz to 1MHz
V
S
= 0V, V
D
= 0V,
V
EN
= 0V,
f = 140kHz to 1MHz
-
-
-
-
-
1
-
1.5
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
C
S(OFF)
C
D(OFF)
C
DS(OFF)
S
D
D to S
5
25
1
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
pF
pF
pF
SUPPLY
Positive Supply
Current
Negative Supply
Current
Positive Standby
Current
Negative Standby
Current
NOTE:
2. See “Enable Input Strobing Levels”, in Application Section.
V+
V-
V+
V-
1
1
1
1
40
2
1
1
V
EN
= 5V,
All V
A
= 0V or 5V
V
EN
= 5V,
All V
A
= 0V or 5V
V
EN
= 0V,
All V
A
= 0V or 5V
V
EN
= 0V,
All V
A
= 0V or 5V
-
-
-
-
-
-
-
-
200
100
100
100
-
-
-
-
-
-
-
-
1000
1000
1000
1000
µA
µA
µA
µA
Switching Information
+15V
V+
V
A
t
r
< 100ns
t
f
< 100ns
±10V
V
OUT
V
S1
= +10V
V
S8
= -10V
t
trans
(1-8)
-9V
±10V
V
OUT
V-
-15V
D
R
P
C
P
PROBE IMPEDANCE
R
P
≥
1MΩ
C
P
≤
30pF
PROBE
V
OUT
V
S1
= -10V
V
S8
= +10V
-10V
S1 ON
S8 ON
+9V
t
trans
(1-8)
+10V
-10V
S1 ON
S8 ON
3V
0.8V
+10V
50%
t
trans
(8-1)
+9V
S
1
S
2
S
3
S
IH6108
4
S
5
A
0
S
6
A
1
S
7
A
2
S
8
V
A
50Ω
EN
GND
+5V
-9V
t
trans
(8-1)
FIGURE 1. t
TRANSITION
SWITCHING TEST CIRCUIT AND WAVEFORMS
12-130
IH6108
Switching Information
S
1
S
2
THRU
A
0
IH6108 S
7
S
8
EN
A
2
A
1
V
A
V-
GND
-15V
D
200Ω
(Continued)
+15V
-2V
V
A
t
r
< 100ns
t
f
< 100ns
3V
0.8V
0.8V
+5V
V
OUT
V
S1
= -2V
V
OUT
35pF
t
OPEN
S1 ON
50%
t
OPEN
S8 ON
50%
FIGURE 2. t
OPEN
(BREAK-BEFORE-MAKE) SWITCHING TEST CIRCUIT AND WAVEFORMS
+15V
S
1
S
2
THRU
A
0
IH6108 S
8
A
2
A
1
EN
V
EN
GND
-15V
OUT
V
OUT
1kΩ
35pF
90%
t
EN(ON)
V
S1
= -2V
V
S1
V
EN
t
r
< 100ns
t
f
< 100ns
0.8V
V
OUT
0V
5V
50%
t
EN(OFF)
10%
FIGURE 3. t
ON
AND t
OFF
SWITCHING TEST CIRCUIT AND WAVEFORMS
IH6108 Application Information
ENABLE Input Strobing Levels
The ENABLE input on the IH6108 requires a minimum of
+4.5V to trigger to the “1” state and a maximum of +0.8V to
trigger to the “0” state. If the ENABLE input is being driven
from TTL logic, a pull-up resistor of 1k to 3kΩ is required
from the gate output to +5V supply. (See Figure 4.)
When the EN input is driven from CMOS logic, no pullup is
necessary, see Figure 5.
The supply voltage of the CD4009 affects the switching
speed of the IH6108; the same is true for TTL supply voltage
levels. The following chart shows the effect, on t
trans
for a
supply varying from +4.5V to +5.5V.
CMOS OR TTL
SUPPLY VOLTAGE
TYPICAL T
TRANS
AT 25
o
C
Using the IH6108 with Supplies Other Than
±15V
The IH6108 can be used with power supplies ranging from
±6V
to
±16V.
The switch r
DS(ON)
will increase as the supply
voltages decrease, however, the multiplexer error term (the
product of leakage times r
DS(ON)
) will remain approximately
constant since leakage decreases as the supply voltages
are reduced.
Caution must be taken to ensure that the enable (EN)
voltage is at least 0.7V below V+ at all times. If this is not
done, the Address input strobing levels will not function
properly. This may be achieved quite simply by connecting
EN (pin 2) to V+ (pin 13) via a silicon diode as shown in
Figure 6. When using this type of configuration, a further
requirement must be met: the strobe levels of A0 and A1
must be within 2.5V of the EN voltage in order to define a
binary “1” state. For the case shown in Figure 6 the EN volt-
age is 11.3V which means that logic high at A0 and A1 is
+8.8V (logic low continues to be 0.8V). In this configuration
the IH6108 cannot be driven by TTL (+5V) or CMOS (+5V)
logic. It can be driven by TTL open collector logic or CMOS
logic with +12V supplies.
If the logic and the IH6108 have common supplies, the EN
pin should again be connected to the supply through a
silicon diode. In this case, tying EN to the logic supply
directly will not work since it violates the 0.7V differential
voltage required between V+ and EN, (See Figure 7). A 1µF
capacitor can be placed across the diode to minimize
switching glitches.
+4.5V
+4.75V
+5.00V
+5.25V
+5.50V
400ns
300ns
250ns
200ns
175ns
The throughput rate can therefore be maximized by using a
+5V to +5.5V supply for the ENABLE Strobe Logic.
The examples shown in Figures 4 and 5 deal with ENABLE
strobing when expansion to more than eight channels is
required. In these cases the EN terminal acts as a fourth
address input. If eight channels or less are being multi-
plexed, the EN terminal can be directly connected to +5V
logic supply to enable the IH6108 at all times.
12-131
IH6108
Switching Information
+5V
1kΩ
A
0
1
EN
2
-15V 3
+3V
0V
S
1
4
S
2
5
S
3
6
S
4
7
6
7
9
8
D
V
OUT
8
IH6108
16 A
1
15 A
2
14
13 +15V
12 S
5
11 S
6
10 S
7
9 S
8
1
2
3
4
5
DM7404N
TTL LOGIC
14
13
12
11
10
FIGURE 4. ENABLE INPUT STROBING FROM TTL LOGIC
+5V
1
2
3
4
5
6
7
8
CD4009
16
15
14
13
12
11
10
9
A
0
1
EN
2
-15V 3
S
1
4
S
2
5
S
3
6
S
4
7
D 8
IH6108
16 A
1
15 A
2
14 GND
13 +15V
12 S
5
11 S
6
10 S
7
9 S
8
FIGURE 5. ENABLE INPUT DRIVEN FROM CMOS LOGIC
1N914
A
0
1
EN
2
-12V 3
S
1
4
IH6108
16 A
1
15 A
2
14
13
+12V
INPUTS
S
2
5
S
3
6
S
4
7
12 S
5
11 S
6
10 S
7
9 S
8
INPUTS
(V
OUT
) D 8
FIGURE 6. IH6108 CONNECTION DIAGRAM FOR LESS THAN
±15V
SUPPLY OPERATION
12-132
