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www.fairchildsemi.com
ILC7080/81
50/100mA SOT-23 CMOS RF LDO™ Regulators
Features
• Ultra low 1mV dropout per 1mA load
• 1% output voltage accuracy
• Uses low ESR ceramic output capacitor to minimize noise
and output ripple
• Only 100µA ground current at 100mA load
• Ripple rejection up to 85dB at 1kHz, 60dB at 1MHz
• Less than 80µV
RMS
noise at BW = 100Hz to 100kHz
• Excellent line and load transient response
• Over current / over temperature protection
• Guaranteed up to 80/150mA output current
• Industry standard five lead SOT-23 package
• Fixed 2.5V, 2.6V, 2.7V, 2.8V, 2.85V, 2.9V, 3.0, 3.1V, 3.3V,
3.6V, 4.7V, 5.0V and adjustable output (ILC7081 only)
voltage options
• Metal mask option available for custom voltages between
2.5 to 5.1V
Description
The ILC7080/81 are 50 or 100mA low dropout (LDO)
voltage regulators designed to provide a high performance
solution to low power systems.
The devices offer a typical combination of low dropout and
low quiescent current expected of CMOS parts, while
uniquely providing the low noise and high ripple rejection
characteristics usually only associated with bipolar LDO
regulators.
The devices have been optimized to meet the needs of
modern wireless communications design; Low noise, low
dropout, small size, high peak current, high noise immunity.
The ILC7080/81 are designed to make use of low cost
ceramic capacitors while outperforming other devices that
require tantalum capacitors.
Applications
•
•
•
•
Cellular phones
Wireless communicators
PDAs / palmtops / organizers
Battery powered portable electronics
Typical Applications
V
OUT
5
SOT-23-5
4
C
OUT
ILC7080
ILC7081
1
2
3
C
NOISE
V
IN
ON
OFF
REV. 1.0.7 4/3/03
ILC7080/81
Pin Assignments
V
OUT
5
C
NOISE
SOT23-5
4
V
OUT
5
V
ADJ
SOT23-5
4
ILC7080-xx
ILC7081-xx
1
2
3
ILC7081-ADJ
1
2
3
V
IN
GND
ON
OFF
V
IN
GND
ON
OFF
Fixed Voltage Option
Adjustable Voltage Option
Pin Description ILC7080/81-xx
(fixed voltage version)
Pin Number
1
2
3
4
5
Pin Name
V
IN
GND
ON/OFF
C
NOISE
V
OUT
Connect direct to supply
Ground pin. Local ground for C
NOISE
and C
OUT
.
By applying less than 0.4V to this pin the device will be turned off.
Optional noise bypass capacitor may be connected between this pin and GND (pin
2). Do not connect C
NOISE
directly to the main power ground plane.
Output Voltage. Connect C
OUT
between this pin and GND (pin 2).
Pin Description
Pin Description ILC7081-ADJ
(adjustable voltage version)
Pin Number
1
2
3
4
5
Pin Name
V
IN
GND
ON/OFF
V
ADJ
V
OUT
Connect direct to supply
Ground pin. Local ground for C
NOISE
and C
OUT
.
By applying less than 0.4V to this pin the device will be turned off.
Voltage feedback pin to set the adjustable output voltage. Do not connect a
capacitor to this pin.
Output Voltage. Connect C
OUT
between this pin and GND (pin 2).
Pin Description
Absolute Maximum Ratings
(Note 1)
Parameter
Input voltage
On/Off Input voltage
Output Current
Output voltage
Package Power Dissipation
(SOT-23-5)
Maximum Junction Temp Range
Storage Temperature
Operating Ambient Temperature
Package Thermal Resistance
Symbol
V
IN
V
ON/OFF
I
OUT
V
OUT
P
D
T
J(max)
T
STG
T
A
q
JA
Ratings
-0.3 to +13.5
-0.3 to V
IN
Short circuit protected
-0.3 to V
IN
+0.3
250
(Internally Limited)
-40 to +150
-40 to +125
-40 to +85
333
Units
V
mA
V
mW
°C
°C
°C
°C/W
Recommended Operating Conditions
Parameter
Input Voltage
Operating Ambient Temperature
Min.
V
OUT
+V
DO
-40
Typ.
V
OUT
+1
Max.
13
+85
Units
V
°C
2
REV. 1.0.7 4/3/03
ILC7080/81
Electrical Characteristics
ILC7080/81AIM5
Unless otherwise specified, all limits are at T
A
=25°C;
V
IN
= V
OUT(NOM)
+1V,
I
OUT
= 1mA, C
OUT
= 1µF, V
ON/OFF
= 2V.
Boldface type denotes specifications which apply over the specified operating temperature range.
Parameter
Symbol
Conditions
Min.
Typ.
Max.
Input voltage Range
Output voltage
V
IN
V
OUT
I
OUT
= 1mA
1mA < I
OUT
< 100mA
1mA < I
OUT
< 100mA
2
13
Units
V
%
Feedback Voltage
(ADJ version)
Line Regulation
Dropout voltage
(Note 3)
V
ADJ
∆
V
OUT
/
(V
OUT
*
∆
V
IN
)
V
OUT(NOM)
+1V < V
IN
< 12V
7080/81
I
OUT
= 0mA
(Note 4)
I
OUT
= 10mA
I
OUT
= 50mA
I
OUT
= 50mA
I
OUT
= 100mA
I
OUT
= 150mA
-1
V
OUT(NOM)
+1
-1.5
1.5
-3.5
+3.5
1.215
1.240
1.265
1.202
1.278
0.007
0.014
0.032
0.1
10
110
50
100
150
95
100
100
100
115
0.1
2.0
0.6
0.3
1
500
80
85
70
60
4
1
2
25
35
125
150
75
100
150
200
225
300
200
220
220
240
220
240
240
260
260
280
2
V
%/V
mV
7080 only
V
IN
- V
OUT
7081 only
Ground Pin Current
7080/81
I
OUT
= 0mA
I
OUT
= 10mA
µA
I
GND
7081 only
I
OUT
= 50mA
I
OUT
= 100mA
I
OUT
= 150mA
Shutdown (OFF)
Current
ON/OFF Input
Voltage
ON/OFF Pin Input
Current
Peak Output
Current (Note 4)
Output Noise
Voltage (RMS)
Ripple Rejection
I
ON/OFF
V
ON/OFF
I
IN( ON/OFF)
I
OUT(peak)
e
N
∆
V
OUT
/
∆
V
IN
V
ON/OFF
= 0V
High = Regulator On
Low = Regulator Off
V
ON/OFF
= 0.6V, regulator OFF
V
ON/OFF
= 2V, regulator ON
V
OUT
> 0.95V
OUT(NOM)
, tpw=2ms
BW=300Hz to 50kHz, C
NOISE
=0.01µF
Freq. = 1kHz
Freq. = 10kHz
Freq. = 1MHz
V
IN
: V
OUT(NOM)
+1V to V
OUT(NOM)
+2V,
tr/tf = 2µs; I
OUT
= 100mA
I
OUT
: 0 to 100mA;
d(I
OUT
)/dt = 100mA/µs with
C
OUT
= 0.47µF with
C
OUT
= 2.2µF
VOUT = 0V
C
OUT
= 4.7µF,
I
OUT
= 100mA
µA
V
µA
mA
µV
RMS
dB
400
Dynamic Line
Regulation
Dynamic Load
Regulation
∆V
OUT(line)
∆V
OUT(load)
I
SC
mV
50
25
600
mV
mA
Short Circuit Current
REV. 1.0.7 4/3/03
3
ILC7080/81
Notes:
1. Absolute maximum ratings indicate limits which when exceeded may result in damage to the component. Electrical
specifications do not apply when operating the device outside of its rated operating conditions.
2. Specified Min/Max limits are production tested or guaranteed through correlation based on statistical control methods.
Measurements are taken at constant junction temperature as close to ambient as possible using low duty pulse testing.
3. Dropout voltage is defined as the input to output differential voltage at which the output voltage drops 2% below the nominal
value measured with a 1V differential.
4. Guaranteed by design.
Operations
The ILC7080/81 LDO design is based on an advanced cir-
cuit configuration for which patent protection has been
applied. Typically it is very difficult to drive a capacitive out-
put with an amplifier. The output capacitance produces a
pole in the feedback path, which upsets the carefully tailored
dominant pole of the internal amplifier. Traditionally the
pole of the output capacitor has been “eliminated” by reduc-
ing the output impedance of the regulator such that the pole
of the output capacitor is moved well beyond the gain band-
width product of the regulator. In practice, this is difficult to
do and still maintain high frequency operation. Typically the
output impedance of the regulator is not simply resistive,
such that the reactive output impedance interacts with the
reactive impedance of the load resistance and capacitance.
In addition, it is necessary to place the dominant pole of the
circuit at a sufficiently low frequency such that the gain of
the regulator has fallen below unity before any of the com-
plex interactions between the output and the load occur. The
ILC7080/81 does not try to eliminate the output pole, but
incorporates it into the stability scheme. The load and output
capacitor forms a pole, which rolls off the gain of the regula-
tor below unity. In order to do this the output impedance of
the regulator must be high, looking like a current source.
The output stage of the regulator becomes a transconduc-
tance amplifier, which converts a voltage to a current with a
substantial output impedance. The circuit which drives the
transconductance amplifier is the error amplifier, which
compares the regulator output to the band gap reference and
produces an error voltage as the input to the transconduc-
tance amplifier. The error amplifier has a dominant pole at
low frequency and a “zero” which cancels out the effects of
the pole. The zero allows the regulator to have gain out to the
frequency where the output pole continues to reduce the gain
to unity. The configuration of the poles and zero are shown in
figure 1.
Instead of powering the critical circuits from the unregulated
input voltage, the CMOS RF LDO powers the internal
circuits such as the bandgap, the error amplifier and most of
the transconductance amplifier from the boot strapped regu-
lated output voltage of the regulator. This technique offers
extremely high ripple rejection and excellent line transient
response.
A block diagram of the regulator circuit used in the
ILC7080/81 is shown in figure 2, which shows the input-to-
output isolation and the cascaded sequence of amplifiers that
implement the pole-zero scheme outlined above.
The ILC7080/81 were designed in a CMOS process with
some minor additions, which allow the circuit to be used at
input voltages up to 13V. The resulting circuit exceeds the
frequency response of traditional bipolar circuits. The
ILC7080/81 is very tolerant of output load conditions with
the inclusion of both short circuit and thermal overload
protection. The device has a very low dropout voltage,
typically a linear response of 1mV per milliamp of load
current, and none of the quasi-saturation characteristics of a
bipolar output device. All the good features of the frequency
response and regulation are valid right to the point where the
regulator goes out of regulation in a 4mV transition region.
Because there is no base drive, the regulator is capable of
providing high current surges while remaining in regulation.
This is shown in the high peak current of 500mA which
allows for the ILC7080/81 to be used in systems that require
short burst mode operation.
DOMINANT POLE
85 dB
GAIN
OUTPUT POLE
COMPENSATING
ZERO
UNITY GAIN
FREQUENCY
Figure 1. LC7080/81 RF LDO frequency response
4
REV. 1.0.7 4/3/03
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