TECHNICAL DATA
IN74AC192
Presettable BCD/Decade UP/DOWN Counter
High-Speed Silicon-Gate CMOS
The IN74AC192 is identical in pinout to the LS/ALS192,
HC/HCT192. The device inputs are compatible with standard CMOS
outputs; with pullup resistors, they are compatible with LS/ALS outputs.
The counter has two separate clock inputs, a Count Up Clock and
Count Down Clock inputs. The direction of counting is determined by
which input is clocked. The outputs change state synchronous with the
LOW-to-HIGH transitions on the clock inputs. This counter may be
preset by entering the desired data on the P0, P1, P2, P3 input. When the
Parallel Load input is taken low the data is loaded independently of either
clock input. This feature allows the counters to be used as devide-by-n by
modifying the count lenght with the preset inputs. In addition the counter
can also be cleared. This is accomplished by inputting a high on the
Master Reset input. All 4 internal stages are set to low independently of
either clock input.Both a Terminal Count Down (TC
D
) and Terminal
Count Up (TC
U
) Outputs are provided to enable cascading of both up and
down counting functions. The TC
D
output produces a negative going
pulse when the counter underflows and TC
U
outputs a pulse when the
counter overflows. The counter can be cascaded by connecting the TC
U
and TC
D
outputs of one device to the Count Up Clock and Count Down
Clock inputs, respectively, of the next device.
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 2.0 to 6.0 V
•
Low Input Current: 1.0
μA,
0.1
μA
@ 25°C
•
High Noise Immunity Characteristic of CMOS Devices
•
Outputs Source/Sink 24 mA
ORDERING INFORMATION
IN74AC192N Plastic
IN74AC192D SOIC
T
A
= -40° to 85° C for all packages
PIN ASSIGNMENT
LOGIC DIAGRAM
PIN 16 =V
CC
PIN 8 = GND
Rev. 00
IN74AC192
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
V
OUT
I
IN
I
OUT
I
CC
P
D
Tstg
T
L
*
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Sink/Source Current, per Pin
DC Supply Current, V
CC
and GND Pins
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
Value
-0.5 to +7.0
-0.5 to V
CC
+0.5
-0.5 to V
CC
+0.5
±20
±50
±50
750
500
-65 to +150
260
Unit
V
V
V
mA
mA
mA
mW
°C
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
, V
OUT
T
J
T
A
I
OH
I
OL
t
r
, t
f
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Junction Temperature (PDIP)
Operating Temperature, All Package Types
Output Current - High
Output Current - Low
Input Rise and Fall Time
*
(except Schmitt Inputs)
V
CC
=3.0 V
V
CC
=4.5 V
V
CC
=5.5 V
0
0
0
-40
Min
2.0
0
Max
6.0
V
CC
140
+85
-24
24
150
40
25
Unit
V
V
°C
°C
mA
mA
ns/V
*
V
IN
from 30% to 70% V
CC
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range GND≤(V
IN
or
V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
outputs must be left open.
Rev. 00
IN74AC192
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Symbol
V
IH
Parameter
Minimum High-Level
Input Voltage
Maximum Low -Level
Input Voltage
Minimum High-Level
Output Voltage
Test Conditions
V
OUT
=0.1 V or V
CC
-0.1 V
V
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
5.5
5.5
5.5
5.5
8.0
Guaranteed Limits
25
°C
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.1
0.1
0.1
0.36
0.36
0.36
±0.1
-40°C to
85°C
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.46
3.76
4.76
0.1
0.1
0.1
0.44
0.44
0.44
±1.0
75
-75
80
μA
mA
mA
μA
V
Unit
V
V
IL
V
OUT
=0.1 V or V
CC
-0.1 V
V
V
OH
I
OUT
≤
-50
μA
V
V
IN
=V
IH
or V
IL
I
OH
=-12 mA
I
OH
=-24 mA
I
OH
=-24 mA
V
OL
Maximum Low-Level
Output Voltage
I
OUT
≤
50
μA
*
V
IN
=V
IH
or V
IL
I
OL
=12 mA
I
OL
=24 mA
I
OL
=24 mA
I
IN
I
OLD
I
OHD
I
CC
Maximum Input Leakage
Current
+Minimum Dynamic
Output Current
+Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
(per Package)
V
IN
=V
CC
or GND
V
OLD
=1.65 V Max
V
OHD
=3.85 V Min
V
IN
=V
CC
or GND
*
*
All outputs loaded; thresholds on input associated with output under test.
+Maximum test duration 2.0 ms, one output loaded at a time.
Note: I
IN
and I
CC
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
CC
FUNCTION TABLE
MR
Inputs
PL
CP
U
X
X
Mode
CP
D
X
X
H
H
Reset(Asyn.)
Preset(Asyn.)
No Count
Count Up
Count Down
No Count
The IN74AC192 can be preset to any state, but
will not count beyond 9. If preset to state 10, 11, 12, 13,
14 or 15, it will follow the sequence 10, 11, 6: 12, 13, 4:
14, 15, 2 if counting Up, and follow the sequence 15, 14,
13, 12, 11, 10, 9 if counting Down.
Logic equations
For Terminal Count:
TC
U
= Q
0
•
Q
3
•
CP
U
TC
D
= Q
0
•
Q
1
•
Q
2
•
Q
3
•
CP
D
H
X
L
L
L
H
L
H
L
H
L
H
X = don’t care
H
H
Rev. 00
IN74AC192
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=3.0 ns)
V
CC*
Symbol
f
max
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
t
PLH
t
PHL
C
IN
Parameter
Maximum Clock Frequency (Figure 1)
Propagation Delay, CP
U
or CP
D
to TC
U
or
TC
D
(Figure 2)
Propagation Delay, CP
U
or CP
D
to TC
U
or
TC
D
(Figure 2)
Propagation Delay, CP
U
or CP
D
to Q
n
(Figure
1)
Propagation Delay, CP
U
or CP
D
to Q
n
(Figure
1)
Propagation Delay, P
n
to Q
n
(Figure 3)
Propagation Delay, P
n
to Q
n
(Figure 3)
Propagation Delay, PL to Q
n
(Figure 4)
Propagation Delay, PL to Q
n
(Figure 4)
Propagation Delay, MR to Q
n
(Figure 5)
Propagation Delay, MR to TC
U
(Figure 6)
Propagation Delay, MR to TC
D
(Figure 6)
Propagation Delay, PL to TC
U
or TC
D
(Figure
6)
Propagation Delay, PL to TC
U
or TC
D
(Figure
6)
Propagation Delay, P
n
to TC
U
or TC
D
(Figure
6)
Propagation Delay, P
n
to TC
U
or TC
D
(Figure
6)
Maximum Input Capacitance
V
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
5.0
4.5
Min
88
120
20
13
19
11.5
15
10
15
9.5
15
10
15
9.5
15
10
20
12.5
20
12.5
18
12
19
11.5
20
13
15
8.5
20
13
20
12.5
4.5
Guaranteed Limits
25
°C
Max
-40°C to 85°C
Min
40
55
22
14.5
21
13.0
17.0
11.5
17.0
11
17.0
11.5
17.0
11
17
11.5
22
14
22
14
20
13.5
21
13.0
22
14.5
17
10
22
14.5
22
14
Max
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
pF
Unit
Typical @25°C,V
CC
=5.0 V
C
PD
*
Power Dissipation Capacitance
45
pF
Voltage Range 3.3 V is 3.3 V
±0.3
V
Voltage Range 5.0 V is 5.0 V
±0.5
V
Rev. 00
IN74AC192
TIMING REQUIREMENTS
(C
L
=50pF, Input t
r
=t
f
=3.0 ns)
V
CC*
Symbol
t
su
t
h
t
w
t
w
t
w
t
rec
t
rec
*
Guaranteed Limits
25
°C
9
6
-1.0
-1.0
17
12
11
8
14
10
9
12
17
12
-40°C to
85°C
10
7
0
0
21
13
12
9
16
12
10
13
21
14
Unit
ns
ns
ns
ns
ns
ns
ns
Parameter
Minimum Setup Time, P
n
to PL (Figure 7)
Minimum Hold Time, PL to P
n
(Figure 7)
Minimum Pulse Width, PL (Figure 4)
Minimum Pulse Width, CP
U
or CP
D
(Figure 1)
Minimum Pulse Width, MR (Figure 5)
Minimum Recovery Time, PL to CP
U
or CP
D
(Figure 5)
Minimum Recovery Time, MR to CP
U
or CP
D
(Figure 5)
V
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
3.3
5.0
Voltage Range 3.3 V is 3.3 V
±0.3
V
Voltage Range 5.0 V is 5.0 V
±0.5
V
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
Figure 3. Switching Waveforms
Figure 4. Switching Waveforms
Rev. 00
单片机
