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IP113M LF

Preliminary Data Sheet

Managed 10/100Base-TX / FX Media Converter

Features

A 10/100BASE-TX/ 100BASE-FX converter

with a SMI port for management

Built in a 10/100BASE-TX transceiver

Built in a PHY for 100BASE-FX

Built in a 2-port switch

– Pass all packets without address and

CRC check (optional)

– Supports modified cut-through frame

forwarding for low latency

– Supports pure converter mode data

forwarding for extreme low latency

– Supports flow control for full and half

duplex operation

– Bandwidth control

– Max packet length 1600 bytes

– Optional forward fragments

Built in 128Kb RAM for data buffer

Supports 3.3v I/O tolerance SMI (MDC, MDIO)

and MII registers for management

– Configure local and remote IP113M LF

through local SMI

– Monitor local and remote IP113M LF

through local SMI

– Configure/ monitor TP port support

(auto-negotiation or force 10M/100M,

full/half)

– Configure/ monitor flow control, bandwidth

– Supports loop back test (In-band or

out-band, auto or program)

– The maintenance frame is compliant to

TS-1000 standard (the

Telecommunication Technology

Committee, TTC)

Supports Statistic Counters

Supports auto MDI-MDIX function

Supports link fault pass through function

Supports far end fault function

LED display for link/activity, full/half, 10/100

Built in a watchdog timer to monitor internal

switch error

Supports EEPROM Configuration

0.25u CMOS technology

Single 2.5V power supply

48-pin LQFP package

Support Lead Free package (Please refer to the

Order Information)

General Description

IP113M LF can be a 10/100BASE-TX to

100BASE-FX converter with an SMI port for

management. It consists of a 2-port switch

controller, a fast Ethernet transceiver and a PHY

for 100BASE-FX. The transceivers in IP113M LF

are designed in DSP approach with advance

0.25um technology; this results in high noise

immunity and robust performance.

IP113M LF not only supports store and forward

mode, it also supports modified cut through mode

and pure converter mode for low latency data

forwarding. IP113M LF can transmit packet(s) up

to 1600 bytes to meet requirement of extra long

packets.

IP113M LF supports remote management function.

IP113M LF supports remote access functions and

it also supports remote monitor and loop back test

function defined in TS-1000 spec (*). Local

IP113M LF can access the MII registers of remote

IP113M LF by programming local IP113M LF’s MII

registers via SMI connection. IP113M LF

implements the management function using the

maintenance frame defined in TS-1000 spec.

IP113M LF supports IEEE802.3x, collision base

backpressure, and various LED functions, etc.

These functions can be configured to fit the

different requirements by feeding operation

parameters via EEPROM interface or pull

up/down resistors on specified pins.

* The Telecommunication Technology Committee

owns the copyright of TS-1000.

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April 9, 2007

IP113M LF-DS-R11

IP113M LF

Preliminary Data Sheet

Contents

Features....................................................................................................................................................... 1

General Description..................................................................................................................................... 1

Contents ...................................................................................................................................................... 2

Revision History........................................................................................................................................... 4

Block Diagram ............................................................................................................................................. 5

Application Diagram .................................................................................................................................... 5

Applications ................................................................................................................................................. 6

Managed converter (up to 31 pieces of IP113M LF in a chassis) ............................................................... 6

Un-managed converter................................................................................................................................ 6

PIN Diagram ................................................................................................................................................ 7

PIN Description ................................................................................................................................... 8

PIN Description (continued).............................................................................................................. 9

PIN Description (continued)............................................................................................................ 10

PIN Description (continued).............................................................................................................11

PIN Description (continued)............................................................................................................ 12

PIN Description (continued)............................................................................................................ 13

Functional Description ...................................................................................................................... 14

2.1 Data forwarding ................................................................................................................ 14

2.1.1 Modified cut-through mode................................................................................... 14

2.1.2 Pure converter mode ............................................................................................ 14

2.1.3 Fragment forwarding ............................................................................................ 14

2.2 TP port force mode ........................................................................................................... 15

2.3 Remote management ....................................................................................................... 16

2.3.1 Maintenance frame format at MII ......................................................................... 16

2.3.2 Bit definition of maintenance frame ...................................................................... 16

2.3.3 Bit definition of maintenance frame (continued)................................................... 17

2.3.4 Remote monitor .................................................................................................... 18

2.3.5 Remote control read ............................................................................................. 18

2.3.6 Remote control write............................................................................................. 18

2.4 Loop back test .................................................................................................................. 19

2.4.1 Out-band loop back test ....................................................................................... 19

2.4.2 In-band loop back test .......................................................................................... 21

2.4.3 Programming procedure for In-band loop back test............................................. 22

2.4.4 Auto in-band loop back test.................................................................................. 22

2.5 Remote monitor without SMI programming...................................................................... 23

2.5.1 Auto sends (Status change notice)....................................................................... 23

2.6 Link fault pass through ..................................................................................................... 24

2.6.1 Normal case ......................................................................................................... 24

2.6.2 Remote TP port disconnected .............................................................................. 24

2.6.3 FX port disconnected .............................................................................................. 25

2.6.4 LED diagnostic functions for fault indication ........................................................ 25

2.7 EEPROM – store the initial value ..................................................................................... 26

2.8 Auto MDI_MDIX................................................................................................................ 27

2.9 Serial management interface............................................................................................ 28

MII registers ...................................................................................................................................... 29

3.1 The basic MII registers ..................................................................................................... 30

The basic MII registers 0 ................................................................................................ 30

The basic MII registers 1 ................................................................................................ 32

The basic MII registers 1(continued).............................................................................. 33

The basic MII registers 2 , 3 ........................................................................................... 34

The basic MII registers 4 ................................................................................................ 35

The basic MII registers 5 ................................................................................................ 36

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April 9, 2007

IP113M LF-DS-R11

IP113M LF

Preliminary Data Sheet

The basic MII registers 6 ................................................................................................ 37

3.2 Extended MII registers and EEPROM registers ............................................................... 38

Extended MII registers and EEPROM registers 16........................................................ 39

Extended MII registers and EEPROM registers 17........................................................ 40

Extended MII registers and EEPROM registers 17(continued)...................................... 41

Extended MII registers and EEPROM registers 18........................................................ 42

Extended MII registers and EEPROM registers 19........................................................ 43

Extended MII registers and EEPROM registers 20........................................................ 44

Extended MII registers and EEPROM registers 20(continued)...................................... 45

Extended MII registers and EEPROM registers 21........................................................ 46

Extended MII registers and EEPROM registers 22........................................................ 47

Extended MII registers and EEPROM registers 22(continued)...................................... 48

Extended MII registers and EEPROM registers 23........................................................ 49

Extended MII registers and EEPROM registers 23(continued)...................................... 50

Extended MII registers and EEPROM registers 24........................................................ 51

Extended MII registers and EEPROM registers 25........................................................ 52

Extended MII registers and EEPROM registers 26........................................................ 53

Extended MII registers and EEPROM registers 27,28,29,30......................................... 54

Extended MII registers and EEPROM registers 31........................................................ 55

Electrical Characteristics .................................................................................................................. 57

4.1 Absolute Maximum Rating................................................................................................ 57

4.2. DC Characteristic ............................................................................................................ 57

Order Information.............................................................................................................................. 57

Package Detail.................................................................................................................................. 58

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April 9, 2007

IP113M LF-DS-R11

IP113M LF

Preliminary Data Sheet

Revision History

Revision #

Change Description

IP113M LF-DS-R01 Initial release.

IP113M LF-DS-R02

IP113M LF-DS-R03

IP113M LF-DS-R04 Remove

Operation Junction Temperature.

IP113M LF-DS-R05 TP port should be linked at 100M full duplex when working at this mode.

IP113M LF-DS-R06 Update page 42,1

IP113M LF-DS-R07 Add the order information for lead free package.

Update page 50 (Item:31.2 & 31.3)

IP113M LF-DS-R08 Update page 27

Update the default value of following resisters

MII reg3.[5:4], reg4.10, reg6.2, reg16.6, reg18.3, reg18.13, reg22.4, reg22.6,

reg23.13 and

Description of reg26.0

Add explanation to MII reg31.[5:4], reg31.3, reg31.2

IP113M LF-DS-R09 Revise the diagram.

IP113M LF-DS-R10 Modify the IPL : pull-low and IPH : pull-high on page 8.

IP113M LF-DS-R11

Add Power Pin description on Page13

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April 9, 2007

IP113M LF-DS-R11

IP113M LF

Preliminary Data Sheet

Block Diagram

MDC

MDIO

MII registers

SSRAM

PLL/ Clock

Generator

RXIP

RXIM

TXOP

TXOM

10/100M TX

PHY

MII

Two port switch

MII

100M FX

FXSD

FXRDP

FXRDM

FXTDP

FXTDM

SCL

SDA

EEPROM

I/F

Forward Mode

Control

LED

I/F

LED

Remote

Control

Application Diagram

Fiber Module

IP113M LF

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April 9, 2007

IP113M LF-DS-R11