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IR3832WMTRPBF

Switching Voltage Regulators 4A SupIRBuck Reg 250-1500kHz, 1.5-16V

器件类别:电源/电源管理    电源电路   

厂商名称:Infineon(英飞凌)

厂商官网:http://www.infineon.com/

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
Infineon(英飞凌)
包装说明
5 X 6 MM, 0.90 MM HEIGHT, HALOGEN FREE AND ROHS COMPLIANT, PQFN-15
Reach Compliance Code
compliant
ECCN代码
EAR99
其他特性
ALSO OPERATES IN ADJUSTABLE MODE FROM 0.6 TO 14.4V
模拟集成电路 - 其他类型
SWITCHING REGULATOR
控制模式
VOLTAGE-MODE
控制技术
PULSE WIDTH MODULATION
最大输入电压
16 V
最小输入电压
1 V
标称输入电压
12 V
JESD-30 代码
R-XQCC-N15
JESD-609代码
e3
长度
6 mm
湿度敏感等级
2
功能数量
1
端子数量
15
最高工作温度
125 °C
最低工作温度
-40 °C
最大输出电流
4 A
封装主体材料
UNSPECIFIED
封装代码
HQCCN
封装等效代码
LCC15(UNSPEC)
封装形状
RECTANGULAR
封装形式
CHIP CARRIER, HEAT SINK/SLUG
峰值回流温度(摄氏度)
NOT SPECIFIED
认证状态
Not Qualified
座面最大高度
1 mm
表面贴装
YES
切换器配置
BUCK
最大切换频率
1650 kHz
温度等级
AUTOMOTIVE
端子面层
Matte Tin (Sn)
端子形式
NO LEAD
端子位置
QUAD
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
5 mm
文档预览
PD-97508
IR3832WMPbF
SupIRBuck
Features
TM
HIGHLY EFFICIENT INTEGRATED
Description
The IR3832W
SupIRBuck
TM
is an easy-to-use,
fully integrated and highly efficient DC/DC
regulator. The MOSFETS co-packaged with the
on-chip PWM controller make IR3832W a space-
efficient solution, providing accurate power
delivery for DDR memory applications.
IR3832W is configured to generate termination
voltage (VTT) for DDR memory applications.
IR3832W offers programmability of start up time,
switching frequency and current limit while
operating in wide input and output voltage range.
The switching frequency is programmable from
250kHz to 1.5MHz for an optimum solution.
It also features important protection functions,
such as Pre-Bias startup, hiccup current limit and
thermal shutdown to give required system level
security in the event of fault conditions.
SYNCHRONOUS BUCK REGULATOR FOR DDR APPLICATIONS
Wide Input Voltage Range 1.0V to 16V
Wide Output Voltage Range 0.6V to 0.9*Vin
Continuous 4A Load Capability
Integrated Bootstrap-diode
High Bandwidth E/A for excellent transient
performance
Programmable Switching Frequency up to 1.5 MHz
Programmable Over Current Protection
PGood output
Hiccup Current Limit
Programmable Soft-Start
Enable Input with Voltage Monitoring Capability
Enhanced Pre-Bias Start-up
Vp input for DDR Tracking applications
-40
o
C to 125
o
C operating junction temperature
Thermal Protection
5mm x 6mm Power QFN Package, 0.9 mm height
Halogen Free, Lead Free and RoHS Compliant
Applications
Server Applications
Storage Applications
Embedded Telecom Systems
1.0V <Vin<16V
Distributed Point of Load Power Architectures
Netcom Applications
4.5V <Vcc<5.5V
Enable
VDDQ
PGood
PGood
Vp
Rt
Vcc
Vin
Boot
Vo
SW
OCSet
Fb
SS/ SD
Gnd
PGnd
Comp
Fig. 1. Typical application diagram
Rev 6.0
1
PD-97508
IR3832WMPbF
ABSOLUTE MAXIMUM RATINGS
(Voltages referenced to GND unless otherwise specified)
Vin ……………………………………………………. -0.3V to 25V
Vcc ……………….….…………….……..……….…… -0.3V to 8V
(Note2)
Boot
SW
……………………………………..……….…. -0.3V to 33V
…………………………………………..……… -0.3V to 25V(DC), -4V to 25V(AC, 100ns)
……..…………………………….…..….. -0.3V to Vcc+0.3V
(Note1)
Boot to SW
OCSet
………………………………………….……. -0.3V to 30V
……………………………….. ... -0.3V to Vcc+0.3V
(Note1)
Input / output Pins
PGND to GND ……………...………………………….. -0.3V to +0.3V
Storage Temperature Range ................................... -55°C To 150°C
Junction Temperature Range ................................... -40°C To 150°C
(Note2)
ESD Classification …………………………… ……… JEDEC Class 1C
Moisture sensitivity level………………...………………JEDEC Level 2@260 °C
(Note5)
Note1:
Must not exceed 8V
Note2:
Vcc must not exceed 7.5V for Junction Temperature between -10
o
C and -40
o
C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. These are stress ratings only and functional operation of the device at these or any other
conditions beyond those indicated in the operational sections of the specifications are not implied.
PACKAGE INFORMATION
5mm x 6mm POWER QFN
SW
V
IN
12
11
10
PGnd
θ
JA
=
35
o
C / W
θ
J
-
PCB
=
2
o
C / W
Boot
Enable
13
14
1
2
3
15
Gnd
9
8
V
CC
PGood
4
5
6
7
ORDERING INFORMATION
PACKAGE
DESIGNATOR
M
M
Vp
FB COMP Gnd Rt
SS OCSet
PACKAGE
DESCRIPTION
IR3832WMTRPbF
IR3832WMTR1PbF
PIN COUNT
15
15
PARTS PER
REEL
4000
750
2
Rev 6.0
PD-97508
IR3832WMPbF
Block Diagram
Fig. 2. Simplified block diagram of the IR3832W
Rev 6.0
3
PD-97508
IR3832WMPbF
Pin Description
Pin
1
2
3
4
5
Name
Vp
Fb
Comp
Gnd
Rt
Description
Track pin. Use External resistors from VDDQ rail. The Vp voltage can
be set to 0.9V for DDR2 application and 0.75 or 0.6V for DDR3
application.
Inverting input to the error amplifier. This pin is connected directly to the
output of the regulator via resistor divider to set the output voltage and
provide feedback to the error amplifier.
Output of error amplifier. An external resistor and capacitor network is
typically connected from this pin to Fb pin to provide loop
compensation.
Signal ground for internal reference and control circuitry.
Set the switching frequency. Connect an external resistor from this pin
to Gnd to set the switching frequency.
Soft start / shutdown. This pin provides user programmable soft-start
function. Connect an external capacitor from this pin to Gnd to set the
start up time of the output voltage. The converter can be shutdown by
pulling this pin below 0.3V.
Current limit set point. A resistor from this pin to SW pin will set the
current limit threshold.
Power Good status pin. Output is open drain. Connect a pull up resistor
from this pin to Vcc. If unused, it can be left open.
This pin powers the internal IC and drivers. A minimum of 1uF high
frequency capacitor must be connected from this pin to the power
ground (PGnd).
Power Ground. This pin serves as a separated ground for the MOSFET
drivers and should be connected to the system’s power ground plane.
Switch node. This pin is connected to the output inductor.
6
SS/SD
¯¯
7
8
9
10
11
OCSet
PGood
V
CC
PGnd
SW
V
IN
Boot
Enable
Gnd
12
13
14
15
Input voltage connection pin.
Supply voltage for high side driver. Connect a 0.1uF capacitor from this
pin to SW.
Enable pin to turn on and off the device.
Signal ground for internal reference and control circuitry.
Rev 6.0
4
PD-97508
IR3832WMPbF
Recommended Operating Conditions
Symbol
V
in
V
cc
Boot to SW
V
o
I
o
Fs
T
j
Definition
Input Voltage
Supply Voltage
Supply Voltage
Output Voltage
Output Current
Switching Frequency
Junction Temperature
Min
1.0
4.5
4.5
0.6
0
225
-40
Max
16
5.5
5.5
0.90*Vin
4
1650
125
Units
V
A
kHz
o
C
Electrical Specifications
Unless otherwise specified, these specification apply over 4.5V< V
cc
<5.5V, Vp=0.6V, V
in
=12V,
0
o
C<T
j
< 125
o
C. Typical values are specified at T
a
= 25
o
C.
Parameter
Power Loss
Power Loss
P
loss
Vcc=5V, V
in
=12V, V
o
=0.75V, I
o
=4A,
Fs=400kHz, L=1.5uH,
Note4
0.51
W
Symbol
Test Condition
Min
TYP
MAX
Units
MOSFET R
ds(on)
Top Switch
Bottom Switch
R
ds(on)_Top
R
ds(on)_Bot
V
Boot
-V
sw
=5V, I
D
=10A, Tj=
25 C
V
cc
=5V, I
D
=10A, Tj=
25 C
o
o
22.6
15.1
29
20
Supply Current
V
CC
Supply Current (Standby)
V
cc
Supply Current (Dyn)
I
CC(Standby)
I
CC(Dyn)
SS=0V, No Switching, Enable low
SS=3V, Vcc=5V, Fs=500kHz
Enable high
10
500
μA
mA
Under Voltage Lockout
V
CC
-Start-Threshold
V
CC
-Stop-Threshold
Enable-Start-Threshold
Enable-Stop-Threshold
Enable leakage current
V
CC
_UVLO_Start
V
CC
_UVLO_Stop
Enable_UVLO_Start
Enable_UVLO_Stop
Ien
Vcc Rising Trip Level
Vcc Falling Trip Level
Supply ramping up
Supply ramping down
Enable=3.3V
3.95
3.65
1.14
0.9
4.15
3.85
1.2
1.0
4.35
4.05
1.36
1.06
15
μA
V
Rev 6.0
5
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