Dual output, 6A/Phase, Highly Integrated SupIRBuck
®
Single-Input Voltage, Synchronous Buck Regulator
IR3892
FEATURES
Single 5V to 21V application
Wide Input Voltage Range from 1V to 21V with
external Vcc
Output Voltage Range: 0.5V to 0.86*PVin
Dual output, 6A/Phase
Enhanced Line/Load Regulation with Feed-
Forward
Programmable Switching Frequency up to 1.0MHz
Internal Digital Soft-Start
Enable input with Voltage Monitoring Capability
Thermally compensated current limit and Hiccup
Mode Over Current Protection
External synchronization with Smooth Clocking
Precision Reference Voltage (0.5V +/-1%)
Seq pin for Sequencing Applications
Integrated MOSFETs, drivers and Bootstrap diode
Thermal Shut Down
Open Feedback Line Protection
Over Voltage Protection
Interleaved Phases to reduce Input Capacitors
Monotonic Start-Up
Operating Junction Temp: -40
o
C<Tj<125
o
C
Small Size 5mm x 6mm PQFN
Lead-free, Halogen-free, and RoHS Compliant
DESCRIPTION
The IR3892 SupIRBuck
®
is an easy-to-use, fully
integrated and highly efficient DC/DC regulator. The
onboard PWM controller and MOSFETs make IR3892
a space-efficient solution, providing accurate power
delivery for low output voltage.
IR3892 is a versatile regulator which offers
programmability of switching frequency and a fixed
current limit while operating in wide input and output
voltage range.
The switching frequency is programmable from
300kHz to 1.0MHz for an optimum solution.
It also features important protection functions,
Over Voltage Protection (OVP), Pre-Bias
hiccup current limit and thermal shutdown
required system level security in the event
conditions.
such as
startup,
to give
of fault
APPLICATIONS
Sever Applications
Netcom Applications
Set Top Box Applications
Storage Applications
Embedded telecom Systems
Distributed Point of Load Power Architectures
Computing Peripheral Voltage regulators
General DC-DC Converters
ORDERING INFORMATION
Base Part
Number
IR3892
IR3892
Package Type
PQFN 5mm x 6mm
PQFN 5mm x 6mm
Standard Pack
Orderable Part
Number
IR3892MTR1PBF
IR3892MTRPBF
750
4000
Form
Tape and Reel
Tape and Reel
Quantity
1
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© 2013 International Rectifier
August 02, 2013
IR3892
BASIC APPLICATION
Figure 1: IR3892 Basic Application Circuit
Figure 2: Efficiency [Vin=12V, Fsw=600kHz]
PIN DIAGRAM
5mm X 6mm POWER QFN
Top View
22
PGnd1 23
PGnd1 24
PGnd1 25
PVin1 26
PVin1 27
Boot1 28
PGood1 29
Comp1 30
FB1 31
SW1
SW2
21
20
19
18 PGnd2
17 PGnd2
16 PGnd2
15 PVin2
14 PVin2
13 Boot2
12 PGood2
11 Comp2
10 FB2
1
2
3
4
5
6
7
8
9
2
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© 2013 International Rectifier
August 02, 2013
IR3892
FUNCTIONAL BLOCK DIAGRAM
Vin
-
+
V
LDO_REF
-
Gnd
Comp
Seq*
VREF
-
+
VCC/LDO_out
UVLO
VCC
THERMAL TSD
SHUTDOWN
OV/OFLP
POR
OC
UVLO
Boot
LDO
FAULT
CONTROL
FAULT
PVin
+
+
+ E/A
-
fb
+
FB
HDin
FAULT
LDin
GATE
DRIVE
LOGIC
HDrv
SW
VCC
LDrv
PGnd
Intl_SS
FAULT
POR
Vin
SSOK
VREF
POR
CONTROL
LOGIC
Rff
SOFT
START
UVEN
POR
EN
UVEN
UVLO
VREF
FB
OC
OVER CURRENT
PROTECTION
UV/
OV/OLFP
UV/
OV/OLFP
Rt/Sync
Vsns
PGood
*The Seq pin is only available for channel 2
Figure 3: IR3892 Simplified Block Diagram (one phase)
3
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© 2013 International Rectifier
August 02, 2013
IR3892
PIN DESCRIPTIONS
PIN #
1, 9
2, 8
3
4
5
6
PIN NAME
Vsns 1/2
EN 1/2
Vin
VCC/LDO_out
GND
Seq
PIN DESCRIPTION
Sense pins for over-voltage protection and PGood. A resistor divider
with the same ratio as the respective feedback resistor divider should be
connected between each Vsns pin and its respective Vout.
Enable pins for turning on and off the regulator.
Input voltage for Internal LDO. A 1.0µF capacitor should be connected
between this pin and PGnd. If external supply is connected to VCC pin,
this pin should be shorted to VCC pin.
Input Bias Voltage, output of the internal LDO. Place a minimum 2.2µF
cap from this pin to PGnd.
Signal ground for internal reference and control circuitry.
Input to error amplifier for sequencing purposes. Can be left floating for
non-sequencing applications. It is only connected to the Error-Amplifier
of channel 2.
Multi-function pin to set switching frequency. Use an external resistor
from this pin to Gnd to set the free-running switching frequency. Or use
an external clock signal to connect to this pin through a diode, the
device’s switching frequency is synchronized with the external clock.
Inverting inputs to the error amplifiers. These pins are connected directly
to the outputs of the regulator via resistor dividers to set the output
voltages and provide feedback to the error amplifiers.
Output of the error amplifiers. External resistor and capacitor networks
are typically connected from these pins to its respective Fb pin to provide
loop compensation.
Power Good status pins are open drain outputs. The pins are typically
connected to VCC via pull up resistors.
Supply voltages for high side drivers, 100nF capacitors should be
connected between these pins and their respective SW pin.
Input voltage for power stage.
Power Ground. These pins serve as a separated ground for the
MOSFET drivers and should be connected to the system’s power ground
plane.
Switch nodes. These pins are connected to the output inductors.
7
Rt/Sync
10, 31
FB 2/1
11, 30
12, 29
13, 28
14, 15, 26,
27
16, 17, 18,
23, 24, 25
19, 20, 21,
22
Comp 2/1
PGood 2/1
Boot 2/1
PVin 2/1
PGnd 2/1
SW 2/1
4
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© 2013 International Rectifier
August 02, 2013
IR3892
ABSOLUTE MAXIMUM RATINGS
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are
stress ratings only and functional operation of the device at these or any other conditions beyond those indicated in the
operational sections of the specifications are not implied.
PVin
Vin
VCC
SW
BOOT
BOOT to SW
EN, PGood
Other Input/Output pins
PGnd to GND
Junction Temperature Range
Storage Temperature Range
Machine Model
ESD
Moisture Sensitivity level
RoHS Compliant
Human Body Model
Charged Device Model
-0.3V to 25V
-0.3V to 25V
-0.3V to 8V (Note 1)
-0.3V to 25V (DC), -4V to 25V (AC, 100ns)
-0.3V to 33V
-0.3V to VCC + 0.3V (Note 2)
-0.3V to VCC + 0.3V (Note 2)
-0.3V to 3.9V
-0.3V to + 0.3V
-40°C to 150°C
-55°C to 150°C
Class A
Class 1C
Class III
JEDEC Level 2 @ 260°C
Yes
Note:
1. VCC must not exceed 7.5V for Junction Temperature between -10°C and -40°C.
2. Must not exceed 8V.
THERMAL INFORMATION
Thermal Resistance, Junction to Case Top (θ
JC_TOP
)
Thermal Resistance, Junction to PCB (θ
JB
)
Thermal Resistance, Junction to Ambient (θ
JA
) (Note 3)
36 °C/W
3.6 °C/W
24.7 °C/W
Note:
3. Thermal resistance (θ
JA
) is measured with components mounted on a high effective thermal conductivity
test board in free air.
5
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© 2013 International Rectifier
August 02, 2013
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