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IS61LV25616AL-10BLI-TR

Standard SRAM, 256KX16, 10ns, CMOS, PBGA48

器件类别:存储   

厂商名称:Integrated Silicon Solution ( ISSI )

器件标准:

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器件参数
参数名称
属性值
是否Rohs认证
符合
厂商名称
Integrated Silicon Solution ( ISSI )
包装说明
FBGA, BGA48,6X8,30
Reach Compliance Code
compliant
Factory Lead Time
8 weeks
最长访问时间
10 ns
I/O 类型
COMMON
JESD-30 代码
R-PBGA-B48
内存密度
4194304 bit
内存集成电路类型
STANDARD SRAM
内存宽度
16
端子数量
48
字数
262144 words
字数代码
256000
工作模式
ASYNCHRONOUS
最高工作温度
85 °C
最低工作温度
-40 °C
组织
256KX16
输出特性
3-STATE
封装主体材料
PLASTIC/EPOXY
封装代码
FBGA
封装等效代码
BGA48,6X8,30
封装形状
RECTANGULAR
封装形式
GRID ARRAY, FINE PITCH
并行/串行
PARALLEL
电源
3.3 V
认证状态
Not Qualified
最大待机电流
0.015 A
最小待机电流
2 V
最大压摆率
0.1 mA
标称供电电压 (Vsup)
3.3 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子形式
BALL
端子节距
0.75 mm
端子位置
BOTTOM
Base Number Matches
1
文档预览
IS61LV25616AL
256K x 16 HIGH SPEED ASYNCHRONOUS
CMOS STATIC RAM WITH 3.3V SUPPLY
FEATURES
• High-speed access time:
— 10, 12 ns
• CMOS low power operation
• Low stand-by power:
— Less than 5 m
A
(typ.) CMOS stand-by
• TTL compatible interface levels
• Single 3.3V power supply
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• Industrial temperature available
• Lead-free available
DECEMBER 2011
static RAM organized as 262,144 words by 16 bits. It is
fabricated using
ISSI
's high-performance CMOS technol-
ogy. This highly reliable process coupled with innovative
circuit design techniques, yields high-performance and low
power consumption devices.
When
CE
is HIGH (deselected), the device assumes a
standby mode at which the power dissipation can be re-
duced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs, CE and OE. The active LOW
Write Enable (WE) controls both writing and reading of the
memory. A data byte allows Upper Byte (UB) and Lower
Byte (LB) access.
The IS61LV25616AL is packaged in the JEDEC standard
44-pin 400-mil SOJ, 44-pin TSOP Type II, 44-pin LQFP
and 48-pin Mini BGA (8mm x 10mm).
DESCRIPTION
The
ISSI
IS61LV25616AL is a high-speed, 4,194,304-bit
FUNCTIONAL BLOCK DIAGRAM
A0-A17
DECODER
256K x 16
MEMORY ARRAY
VDD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CE
OE
WE
UB
LB
CONTROL
CIRCUIT
Copyright © 2011 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. F
12/15/2011
1
IS61LV25616AL
TRUTH TABLE
Mode
Not Selected
Output Disabled
Read
Write
WE
X
H
X
H
H
H
L
L
L
CE
H
L
L
L
L
L
L
L
L
OE
X
H
X
L
L
L
X
X
X
LB
X
X
H
L
H
L
L
H
L
UB
X
X
H
H
L
L
H
L
L
I/O PIN
I/O0-I/O7
I/O8-I/O15
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
D
out
High-Z
High-Z
D
out
D
out
D
out
D
In
High-Z
D
In
High-Z
D
In
D
In
V
DD
Current
I
sb
1
, I
sb
2
I
cc
I
cc
I
cc
PIN CONFIGURATIONS
44-Pin TSOP (Type II) and SOJ
PIN DESCRIPTIONS
A0-A17
I/O0-I/O15
CE
OE
WE
LB
UB
NC
V
DD
GND
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
Power
Ground
A0
A1
A2
A3
A4
CE
I/O0
I/O1
I/O2
I/O3
VDD
GND
I/O4
I/O5
I/O6
I/O7
WE
A5
A6
A7
A8
A9
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A17
A16
A15
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
VDD
I/O11
I/O10
I/O9
I/O8
NC
A14
A13
A12
A11
A10
2
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. F
12/15/2011
IS61LV25616AL
PIN CONFIGURATIONS
44-Pin LQFP
48-Pin mini BGA
1
2
3
4
5
6
CE
I/O0
I/O1
I/O2
I/O3
VDD
GND
I/O4
I/O5
I/O6
I/O7
44 43 42 41 40 39 38 37 36 35 34
33
1
32
2
31
3
30
4
29
5
TOP VIEW
28
6
27
7
26
8
25
9
24
10
23
11
12 13 14 15 16 17 18 19 20 21 22
WE
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A17
A16
A15
A14
A13
A12
A11
A10
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
VDD
I/O11
I/O10
I/O9
I/O8
NC
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
GND
V
DD
I/O
14
I/O
15
NC
OE
UB
I/O
10
I/O
11
I/O
12
I/O
13
NC
A8
A0
A3
A5
A17
NC
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
CE
I/O
1
I/O
3
I/O
4
I/O
5
WE
A11
N/C
I/O
0
I/O
2
V
DD
GND
I/O
6
I/O
7
NC
PIN DESCRIPTIONS
A0-A17
I/O0-I/O15
CE
OE
WE
LB
UB
NC
V
DD
GND
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
Power
Ground
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. F
12/15/2011
3
IS61LV25616AL
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
term
t
stg
P
t
Parameter
Terminal Voltage with Respect to GND
Storage Temperature
Power Dissipation
Value
–0.5 to V
DD
+0.5
–65 to +150
1.0
Unit
V
°C
W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
OPERATING RANGE
V
DD
Range
Commercial
Industrial
Ambient Temperature
0°C to +70°C
–40°C to +85°C
10ns
3.3V +10%, -5%
3.3V +10%, -5%
12ns
3.3V + 10%
3.3V + 10%
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol
V
oH
V
oL
V
IH
V
IL
I
LI
I
Lo
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
Test Conditions
V
DD
=
Min., I
oH
=
–4.0 mA
V
DD
=
Min., I
oL
=
8.0 mA
GND ≤ V
In
V
DD
GND ≤ V
out
V
DD
Outputs Disabled
Com.
Ind.
Com.
Ind.
Min.
2.4
2.0
–0.3
–2
–5
–2
–5
Max.
0.4
V
DD
+ 0.3
0.8
2
5
2
5
Unit
V
V
V
V
µA
µA
Notes:
1.
V
IL
(min.) = –2.0V for pulse width less than 10 ns.
4
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. F
12/15/2011
IS61LV25616AL
POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
I
cc
I
sb
Parameter
V
DD
Dynamic Operating
Supply Current
TTL Standby Current
(TTL Inputs)
TTL Standby Current
(TTL Inputs)
CMOS Standby
Current (CMOS Inputs)
Test Conditions
V
DD
=
Max.,
Com.
I
out
= 0
mA, f = f
maX
Ind.
V
DD
=
Max.,
Com.
V
In
= V
IH
or V
IL
Ind.
CE ≥ V
IH
, f = f
maX
.
V
DD
=
Max.,
Com.
V
In
= V
IH
or V
IL
Ind.
CE ≥ V
IH
, f = 0
V
DD
=
Max.,
CE ≥ V
DD
– 0.2V,
V
In
V
DD
– 0.2V,
or
V
In
0.2V,
f = 0
Com.
Ind.
-10
Min. Max.
— 100
— 110
50
— 55
20
25
15
20
-12
Min. Max.
— 90
— 100
45
— 50
20
25
15
20
Unit
mA
mA
I
sb
1
I
sb
2
mA
mA
Note:
1. At f = f
maX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
Shaded area product in development
CAPACITANCE
(1)
Symbol
c
In
c
out
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
In
= 0V
V
out
= 0V
Max.
6
8
Unit
pF
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. F
12/15/2011
5
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