notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be ex-
pected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless Integrated Silicon
Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com
Rev. D1
3/10/2015
1
IS62WV25616DALL/DBLL, IS65WV25616DBLL
PIN CONFIGURATIONS
48- ball mini BGA (6mm x 8mm)
(Package Code B)
1
2
3
4
5
6
44-Pin mini TSOP (Type II)
(Package Code T)
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
GND
VDD
I/O
14
I/O
15
NC
OE
UB
I/O
10
I/O
11
I/O
12
I/O
13
NC
A8
A0
A3
A5
A17
NC
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
CSI
I/O
1
I/O
3
I/O
4
I/O
5
WE
A11
NC
I/O
0
I/O
2
VDD
GND
I/O
6
I/O
7
NC
A4
A3
A2
A1
A0
CS1
I/O0
I/O1
I/O2
I/O3
V
DD
GND
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
V
DD
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
A17
48-Pin mini BGA (6mm x 8mm)*
2 CS Option (Package Code B2)
1
2
3
4
5
6
PIN DESCRIPTIONS
A0-A17
I/O0-I/O15
CS1,
CS2
OE
WE
LB
UB
NC
V
dd
GND
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
Power
Ground
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
GND
VDD
I/O
14
I/O
15
NC
OE
UB
I/O
10
I/O
11
I/O
12
I/O
13
NC
A8
A0
A3
A5
A17
NC
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
CS1
I/O
1
I/O
3
I/O
4
I/O
5
WE
A11
CS2
I/O
0
I/O
2
VDD
GND
I/O
6
I/O
7
NC
*Available upon request
2
Integrated Silicon Solution, Inc. — www.issi.com
Rev. D1
3/10/2015
IS62WV25616DALL/DBLL, IS65WV25616DBLL
TRUTH TABLE
Mode
Not Selected
Output Disabled
Read
Write
WE
X
X
X
H
H
H
H
H
L
L
L
CS1
H
X
X
L
L
L
L
L
L
L
L
CS2
X
L
X
H
H
H
H
H
H
H
H
OE
X
X
X
H
H
L
L
L
X
X
X
LB
X
X
H
L
X
L
H
L
L
H
L
UB
X
X
H
X
L
H
L
L
H
L
L
I/O PIN
I/O0-I/O7
I/O8-I/O15
High-Z
High-Z
High-Z
High-Z
High-Z
d
Out
High-Z
d
Out
d
in
High-Z
d
in
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
d
Out
d
Out
High-Z
d
in
d
in
V
DD
Current
i
sb
1
, i
sb
2
i
sb
1
, i
sb
2
i
sb
1
, i
sb
2
i
CC
i
CC
i
CC
i
CC
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
term
V
dd
t
stg
P
t
Parameter
Terminal Voltage with Respect to GND
V
dd
Relates to GND
Storage Temperature
Power Dissipation
Value
–0.5 to V
dd
+ 0.5
–0.3 to 4.0
–65 to +150
1.0
Unit
V
V
°C
W
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
CAPACITANCE
(1,2)
Symbol
C
in
C
i/O
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
in
= 0V
V
Out
= 0V
Max.
6
8
Unit
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
a
= 25°C,
f = 1 MHz, V
dd
= 3.3V.
Integrated Silicon Solution, Inc. — www.issi.com
Rev. D1
3/10/2015
3
IS62WV25616DALL/DBLL, IS65WV25616DBLL
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level (V
Ref
)
Output Load
R1 (
Ω
)
R2 (
Ω
)
V
tm
(V)
Unit
(2.3V-3.6V)
0.4V to V
dd
- 0.3V
1V/ ns
VDD /2
See Figures 1 and 2
1005
820
3.0V
Unit
(3.3V + 5%)
0.4V to V
dd
- 0.3V
1V/ ns
VDD + 0.05
2
See Figures 1 and 2
1213
1378
3.3V
Unit
(1.65V-2.2V)
0.4V to V
dd
- 0.3V
1V/ ns
0.9V
See Figures 1 and 2
13500
10800
1.8V
AC TEST LOADS
R1
VTM
OUTPUT
30 pF
Including
jig and
scope
R2
R1
VTM
OUTPUT
5 pF
Including
jig and
scope
R2
Figure 1.
Figure 2.
4
Integrated Silicon Solution, Inc. — www.issi.com
Rev. D1
3/10/2015
IS62WV25616DALL/DBLL, IS65WV25616DBLL
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
V
DD
= 3.3V + 5%
Symbol
V
OH
V
OL
V
iH
V
iL
i
Li
i
LO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
Test Conditions
V
dd
=
Min., i
OH
=
–1 mA
V
dd
=
Min., i
OL
=
2.1 mA
GND ≤
V
in
≤
V
dd
GND
≤
V
Out
≤
V
dd
,
Outputs Disabled
Min.
2.4
—
2
–0.3
–1
–1
Max.
—
0.4
V
dd
+ 0.3
0.8
1
1
Unit
V
V
V
V
µA
µA
Note:
1.
V
iL
(min.) = –0.3V
DC; V
iL
(min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
V
iH
(max.) = V
dd
+
0.3V dC; V
iH
(max.) = V
dd
+
2.0V aC (pulse width < 10 ns). Not 100% tested.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
V
DD
= 2.3V-3.6V
Symbol
V
OH
V
OL
V
iH
V
iL
i
Li
i
LO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
(1)
Input Leakage
Output Leakage
Test Conditions
V
dd
=
Min., i
OH
=
–1.0 mA
V
dd
=
Min., i
OL
=
2.1 mA
GND ≤
V
in
≤
V
dd
GND
≤
V
Out
≤
V
dd
,
Outputs Disabled
Min.
1.8
—
2.0
–0.3
–1
–1
Max.
—
0.4
V
dd
+ 0.3
0.8
1
1
Unit
V
V
V
V
µA
µA
Note:
1.
V
iL
(min.) = –0.3V
DC; V
iL
(min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
V
iH
(max.) = V
dd
+
0.3V dC; V
iH
(max.) = V
dd
+
2.0V aC (pulse width < 10 ns). Not 100% tested.
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
V
DD
= 1.65V-2.2V
Symbol
V
OH
V
OL
V
iH
V
iL
(1)
i
Li
i
LO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Output Leakage
Test Conditions
i
OH
=
-0.1 mA
i
OL
=
0.1 mA
V
DD
1.65-2.2V
1.65-2.2V
1.65-2.2V
1.65-2.2V
Min.
1.4
—
1.4
–0.2
–1
–1
Max.
—
0.2
V
dd
+ 0.2
0.4
1
1
Unit
V
V
V
V
µA
µA
GND ≤
V
in
≤
V
dd
GND
≤
V
Out
≤
V
dd
,
Outputs Disabled
Note:
1.
V
iL
(min.) = –0.3V
DC; V
iL
(min.) = –2.0V AC (pulse width < 10 ns). Not 100% tested.
