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IS62WV5128DBLL-45BI-TR

IC SRAM 4M PARALLEL 36MINIBGA

器件类别:存储   

厂商名称:ISSI(芯成半导体)

厂商官网:http://www.issi.com/

器件标准:

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器件参数
参数名称
属性值
存储器类型
易失
存储器格式
SRAM
技术
SRAM - 异步
存储容量
4Mb (512K x 8)
写周期时间 - 字,页
45ns
访问时间
45ns
存储器接口
并联
电压 - 电源
2.3 V ~ 3.6 V
工作温度
-40°C ~ 85°C(TA)
安装类型
表面贴装
封装/外壳
36-TFBGA
供应商器件封装
36-迷你型BGA(8x10)
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IS62WV5128DALL/DBLL
IS65WV5128DALL/DBLL
512K x 8 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
• High-speed access time: 35, 45, 55 ns
• CMOS low power operation
36 mW (typical) operating
9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply
1.65V – 2.2V V
dd
(IS62WV5128dALL)
2.3V – 3.6V V
dd
(IS62WV5128dBLL)
• Fully static operation: no clock or refresh
required
• Three state outputs
• Industrial and Automotive temperature support
• Lead-free available
®
Long-term Support
World Class Quality
NOVEMBER 2016
DESCRIPTION
The
ISSI
IS62WV5128DALL / IS62WV5128DBLL are
high-speed, 4M bit static RAMs organized as 512K words
by 8 bits. It is fabricated using
ISSI
's high-performance
CMOS technology. This highly reliable process coupled
with innovative circuit design techniques, yields high-
performance and low power consumption devices.
When
CS1
is HIGH (deselected) the device assumes
a standby mode at which the power dissipation can be
reduced down with CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE)
controls both writing and reading of the memory.
The IS62WV5128DALL and IS62WV5128DBLL are
packaged in the JEDEC standard 32-pin TSOP (TYPE
I), 32-pin sTSOP (TYPE I), 32-pin TSOP (Type II), 32-pin
SOP and 36-pin mini BGA.
FUNCTIONAL BLOCK DIAGRAM
A0-A18
DECODER
512K x 8
MEMORY ARRAY
V
DD
GND
I/O
DATA
CIRCUIT
I/O0-I/O7
COLUMN I/O
CS1
OE
WE
CONTROL
CIRCUIT
Copyright © 2016 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without
notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the lat-
est version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reason-
ably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications
unless Integrated Silicon Solution, Inc. receives written assurance to its satisfaction, that:
a.) the risk of injury or damage has been minimized;
b.) the user assume all such risks; and
c.) potential liability of Integrated Silicon Solution, Inc is adequately protected under the circumstances
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A1
11/1/2016
1
IS62WV5128DALL/DBLL
IS65WV5128DALL/DBLL
®
Long-term Support
World Class Quality
PIN DESCRIPTIONS
A0-A18
CS1
OE
WE
I/O0-I/O7
NC
V
dd
GND
Address Inputs
Chip Enable 1 Input
Output Enable Input
Write Enable Input
Input/Output
No Connection
Power
Ground
36-pin mini BGA (B) (6mm x 8mm)
(Package Code B)
1
2
3
4
5
6
A
B
C
D
E
F
G
H
A0
I/O4
I/O5
GND
VDD
I/O6
I/O7
A9
A1
A2
NC
WE
NC
A3
A4
A5
A6
A7
A8
I/O0
I/O1
VDD
GND
A18
OE
A10
CS1
A11
A17
A16
A12
A15
A13
I/O2
I/O3
A14
2
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A1
11/01/2016
IS62WV5128DALL/DBLL
IS65WV5128DALL/DBLL
PIN DESCRIPTIONS
A0-A18 Address Inputs
CS1
Chip Enable 1 Input
OE
Output Enable Input
WE
Write Enable Input
I/O0-I/O7 Input/Output
V
dd
Power
GND
Ground
®
Long-term Support
World Class Quality
PIN CONFIGURATION
32-pin TSOP (TYPE I), (Package Code T)
32-pin sTSOP (TYPE I) (Package Code H)
32-pin SOP (Package Code Q)
32-pin TSOP (TYPE II) (Package Code T2)
A11
A9
A8
A13
WE
A18
A15
V
DD
A17
A16
A14
A12
A7
A6
A5
A4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
OE
A10
CS1
I/O7
I/O6
I/O5
I/O4
I/O3
GND
I/O2
I/O1
I/O0
A0
A1
A2
A3
A17
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
DD
A15
A18
WE
A13
A8
A9
A11
OE
A10
CS1
I/O7
I/O6
I/O5
I/O4
I/O3
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A1
11/01/2016
3
IS62WV5128DALL/DBLL
IS65WV5128DALL/DBLL
TRUTH TABLE
Mode
Not Selected
(Power-down)
Output Disabled
Read
Write
WE
X
H
H
L
CS1
H
L
L
L
OE
X
H
L
X
I/O Operation
High-Z
High-Z
d
Out
d
In
®
Long-term Support
World Class Quality
V
DD
Current
I
SB
1
, I
SB
2
I
CC
I
CC
I
CC
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
term
V
dd
t
Stg
P
t
Parameter
Terminal Voltage with Respect to GND
V
dd
Relates to GND
Storage Temperature
Power Dissipation
Value
–0.5 to V
dd
+ 0.5
–0.3 to 4.0
–65 to +150
1.0
Unit
V
V
°C
W
Notes:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operational sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
CAPACITANCE
(1,2)
Symbol
C
In
C
I/O
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
In
= 0V
V
Out
= 0V
Max.
6
8
Unit
pF
pF
Notes:
1. Tested initially and after any design or process changes that may affect these parameters.
2. Test conditions: T
A
= 25°C,
f = 1 MHz, V
dd
= 3.3V.
4 Integrated
Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A1
11/01/2016
IS62WV5128DALL/DBLL
IS65WV5128DALL/DBLL
AC TEST CONDITIONS
Parameter
Input Pulse Level
Input Rise and Fall Times
Input and Output Timing
and Reference Level (V
Ref
)
Output Load
Unit
(2.3V-3.6V)
0.4V to V
dd
- 0.3V
1V/ ns
VDD /2
See Figures 1 and 2
1005
820
3.0V
Unit
(3.3V + 5%)
0.4V to V
dd
- 0.3V
1V/ ns
VDD + 0.05
2
See Figures 1 and 2
1213
1378
3.3V
®
Long-term Support
World Class Quality
Unit
(1.65V-2.2V)
0.4V to V
dd
- 0.3V
1V/ ns
0.9V
See Figures 1 and 2
13500
10800
1.8V
R1 (
)
R2 (
)
V
tm
(V)
AC TEST LOADS
R1
VTM
OUTPUT
30 pF
Including
jig and
scope
R2
R1
VTM
OUTPUT
5 pF
Including
jig and
scope
R2
Figure 1.
Figure 2.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. A1
11/01/2016
5
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