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IS65WV12816BLL-70BA

Standard SRAM, 128KX16, 70ns, CMOS, PBGA48, 6 X 8 MM, MINI, BGA-48

器件类别:存储    存储   

厂商名称:Integrated Silicon Solution ( ISSI )

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器件参数
参数名称
属性值
是否无铅
含铅
是否Rohs认证
不符合
厂商名称
Integrated Silicon Solution ( ISSI )
零件包装代码
BGA
包装说明
TFBGA, BGA48,6X8,30
针数
48
Reach Compliance Code
compliant
ECCN代码
3A991.B.2.A
最长访问时间
70 ns
I/O 类型
COMMON
JESD-30 代码
R-PBGA-B48
JESD-609代码
e0
长度
8 mm
内存密度
2097152 bit
内存集成电路类型
STANDARD SRAM
内存宽度
16
湿度敏感等级
3
功能数量
1
端子数量
48
字数
131072 words
字数代码
128000
工作模式
ASYNCHRONOUS
最高工作温度
70 °C
最低工作温度
组织
128KX16
输出特性
3-STATE
封装主体材料
PLASTIC/EPOXY
封装代码
TFBGA
封装等效代码
BGA48,6X8,30
封装形状
RECTANGULAR
封装形式
GRID ARRAY, THIN PROFILE, FINE PITCH
并行/串行
PARALLEL
峰值回流温度(摄氏度)
NOT SPECIFIED
电源
2.5/3.3 V
认证状态
Not Qualified
座面最大高度
1.2 mm
最大待机电流
0.000015 A
最小待机电流
1.2 V
最大压摆率
0.02 mA
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
2.5 V
标称供电电压 (Vsup)
3 V
表面贴装
YES
技术
CMOS
温度等级
COMMERCIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
BALL
端子节距
0.75 mm
端子位置
BOTTOM
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
6 mm
Base Number Matches
1
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IS65WV12816ALL
IS65WV12816BLL
128K x 16 LOW VOLTAGE,
ULTRA LOW POWER CMOS STATIC RAM
FEATURES
• High-speed access time: 55ns, 70ns
• CMOS low power operation:
36 mW (typical) operating
9 µW (typical) CMOS standby
• TTL compatible interface levels
• Single power supply:
1.65V to 2.2V V
DD
(65WV12816ALL)
2.5V to 3.6V V
DD
(65WV12816BLL)
• Fully static operation: no clock or refresh
required
• Three state outputs
• Data control for upper and lower bytes
• 2CS Option Available
• Temperature Offerings:
Option A: 0 to 70
o
C
Option A1: –40 to +85 C
o
ISSI
Option A2: –40 to +105
o
C
Option A3: –40 to +125
o
C
®
PRELIMINARY INFORMATION
FEBRUARY 2003
DESCRIPTION
The
ISSI
IS65WV12816ALL/ IS65WV12816BLL are high-
speed, 2M bit static RAMs organized as 128K words by 16
bits. It is fabricated using
ISSI
's high-performance CMOS
technology. This highly reliable process coupled with
innovative circuit design techniques, yields high-
performance and low power consumption devices.
When
CS1
is HIGH (deselected) or when CS2 is LOW
(deselected) or when
CS1
is LOW, CS2 is HIGH and both
LB
and
UB
are HIGH, the device assumes a standby mode
at which the power dissipation can be reduced down with
CMOS input levels.
Easy memory expansion is provided by using Chip Enable
and Output Enable inputs. The active LOW Write Enable
(WE)
controls both writing and reading of the memory. A
data byte allows Upper Byte
(UB)
and Lower Byte (LB)
access.
The IS65WV12816ALL and IS65WV12816BLL are packged
in the JEDEC standard 48-pin mini BGA (6mm x 8mm) and
44-Pin TSOP (TYPE II).
FUNCTIONAL BLOCK DIAGRAM
A0-A16
DECODER
128K x 16
MEMORY ARRAY
V
DD
GND
I/O0-I/O7
Lower Byte
I/O8-I/O15
Upper Byte
I/O
DATA
CIRCUIT
COLUMN I/O
CS2
CS1
OE
WE
UB
LB
CONTROL
CIRCUIT
Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. 00D
02/05/03
1
IS65WV12816ALL, IS65WV12816BLL
PIN CONFIGURATIONS
48-Pin mini BGA (6mm x 8mm)
(Package Code B)
1
2
3
4
5
6
ISSI
48-Pin mini BGA (6mm x 8mm)
2 CS Option (Package Code B2)
1
2
3
4
5
6
®
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
GND
V
DD
I/O
14
I/O
15
NC
OE
UB
I/O
10
I/O
11
I/O
12
I/O
13
NC
A8
A0
A3
A5
NC
NC
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
CSI
I/O
1
I/O
3
I/O
4
I/O
5
WE
A11
N/C
I/O
0
I/O
2
V
DD
GND
I/O
6
I/O
7
NC
A
B
C
D
E
F
G
H
LB
I/O
8
I/O
9
GND
V
DD
I/O
14
I/O
15
NC
OE
UB
I/O
10
I/O
11
I/O
12
I/O
13
NC
A8
A0
A3
A5
NC
NC
A14
A12
A9
A1
A4
A6
A7
A16
A15
A13
A10
A2
CS1
I/O
1
I/O
3
I/O
4
I/O
5
WE
A11
CS2
I/O
0
I/O
2
V
DD
GND
I/O
6
I/O
7
NC
44-Pin mini TSOP (Type II)
(Package Code T)
PIN DESCRIPTIONS
A0-A16
I/O0-I/O15
CS1,
CS2
OE
WE
LB
UB
NC
V
DD
GND
Address Inputs
Data Inputs/Outputs
Chip Enable Input
Output Enable Input
Write Enable Input
Lower-byte Control (I/O0-I/O7)
Upper-byte Control (I/O8-I/O15)
No Connection
Power
Ground
A4
A3
A2
A1
A0
CS1
I/O0
I/O1
I/O2
I/O3
V
DD
GND
I/O4
I/O5
I/O6
I/O7
WE
A16
A15
A14
A13
A12
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A5
A6
A7
OE
UB
LB
I/O15
I/O14
I/O13
I/O12
GND
V
DD
I/O11
I/O10
I/O9
I/O8
NC
A8
A9
A10
A11
NC
2
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. 00D
02/05/03
IS65WV12816ALL, IS65WV12816BLL
TRUTH TABLE
Mode
Not Selected
WE
X
X
X
H
H
H
H
H
L
L
L
CS1
H
X
X
L
L
L
L
L
L
L
L
CS2
X
L
X
H
H
H
H
H
H
H
H
OE
X
X
X
H
H
L
L
L
X
X
X
LB
X
X
H
L
X
L
H
L
L
H
L
UB
X
X
H
X
L
H
L
L
H
L
L
I/O PIN
I/O0-I/O7
I/O8-I/O15
High-Z
High-Z
High-Z
High-Z
High-Z
D
OUT
High-Z
D
OUT
D
IN
High-Z
D
IN
High-Z
High-Z
High-Z
High-Z
High-Z
High-Z
D
OUT
D
OUT
High-Z
D
IN
D
IN
ISSI
Vdd Current
I
SB
1
, I
SB
2
I
SB
1
, I
SB
2
I
SB
1
, I
SB
2
I
CC
I
CC
I
CC
®
Output Disabled
Read
Write
I
CC
ABSOLUTE MAXIMUM RATINGS
(1)
Symbol
V
TERM
T
STG
P
T
Parameter
Terminal Voltage with Respect to GND
Storage Temperature
Power Dissipation
Value
–0.2 to V
DD
+0.3
–65 to +150
1.0
Unit
V
°C
W
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
reliability.
OPERATING RANGE (V
DD
)
Option
A
A1
A2
A3
Ambient Temperature
0°C to +70°C
–40°C to +85°C
–40°C to +105°C
–40°C to +125°C
IS65WV12816ALL
1.65V - 2.2V
1.65V - 2.2V
1.65V - 2.2V
1.65V - 2.2V
IS65WV12816BLL
2.5V - 3.6V
2.5V - 3.6V
2.5V - 3.6V
2.5V - 3.6V
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. 00D
02/05/03
3
IS65WV12816ALL, IS65WV12816BLL
DC ELECTRICAL CHARACTERISTICS
(Over Operating Range)
Symbol
V
OH
V
OL
V
IH
V
IL(1)
I
LI
I
LO
Parameter
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage
Output Leakage
GND
V
IN
V
DD
GND
V
OUT
V
DD
, Outputs Disabled
Test Conditions
I
OH
= -0.1 mA
I
OH
= -1 mA
I
OL
= 0.1 mA
I
OL
= 2.1 mA
Vdd
1.65-2.2V
2.5-3.6V
1.65-2.2V
2.5-3.6V
1.65-2.2V
2.5-3.6V
1.65-2.2V
2.5-3.6V
Min.
1.4
2.2
1.4
2.2
–0.2
–0.2
–1
–1
ISSI
Max.
0.2
0.4
V
DD
+ 0.2
V
DD
+ 0.3
0.4
0.6
1
1
Unit
V
V
V
V
V
V
V
V
µA
µA
®
Notes:
1. V
IL
(min.) = –1.0V for pulse width less than 10 ns.
CAPACITANCE
(1)
Symbol
C
IN
C
OUT
Parameter
Input Capacitance
Input/Output Capacitance
Conditions
V
IN
= 0V
V
OUT
= 0V
Max.
8
10
Unit
pF
pF
Note:
1. Tested initially and after any design or process changes that may affect these parameters.
4
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. 00D
02/05/03
IS65WV12816ALL, IS65WV12816BLL
IS65WV12816ALL, POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
I
CC
I
CC
1
I
SB
1
Parameter
Vdd Dynamic Operating
Supply Current
Operating Supply
Current
TTL Standby Current
(TTL Inputs)
Test Conditions
V
DD
= Max.,
I
OUT
= 0 mA, f = f
MAX
V
DD
= Max.,
I
OUT
= 0 mA, f = 0
V
DD
= Max.,
V
IN
= V
IH
or V
IL
CS1
= V
IH
, CS2 = V
IL
,
f = 1 MH
Z
OR
V
DD
= Max., V
IN
= V
IH
or V
IL
CS1
= V
IL
, f = 0,
UB
= V
IH
,
LB
= V
IH
V
DD
= Max.,
CS1
V
DD
– 0.2V,
CS2
0.2V,
V
IN
V
DD
– 0.2V, or
V
IN
0.2V, f = 0
OR
Options
A, A1
A2, A3
A, A1
A2, A3
A, A1
A2, A3
Max.
-70 ns
15
20
7
7
0.6
0.6
Unit
mA
mA
mA
ISSI
®
ULB Control
I
SB
2
CMOS Standby
Current (CMOS Inputs)
A, A1
A2
A3
15
20
50
µA
ULB Control
V
DD
= Max.,
CS1
= V
IL
, CS2=V
IH
V
IN
0.2V, f = 0;
UB
/
LB
= V
DD
– 0.2V
IS65WV12816BLL, POWER SUPPLY CHARACTERISTICS
(1)
(Over Operating Range)
Symbol
I
CC
I
CC
1
I
SB
1
Parameter
Vdd Dynamic Operating
Supply Current
Operating Supply
Current
TTL Standby Current
(TTL Inputs)
Test Conditions
V
DD
= Max.,
I
OUT
= 0 mA, f = f
MAX
V
DD
= Max.,
I
OUT
= 0 mA, f = 0
V
DD
= Max.,
V
IN
= V
IH
or V
IL
CS1
= V
IH
, CS2 = V
IL
,
f = 1 MH
Z
OR
V
DD
= Max., V
IN
= V
IH
or V
IL
CS1
= V
IL
, f = 0,
UB
= V
IH
,
LB
= V
IH
V
DD
= Max.,
CS1
V
DD
– 0.2V,
CS2
0.2V,
V
IN
V
DD
– 0.2V, or
V
IN
0.2V, f = 0
OR
Options
A, A1
A2, A3
A, A1
A2, A3
A, A1
A2, A3
Max.
-55 ns
25
30
7
7
0.6
0.6
Max.
-70 ns
20
25
7
7
0.6
0.6
Unit
mA
mA
mA
ULB Control
I
SB
2
CMOS Standby
Current (CMOS Inputs)
A, A1
A2
A3
15
25
65
15
25
65
µA
ULB Control
V
DD
= Max.,
CS1
= V
IL
, CS2=V
IH
V
IN
0.2V, f = 0;
UB
/
LB
= V
DD
– 0.2V
Note:
1. At f = f
MAX
, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.
Integrated Silicon Solution, Inc. — www.issi.com —
1-800-379-4774
Rev. 00D
02/05/03
5
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