S I GN S
N E W DE
OR
N DED F
CEM ENT
COMME
T RE
D REPLA enter at
E
NO
MMEND
tC
O R E CO
Data
al Suppor l.com/tsc
N
nic
Sheet
tersi
our Tech
contact ERSIL or www.in
T
1-888-IN
ISL3034E, ISL3035E, ISL3036E
March 31, 2009
FN6492.0
4-Channel And 6-Channel High Speed,
Auto-direction Sensing Logic Level
Translators
The ISL3034E, ISL3035E, ISL3036E 4- and 6-channel
bi-directional, auto-direction sensing, level translators
provide the required level shifting in multi-voltage systems at
data transfer rates up to 100Mbps. The auto-direction
sensing feature makes the ISL3034E, ISL3035E, ISL3036E
ideally suited for memory-card level translation (or for
generic four to six channel level translation) especially if
bit-by-bit direction control is desired. The V
CC
and V
L
supply
voltages set the logic levels on either side of the device.
Logic signals present on the IC’s V
L
side appear as higher
voltage logic signals on the IC’s V
CC
side and vice versa.
The ISL3035E features a CLK_RET output that returns the
same clock signal applied to the CLK_V
L
input, but with
timing that mimics the data returning from the I/OV
CC
inputs.
The ISL3034E, ISL3035E, ISL3036E operate at full speed
with external input drivers that source as little as 4mA output
current. Each I/O channel is pulled up to V
CC
or V
L
by an
internal 30µA current source, allowing the ISL3034E,
ISL3035E, ISL3036E to be driven by either push-pull or
open-drain drivers.
The ISL3034E and ISL3036E include an enable (EN) input
that when driven low places the IC into a low-power
shutdown mode, with all I/O lines tri-stated. All versions
feature an automatic shutdown mode, that places the part in
the same shutdown state when V
CC
is less than V
L
. The
states of I/OV
CC
and I/OV
L
during shutdown are chosen by
selecting the appropriate product (see Table 1).
The ISL3034E, ISL3035E, ISL3036E operate with V
CC
voltages from +2.2V to +3.6V and V
L
voltages from +1.35V
to +3.2V, making them ideal for data transfer between
low-voltage microcontrollers or ASICs and higher voltage
components.
TABLE 1. SUMMARY OF FEATURES
NUMBER
DATA
OF
EN
RATE
PART
NUMBER (Mbps) CHANNELS PIN?
ISL3034E
ISL3035E
ISL3036E
100
100
100
6
6
4
YES
NO
YES
I/OV
L
SHDN
STATE
16.5kΩ
to V
L
75kΩ to V
L
16.5kΩ
to V
L
I/OV
CC
SHDN
STATE
16.5kΩ
to V
CC
High
Impedance
16.5kΩ
to V
CC
Features
• Best-In-Class ESD Protection: ±15kV IEC61000-4-2 ESD
Protection on ALL Input, Output, and I/O Lines
• 100Mbps Guaranteed Data Rate
• Four (ISL3036) or Six (ISL3034, ISL3035) Bi-directional
Channels
• Auto-direction Sensing Eliminates Direction Control Logic
Pins
• Enable Input (ISL3034E, ISL3036E) for Logic Control of
Low Power SHDN Mode
• Clock Return Output (ISL3035E)
• Compatible with 4mA Input Drivers or Larger
• +1.35V
≤
V
L
≤
+3.2V and +2.2V
≤
V
CC
≤
+3.6V Supply
Voltage Range
• Pb-Free (RoHS Compliant)
• 16Ld µTQFN (2.6mmx1.8mm), 16 Ld TQFN (3mmx3mm),
and 14 Ld QFN (3.5mmx3.5mm) Packages
Applications
• Simplifies the Interface Between Two Logic ICs Operating
at Different Supply Voltages
• SD Card and MiniSD Card Level Translation
• MMC (Multi Media Card) Level Translation
• Memory Stick Card Level Translation
Typical Operating Circuit
+1.8V
0.1µF
0.1µF
1µF
+3.3V
+1.8V
SYSTEM
CONTROLLER
DAT3
DAT2
DAT1
DAT0
CMD
CLOCK
CLOCK_IN
V
L
V
CC
ISL3035E
I/OV
L
I/OV
L
I/OV
L
I/OV
L
I/OV
L
I/OV
CC
I/OV
CC
I/OV
CC
I/OV
CC
I/OV
CC
+3.3V
SD CARD
DAT3
DAT2
DAT1
DAT0
CMD
CLOCK
CLK_V
L
CLK_V
CC
CLK_RET
GND
GND
GND
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL3034E, ISL3035E, ISL3036E
Ordering Information
PART
NUMBER
ISL3034EIRTZ (Note 1)
ISL3034EIRTZ-T (Notes 1, 3)
ISL3034EIRUZ-T (Notes 2, 3)
ISL3035EIRTZ (Note 1)
ISL3035EIRTZ-T (Notes 1, 3)
ISL3035EIRUZ-T (Notes 2, 3)
ISL3036EIRZ-T (Notes 1, 3)
ISL3036EIRUZ-T (Notes 2, 3)
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-
020.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and NiPdAu
plate - e4 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products
are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. Please refer to TB347 for details on reel specifications.
34TZ
34TZ
GAE
35TZ
35TZ
GAF
36EZ
GAK
PART
MARKING
TEMP. RANGE
(°C)
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
-40 to +85
PACKAGE
(Pb-free)
16 Ld TQFN
16 Ld TQFN
16 Ld µTQFN
16 Ld TQFN
16 Ld TQFN
16 Ld µTQFN
14 Ld QFN
16 Ld µTQFN
PKG.
DWG. #
L16.3x3A
L16.3x3A
L16.2.6x1.8A
L16.3x3A
L16.3x3A
L16.2.6x1.8A
L14.3.5x3.5
L16.2.6x1.8A
Pinouts
ISL3034E
(16 LD TQFN)
TOP VIEW
15 I/OV
CC
1
14 I/OV
CC
6
16 V
CC
13 GND
ISL3034E
(16 LD
ΜTQFN)
TOP VIEW
15 I/OV
CC
1
14 I/OV
CC
6
I/OV
CC
4 7
13 GND
12 I/OV
L
6
11 EN
10 I/OV
L
5
9 I/OV
L
4
I/OV
CC
2 5
I/OV
CC
3 6
I/OV
CC
5 8
I/OV
L
1 1
V
L
2
I/OV
L
2 3
I/OV
L
3 4
I/OV
CC
5 8
I/OV
CC
2 5
I/OV
CC
3 6
I/OV
CC
4 7
THERMAL
PAD
12 I/OV
L
6
11 EN
10 I/OV
L
5
9 I/OV
L
4
I/OV
L
1 1
V
L
2
I/OV
L
2 3
I/OV
L
3 4
2
16 V
CC
FN6492.0
March 31, 2009
ISL3034E, ISL3035E, ISL3036E
Pinouts
(Continued)
ISL3035E
(16 LD TQFN)
TOP VIEW
14 CLK_V
CC
15 I/OV
CC
1
ISL3035E
(16 LD
ΜTQFN)
TOP VIEW
14 CLK_V
CC
I/OV
CC
4 7
14 NC
NC 7
15 I/OV
CC
1
I/OV
L
1 1
V
L
2
I/OV
L
2 3
I/OV
L
3 4
I/OV
CC
5 8
I/OV
CC
2 5
I/OV
CC
3 6
I/OV
CC
4 7
THERMAL
PAD
16 V
CC
13 GND
12 CLK_V
L
11 CLK_RET
10 I/OV
L
5
9 I/OV
L
4
I/OV
L
1 1
V
L
2
I/OV
L
2 3
I/OV
L
3 4
I/OV
CC
2 5
I/OV
CC
3 6
13 GND
12 CLK_V
L
11 CLK_RET
10 I/OV
L
5
9 I/OV
L
4
I/OV
CC
5 8
13 V
CC
12 I/OV
CC
1
11 I/OV
CC
2
10 I/OV
CC
3
9 I/OV
CC
4
EN 8
ISL3036E
(14 LD QFN)
TOP VIEW
V
CC
V
L
ISL3036E
(16 LD
ΜTQFN)
TOP VIEW
15 NC
NC 6
16 V
L
13 I/OV
CC
1
12 I/OV
CC
2
11 I/OV
CC
3
10 I/OV
CC
4
9
I/OV
L
1 1
I/OV
L
2 2
I/OV
L
3 3
I/OV
L
4 4
GND 5
NC
1
I/OV
L
1 2
I/OV
L
2 3
I/OV
L
3 4
I/OV
L
4 5
NC 6
7
GND
THERMAL
PAD
14
8
EN
Pin Descriptions
NAME
V
CC
V
L
GND
EN
I/OV
CC
x
CLK_V
CC
I/OV
L
x
CLK_V
L
CLK_RET
FUNCTION
V
CC
power supply, +2.2V to +3.6V. Decouple V
CC
to ground with a 0.1µF capacitor.
V
L
logic supply, +1.35V to +3.2V. Decouple V
L
to ground with a 0.1µF capacitor.
Ground Pin
±15kV IEC61000 ESD Protected Enable Input. Logic “0” puts the device in shutdown. Logic
“1” enables the device.
±15kV IEC61000 ESD Protected Input/Output channel referenced to V
CC
.
±15kV IEC61000 ESD Protected Input/Output clock channel referenced to V
CC
.
±15kV IEC61000 ESD Protected Input/Output channel referenced to V
L
.
IEC61000 ESD Protected Input clock channel referenced to V
L
.
IEC61000 ESD Protected Output clock channel referenced to V
L
.
ISL3035E only
ISL3035E only
ISL3035E only
ISL3034E and ISL3036E only
NOTES
For normal operation, V
CC
> V
L
.
For normal operation, V
CC
> V
L
.
3
16 V
CC
FN6492.0
March 31, 2009
ISL3034E, ISL3035E, ISL3036E
Absolute Maximum Ratings
(All voltages referenced to GND.)
V
CC
, V
L
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +4V
I/OV
CC
_, CLK_V
CC
. . . . . . . . . . . . . . . . . . . . -0.3V to (V
CC
+ 0.3V)
I/OV
L
_, CLK_V
L
, CLK_RET. . . . . . . . . . . . . . . -0.3V to (V
L
+ 0.3V)
EN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +4V
Short-Circuit Duration I/OV
L
_, I/OV
CC
_, CLK_V
CC
,
CLK_RET to GND. . . . . . . . . . . . . . . . . . . . . . . . . . Continuous
Thermal Information
Thermal Resistance (Typical)
θ
JA
(°C/W)
θ
JC
(°C/W)
14 Ld QFN Package (Notes 4, 5). . . . .
46
6
16 Ld TQFN Package (Notes 4, 5). . . .
74
10
16 Ld µTQFN Package (Note 4) . . . . .
93
44
Maximum Storage Temperature Range . . . . . . . . . -65°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . +150°C
Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Operating Temperature Range . . . . . . . . . . . . . . . . -40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
4.
θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air, and with “direct attach” features for
the QFN and TQFN. See Tech Brief TB379 for details.
5. For
θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
V
CC
= +2.2V to +3.6V, V
L
= +1.35V to +3.2V, EN = V
L
, unless otherwise noted. Typical values are at
V
CC
= +3.3V, V
L
= +1.8V and T
A
= +25°C. (Note 6).
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 8)
TYP
MAX
(Note 8)
UNITS
PARAMETER
POWER SUPPLIES
V
L
Supply Range
V
CC
Supply Range
V
CC
Quiescent Supply Current
V
L
Quiescent Supply Current
V
CC
Shutdown Supply Current
V
L
V
CC
I
CC
I
VL
I
CCSD
(Note 6)
(Note 6)
I/OV
CC
= V
CC
, I/OV
L
= V
L
I/OV
CC
= V
CC
, I/OV
L
= V
L
EN = GND or V
L
> V
CC
+ 0.7V; ISL3034E and
ISL3036E Only
V
L
> V
CC
+ 0.7V; ISL3035E Only
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
1.35
2.2
-
-
-
-
-
-
-
-
-0.2
-0.2
10
45
-
-
18
12
-
-
-
-
0.1
3.2
3.6
30
18
2.5
2.5
4
4
2
1
V
V
µA
µA
µA
µA
µA
µA
µA
µA
V
V
kΩ
kΩ
V
L
Shutdown Supply Current
I
LSD
EN = GND or V
L
> V
CC
+ 0.7V; ISL3034E and
ISL3036E Only
V
L
> V
CC
+ 0.7V; ISL3035E Only
I/OV
CC
, CLK_V
CC
Tri-State
Leakage Current
EN Input Current
V
L
- V
CC
Shutdown Threshold
High
V
L
- V
CC
Shutdown Threshold
Low
I/OV
CC
, I/OV
L
Pull-up
Resistance During Shutdown
I/OV
L
, CLK_V
L ,
CLK_RET
Pull-up Resistance During
Shutdown
I/OV
L_
, CLK_V
L
, CLK_RET Pull-
up Current
I/OV
CC_
, CLK_V
CC
Pull-up
Current
I/OV
L
to I/OV
CC
DC Resistance
I
LKG
I
IN_EN
V
TH
_
H
V
TH_L
V
L
> V
CC
+ 0.7V, V
O
= 0V or V
CC
, ISL3035E Only
ISL3034E and ISL3036E Only
V
CC
rising
V
CC
falling
0.05V
L
0.1V
L
16.5
75
0.7
0.7
23
105
R
PU_SD1
EN = GND; ISL3034E and ISL3036E Only
R
PU_SD2
V
L
> (V
CC
+ 0.7V); ISL3035E Only
I
VL_PU
EN = V
L
, I/OV
L
= GND
Full
Full
Full
20
20
-
-
-
3
75
75
-
µA
µA
kΩ
I
VCC_PU
EN = V
L
, I/OV
CC
= GND
R
ON
4
FN6492.0
March 31, 2009
ISL3034E, ISL3035E, ISL3036E
Electrical Specifications
V
CC
= +2.2V to +3.6V, V
L
= +1.35V to +3.2V, EN = V
L
, unless otherwise noted. Typical values are at
V
CC
= +3.3V, V
L
= +1.8V and T
A
= +25°C. (Note 6).
(Continued)
SYMBOL
TEST CONDITIONS
TEMP
(°C)
MIN
(Note 8)
TYP
MAX
(Note 8)
UNITS
PARAMETER
ESD PROTECTION
All Input and I/O Pins From Pin to
GND
IEC61000-4-2 Air-Gap Discharge
IEC61000-4-2 Contact Discharge
Human Body Model
25
25
25
25
25
-
-
-
-
-
±15
>±9
±15
>±12
±1300
-
-
-
-
-
kV
kV
kV
kV
V
All Pins
HBM, per JEDEC
Machine Model, per JEDEC
LOGIC-LEVEL THRESHOLDS
I/OV
L
, CLK_V
L
Input Voltage
High Threshold
I/OV
L
, CLK_V
L
Input Voltage
Low Threshold
I/OV
CC
, CLK_V
CC
Input Voltage
High Threshold
I/OV
CC
, CLK_V
CC
Input Voltage
Low Threshold
EN Input Voltage High Threshold
EN Input Voltage Low Threshold
I/OV
L
, CLK_RET Output Voltage
High
I/OV
L
, CLK_RET Output Voltage
Low
I/OV
CC
, CLK_V
CC
Output
Voltage High
I/OV
CC
, CLK_V
CC
Output
Voltage Low
V
IHL
V
ILL
V
IHC
V
ILC
V
IH
V
IL
V
OHL
V
OLL
V
OHC
V
OLC
I
OH
= 20µA, I/OV
CC
≥
V
CC
- 0.4V
I
OL
= 20µA, I/OV
CC
≤
0.2V
I
OH
= 20µA, I/OV
L
≥
V
L
- 0.2V
I
OL
= 20µA, I/OV
L
≤
0.15V
(Note 7)
(Note 7)
(Note 7)
(Note 7)
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
-
0.15
-
0.2
-
0.4
2/3 V
L
-
2/3 V
CC
-
-
-
-
-
-
-
-
-
-
-
V
L
- 0.2
-
V
CC
- 0.4
-
V
L
- 0.4
-
-
1/3 V
L
-
1/3 V
CC
V
V
V
V
V
V
V
V
V
V
RISE/FALL TIME ACCELERATOR STAGE
Accelerator Pulse Duration
On falling edge
On rising edge
I/OV
L
, CLK_RET Output
Accelerator Source Impedance
I/OV
CC
, CLK_V
CC
Output
Accelerator Source Impedance
I/OV
L
, CLK_RET Output
Accelerator Sink Impedance
I/OV
CC
, CLKV
CC
Output
Accelerator Sink Impedance
V
L
= 1.62V
V
L
= 3.2V
V
CC
= 2.2V
V
CC
= 3.6V
V
L
= 1.62V
V
L
= 3.2V
V
CC
= 2.2V
V
CC
= 3.6V
25
25
25
25
25
25
25
25
25
25
-
-
-
-
-
-
-
-
-
-
3
3
11
6
9
8
9
8
10
9
-
-
-
-
-
-
-
-
-
-
ns
ns
Ω
Ω
Ω
Ω
Ω
Ω
Ω
Ω
TIMING CHARACTERISTICS
(R
SOURCE
= 150Ω, Input rise/fall time
≤
1ns)
I/OV
CC
, CLK_V
CC
Rise Time
I/OV
CC
, CLK_V
CC
Fall Time
I/OV
L
, CLK_RET Rise Time
t
RVCC
t
FVCC
t
RVL
R
S
= 150Ω, C
I/OVCC
= 10pF, C
CLK_VCC
= 10pF,
push-pull drivers
R
S
= 150Ω, C
I/OVCC
= 10pF, C
CLK_VCC
= 10pF
R
S
= 150Ω, C
I/OVL
= 15pF,
V
L
≥
1.35V
C
CLK_RET
= 15pF, push-pull drivers
V
L
≥
1.62V
Full
Full
Full
Full
-
-
-
-
-
-
-
-
3.2
3.2
4
3.5
ns
ns
ns
ns
5
FN6492.0
March 31, 2009
