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ISL6308CRZ-T

Switching Controllers DAC-LESS MULTI-PHS PWM CNTRLR W/3-DRVRS

器件类别:半导体    电源管理   

厂商名称:Intersil ( Renesas )

厂商官网:http://www.intersil.com/cda/home/

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器件参数
参数名称
属性值
Product Attribute
Attribute Value
制造商
Manufacturer
Intersil ( Renesas )
产品种类
Product Category
Switching Controllers
RoHS
Details
最小工作温度
Minimum Operating Temperature
0 C
最大工作温度
Maximum Operating Temperature
+ 70 C
封装 / 箱体
Package / Case
QFN EP
系列
Packaging
Reel
高度
Height
0.88 mm
长度
Length
6 mm
类型
Type
Voltage Mode PWM Controllers
宽度
Width
6 mm
Moisture Sensitive
Yes
工厂包装数量
Factory Pack Quantity
4000
文档预览
ISL6308
NOT R
ECOM
ME
RECO
MMEN NDED FOR N
DED R
EPLAC EW DESIGN
S
EMENT
I S L630
PART
8A
DATASHEET
FN9208
Rev 4.00
Sep 30, 2008
Three-Phase Buck PWM Controller with High Current Integrated MOSFET Drivers
The ISL6308 is a three-phase PWM control IC with
integrated MOSFET drivers. It provides a precision voltage
regulation system for multiple applications including, but not
limited to, high current low voltage point-of-load converters,
embedded applications and other general purpose low
voltage medium to high current applications.The integration
of power MOSFET drivers into the controller IC marks a
departure from the separate PWM controller and driver
configuration of previous multi-phase product families. By
reducing the number of external parts, this integration allows
for a cost and space saving power management solution.
Output voltage can be programmed using the on-chip DAC
or an external precision reference. A 2-bit code programs
the DAC reference to one of 4 possible values (0.6V,
0.9V,1.2V and 1.5V). A unity gain, differential amplifier is
provided for remote voltage sensing, compensating for any
potential difference between remote and local grounds. The
output voltage can also be offset through the use of single
external resistor. An optional droop function is also
implemented and can be disabled for applications having
less stringent output voltage variation requirements or
experiencing less severe step loads.
A unique feature of the ISL6308 is the combined use of both
DCR and r
DS(ON)
current sensing. Load line voltage
positioning and overcurrent protection are accomplished
through continuous inductor DCR current sensing, while
r
DS(ON)
current sensing is used for accurate channel-current
balance. Using both methods of current sampling utilizes the
best advantages of each technique.
Protection features of this controller IC include a set of
sophisticated overvoltage and overcurrent protection.
Overvoltage results in the converter turning the lower
MOSFETs ON to clamp the rising output voltage and protect
the load. An OVP output is also provided to drive an optional
crowbar device. The overcurrent protection level is set
through a single external resistor. Other protection features
include protection against an open circuit on the remote
sensing inputs. Combined, these features provide advanced
protection for the output load.
Features
• Integrated Multi-Phase Power Conversion
- 1, 2, or 3-Phase Operation
• Precision Output Voltage Regulation
- Differential Remote Voltage Sensing
- ±0.8% System Accuracy Over-Temperature
(for REF = 0.6V and 0.9V)
- ±0.5% System Accuracy Over-Temperature
(for REF = 1.2V and 1.5V)
- Usable for Output Voltages not Exceeding 2.3V
- Adjustable Reference-Voltage Offset
• Precision Channel Current Sharing
- Uses Loss-Less r
DS(ON)
Current Sampling
• Optional Load Line (Droop) Programming
- Uses Loss-Less Inductor DCR Current Sampling
• Variable Gate-Drive Bias - 5V to 12V
• Internal or External Reference Voltage Setting
- On-Chip Adjustable Fixed DAC Reference Voltage with
2-bit Logic Input Selects from Four Fixed Reference
Voltages (0.6V, 0.9V, 1.2V, 1.5V)
- Reference can be Changed Dynamically
- Can use an External Voltage Reference
• Overcurrent Protection
• Multi-tiered Overvoltage Protection
- OVP Pin to Drive Optional Crowbar Device
• Selectable Operation Frequency up to 1.5MHz Per Phase
• Digital Soft-Start
• Capable of Start-Up in a Pre-Biased Load
• Pb-Free (RoHS Compliant)
Applications
• High Current DDR/Chipset core voltage regulators
• High Current, Low voltage DC/DC converters
• High Current, Low voltage FPGA/ASIC DC/DC converters
FN9208 Rev 4.00
Sep 30, 2008
Page 1 of 28
ISL6308
Ordering Information
PART
NUMBER
(Note)
ISL6308CRZ
ISL6308CRZ-T*
ISL6308IRZ
ISL6308IRZ-T*
ISL6308EVAL1Z
PART
MARKING
ISL6308 CRZ
ISL6308 CRZ
ISL6308 IRZ
ISL6308 IRZ
Evaluation Platform
TEMP. RANGE
(°C)
0 to +70
0 to +70
-40 to +85
-40 to +85
PACKAGE
(Pb-Free)
40 Ld 6x6 QFN
40 Ld 6x6 QFN
40 Ld 6x6 QFN
40 Ld 6x6 QFN
PKG.
DWG. #
L40.6x6
L40.6x6
L40.6x6
L40.6x6
* Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.
Pinout
ISL6308
(40 LD 6x6 QFN)
TOP VIEW
UGATE1
31
30
29
28
27
41
GND
26
25
24
23
22
21
11
VSEN
12
OCSET
13
ICOMP
14
DROOP
15
ISUM
16
IREF
17
LGATE3
18
PVCC3
19
ISEN3
20
UGATE3
BOOT1
PHASE1
PHASE2
UGATE2
BOOT2
ISEN2
PVCC2
LGATE2
PHASE3
BOOT3
LGATE1
PGOOD
PVCC1
33
ISEN1
32
REF0
ENLL
37
REF1
OVP
40
3PH
2PH
DAC
REF
OFST
VCC
COMP
FB
VDIFF
RGND
1
2
3
4
5
6
7
8
9
10
39
38
FS
36
35
34
FN9208 Rev 4.00
Sep 30, 2008
Page 2 of 28
ISL6308
Block Diagram
ICOMP
DROOP
OCSET
PGOOD
OVP
ENLL
ISEN AMP
ISUM
IREF
100µA
OC
0.66V
POWER-ON
RESET
PVCC1
VCC
RGND
VSEN
+1V
BOOT1
UGATE1
GATE
CONTROL
LOGIC
SHOOT-
THROUGH
PROTECTION
SOFT-START
x1
x1
AND
FAULT LOGIC
PHASE1
VDIFF
LGATE1
UVP
0.2V
OVP
CLOCK AND
SAWTOOTH
GENERATOR
PVCC2
BOOT2
UGATE2
GATE
CONTROL
LOGIC
PWM2
FS
OVP
+150mV
x 0.82
PWM1
SHOOT-
THROUGH
PROTECTION
PHASE2
LGATE2
REF1
DAC
REF0
DAC
PWM3
CHANNEL
DETECT
2PH
3PH
PVCC3
BOOT3
REF
FB
E/A
CHANNEL
CURRENT
BALANCE
1
N
GATE
CONTROL
LOGIC
SHOOT-
THROUGH
PROTECTION
UGATE3
COMP
PHASE3
OFFSET
CHANNEL
CURRENT
SENSE
OFST
LGATE3
ISEN1
ISEN2
ISEN3
GND
FN9208 Rev 4.00
Sep 30, 2008
Page 3 of 28
ISL6308
Typical Application - ISL6308
+12V
VDIFF
FB
COMP
PVCC1
BOOT1
VSEN
RGND
3PH
2PH
VCC
UGATE1
PHASE1
ISEN1
LGATE1
+5V
OFST
+12V
FS
PVCC2
BOOT2
DAC
UGATE2
ISL6308
REF
PHASE2
ISEN2
LGATE2
REF1
REF0
OVP
PGOOD
+12V
PVCC3
BOOT3
UGATE3
PHASE3
ISEN3
LGATE3
ICOMP
ISUM
LOAD
+12V
GND
ENLL
IREF
DROOP
OCSET
FN9208 Rev 4.00
Sep 30, 2008
Page 4 of 28
ISL6308
Absolute Maximum Ratings
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +6V
Supply Voltage, PVCC . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +15V
Absolute Boot Voltage, V
BOOT
. . . . . . . . GND - 0.3V to GND + 36V
Phase Voltage, V
PHASE
. . . . . . . . GND - 0.3V to 15V (PVCC = 12)
GND - 8V (<400ns, 20µJ) to 24V (<200ns, V
BOOT-PHASE
= 12V)
Upper Gate Voltage, V
UGATE
. . . . V
PHASE
- 0.3V to V
BOOT
+ 0.3V
V
PHASE
- 3.5V (<100ns Pulse Width, 2µJ) to V
BOOT
+ 0.3V
Lower Gate Voltage, V
LGATE
. . . . . . . . GND - 0.3V to PVCC + 0.3V
GND - 5V (<100ns Pulse Width, 2µJ) to PVCC+ 0.3V
Input, Output, or I/O Voltage . . . . . . . . . GND - 0.3V to VCC + 0.3V
Thermal Information
Thermal Resistance (Typical Notes 1, 2)
JA
(°C/W)
JC
(°C/W)
40 Ld QFN Package . . . . . . . . . . . . . .
32
3.5
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
VCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+5V
5%
PVCC Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . +5V to 12V
5%
Ambient Temperature (ISL6308CRZ) . . . . . . . . . . . . . 0°C to +70°C
Ambient Temperature (ISL6308IRZ) . . . . . . . . . . . . .-40°C to +85°C
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Recommended Operating Conditions, Unless Otherwise Specified. Parameters with MIN and/or MAX limits are
100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and are
not production tested.
TEST CONDITIONS
MIN
TYP
MAX
UNITS
PARAMETER
BIAS SUPPLY AND INTERNAL OSCILLATOR
Input Bias Supply Current
Gate Drive Bias Current
VCC POR (Power-On Reset) Threshold
I
VCC
; ENLL = high
I
PVCC
; ENLL = high; all gate outputs open, F
sw
= 250kHz
VCC Rising
VCC Falling
12
0.4
4.25
3.75
4.25
3.75
225
-
-
15
0.8
4.38
3.88
4.38
3.88
250
1.50
66.6
18
1.2
4.47
4.00
4.47
4.00
275
-
-
mA
mA
V
V
V
V
kHz
V
%
PVCC POR (Power-On Reset) Threshold
PVCC Rising
PVCC Falling
Oscillator Frequency
Oscillator Ramp Amplitude (Note 3)
Maximum Duty Cycle (Note 3)
CONTROL THRESHOLDS
ENLL Rising Threshold
ENLL Hysteresis
ENLL Pull-up current
COMP Shutdown Threshold
REFERENCE AND DAC
System Accuracy (DAC = 0.6V, 0.9V)
System Accuracy (DAC = 1.2V, 1.50V)
DAC Input Low Voltage (REF0, REF1)
DAC Input High Voltage (REF0, REF1)
Minimum External Reference (Note 4)
Maximum External Reference (Note 4)
OFS Sink Current Accuracy (Negative Offset)
F
SW
V
P-P
0.595
54
ENLL = 1V
COMP Falling
-0.5
0.1
0.630
61
-1.4
0.25
0.670
68
-3.0
0.4
V
mV
µA
V
DROOP connected to IREF
DROOP connected to IREF
-0.8
-0.5
-
0.8
-
-
-
-
0.6
1.75
50.0
50.0
0.8
0.5
0.4
-
-
-
52.5
52.5
%
%
V
V
V
V
µA
µA
REF pin input
REF pin input
R
OFS
= 30kfrom OFS to VCC
-
-
47.5
47.5
OFS Source Current Accuracy (Positive Offset) R
OFS
= 10kfrom OFS to GND
FN9208 Rev 4.00
Sep 30, 2008
Page 5 of 28
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