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ISL6414

Triple Output, Low-Noise LDO Regulator with Integrated Reset Circuit

厂商名称:Intersil ( Renesas )

厂商官网:http://www.intersil.com/cda/home/

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ESIGN
EW D
F OR N T E
NDED
TITU
ME
ECOM IBLE SUBS 412
NOT R PO
Data Sheet
ISL6
SS
UCT:
P R OD
®
S
ISL6414
August 2004
FN9128.1
Triple Output, Low-Noise LDO Regulator
with Integrated Reset Circuit
The ISL6414 is an ultra low noise triple output LDO regulator
with microprocessor reset circuit and is optimized for
powering wireless chip sets. The IC accepts an input voltage
range of 3.0V to 3.6V and provides three regulated output
voltages: 1.8V (LDO1), 2.84V (LDO2), and another ultra
clean 2.84V (LDO3). On chip logic provides sequencing
between LDO1 and LDO2 for BBP/MAC and I/O supply
voltage outputs. LDO3 features ultra low noise that does not
typically exceed 30µV RMS to aid VCO stability. High
integration and the thin Quad Flat No-lead (QFN) package
makes ISL6414 an ideal choice to power many of today’s
small form factor industry standard wireless cards, such as
PCMCIA, mini-PCI and Cardbus-32.
The ISL6414 uses an internal PMOS transistor as the pass
device. The SHDN pin controls LDO1 and LDO2 outputs
whereas SHDN3 controls LDO3 output. Internal voltage
sequencing insures that LDO1 output (1.8V supply) is
always stabilized before LDO2 is turned on. When powering
down, power to the LDO2 is removed before the LDO1
output goes off. The ISL6414 also integrates RESET
function, which eliminates the need for additional RESET IC
required in WLAN applications. The IC asserts a RESET
signal whenever the V
IN
supply voltage drops below a preset
threshold, keeping it asserted for at least 25ms after V
IN
has
risen above the reset threshold. An output fault detection
circuit indicates loss of regulation on LDO1. Other features
include an overcurrent protection, thermal shutdown and
reverse battery protection.
Features
• Small DC/DC Converter Size
- Three LDOs and RESET Circuitry in a Low-Profile
4x4mm QFN Package
• High Output Current
- LDO1, 1.8V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mA
- LDO2, 2.84V. . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mA
- LDO3, 2.84V. . . . . . . . . . . . . . . . . . . . . . . . . . . . 200mA
• Ultra-Low Dropout Voltage
- LDO2, 2.84V. . . . . . . . . . . . . . . 125mV (typ.) at 300mA
- LDO3, 2.84V. . . . . . . . . . . . . . . 100mV (typ.) at 200mA
• Ultra-Low Output Voltage Noise
- <30µV
RMS
(typ.) for LDO3 (VCO Supply)
• Stable with Smaller Ceramic Output Capacitors
• Voltage Sequencing for BBP/MAC and Analog Supplies
• Extensive Protection and Monitoring Features
- Overcurrent and short circuit protection
- Thermal shutdown
- Reverse battery protection
- FAULT indicator
• Logic-Controlled Dual Shutdown Pins
• Integrated Microprocessor Reset Circuit
- Programmable Reset Delay
- Complimentary Reset Outputs
• Proven Reference Design for Total WLAN System
Solution
• QFN Package Option
- Compliant to JEDEC PUB95 MO-220 QFN - Quad Flat
No Leads - Product Outline
- Near Chip-Scale Package Footprint Improves PCB
Efficiency and Is Thinner in Profile
• Pb-Free Plus Anneal Available (RoHS Compliant)
Ordering Information
PART NUMBER
ISL6414IR
ISL6414IR-T5K
ISL6414IR-TK
ISL6414IRZ (Note)
ISL6414IRZ-TK
(Note)
TEMP.
RANGE (°C)
-40 to +85
PACKAGE
16 Ld QFN
PKG.
DWG. #
L16.4x4
L16.4x4
L16.4x4
L16.4x4
L16.4x4
16 Ld QFN Tape and Reel
16 Ld QFN Tape and Reel
-40 to +85
16 Ld QFN
(Pb-free)
Applications
• PRISM® 3, PRISM GT™, and PRISM WWR Chipsets
• WLAN Cards
- PCMCIA, Cardbus32, MiniPCI Cards
- Compact Flash Cards
• Hand-Held Instruments
16 Ld QFN Tape and Reel
(Pb-free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003-2005. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL6414
Pinout
ISL6414 (QFN)
TOP VIEW
RESET
FAULT
VIN
14
VIN
13
12
11
10
9
5
OUT3
6
CC3
7
GND3
8
GND
OUT1
CC1
OUT2
CC2
16
RESET
CT
SHDN
SHDN3
1
2
3
4
15
Typical Application Schematic
+3.3V
V
IN
+ C8
3.3µF
14
VIN
13
VIN
16
15
RESET
FAULT
+1.8V
V
OUT1
+2.84V
V
OUT2
C7
0.01µF
1
2
3
4
RESET
CT
SHDN
SHDN3
ISL6414
12
OUT1
11
CC1
10
OUT2
9
CC2
C4
0.033µF
C3
0.033µF
C2
3.3µF
C1
3.3µF
+2.84V
V
OUT3
C5
3.3µF
5
6
7
8
E
E
2
OUT3
CC3
GND3
GND
C6
0.033µF
ISL6414
Functional Block Diagram
Gm
VIN
13
VIN
+
-
LDO1
BAND
GAP
REF.
1.2V
OUT1
14
12
WINDOW
COMP
CC1
Gm
THERMAL
SHUT
DOWN
150°C
+
-
LDO2
15
FAULT
OUT2
11
VIN
10
VIN
CONTROL
LOGIC
Gm
CC2
9
3
SHDN
+
-
OUT3
5
4
SHDN3
LDO3
ENABLES
2
CT
16
RESET
RESET
CC3
6
1
RESET
8
GND
POR
POR
GND3
7
3
ISL6414
Absolute Maximum Ratings
(Note 1)
V
IN
, SHDN/SHDN3 to GND/GND3 . . . . . . . . . . . . . . . -7.0V to 7.0V
SET, CC, FAULT to GND/GND3 . . . . . . . . . . . . . . . . . -0.3V to 7.0V
Output Current (Continuous)
LDO1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 500mA
LDO2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 300mA
LDO3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 200mA
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Thermal Information
Thermal Resistance (Typical Notes 2, 3)
θ
JA
(°C/W)
θ
JC
(°C/W)
QFN Package. . . . . . . . . . . . . . . . . . . .
46
8.0
Maximum Junction Temperature (Plastic Package) . -55°C to 150°C
Maximum Storage Temperature Range . . . . . . . . . . . -65°C to 150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300°C
Operating Temperature Range . . . . . . . . . . . . . . . . . . -40°C to 85°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. All voltages are with respect to GND.
2.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
3. For
θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside. See Tech Brief TB379.
Electrical Specifications
PARAMETER
GENERAL SPECIFICATIONS
V
IN
Voltage Range (Note 7)
Operating Supply Current
Shutdown Supply Current
SHDN/SHDN3 Input Threshold
V
IN
= +3.3V, Compensation Capacitor = 33nF, T
A
= 25°C, Unless Otherwise Noted.
TEST CONDITIONS
MIN
TYP
MAX
UNITS
3.0
I
OUT
= 0mA
SHDN/SHDN3 = GND
V
IH
, V
IN
= 3V to 3.6V
V
IL
, V
IN
= 3V to 3.6V
-
-
2.0
-
-
145
-
C
OUT
= 10µF, V
OUT
= 90% of final
value
Rising 75mV Hysteresis
-
2.2
3.3
600
5
-
-
-
150
20
120
2.45
3.6
850
15
-
0.4
0.25
160
-
-
2.65
V
µA
µA
V
V
V
°C
°C
µs
V
FAULT Output Low Voltage
Thermal Shutdown Temperature (Note 6)
Thermal Shutdown Hysteresis
Start-up Time
Input Undervoltage Lockout (Note 6)
LDO1 SPECIFICATIONS
Output Voltage (V
OUT1
)
Output Voltage Accuracy
Line Regulation
Load Regulation
Maximum Output Current (I
OUT1
) (Note 6)
Output Current Limit (Note 6)
Output Voltage Noise
LDO2 SPECIFICATIONS
Output Voltage (V
OUT2
)
Output Voltage Accuracy
Maximum Output Current (I
OUT2
) (Note 6)
Output Current Limit (Note 6)
Dropout Voltage (Note 4)
Line Regulation
Load Regulation
I
SINK
= 2mA
-
I
OUT
= 10mA
V
IN
= 3.0V to 3.6V, I
OUT
= 10mA
I
OUT
= 10mA to 500mA
-1.5
-0.15
-1.5
500
0.55
10Hz < f < 100kHz, C
OUT
= 4.7µF,
I
OUT
= 50mA
-
1.8
-
0.0
-
-
0.6
115
-
1.5
0.15
1.5
-
1.0
-
V
%
%/V
%
mA
A
µV
RMS
-
I
OUT
= 10mA
V
IN
= 3.6V
-1.5
300
330
I
OUT
= 300mA
V
IN
= 3.0V to 3.6V, I
OUT
= 10mA
I
OUT
= 10mA to 300mA
-
-0.15
-
2.84
-
-
770
125
0.0
0.2
-
1.5
-
-
220
0.15
1.0
V
%
mA
mA
mV
%/V
%
4
ISL6414
Electrical Specifications
PARAMETER
Output Voltage Noise
V
IN
= +3.3V, Compensation Capacitor = 33nF, T
A
= 25°C, Unless Otherwise Noted.
(Continued)
TEST CONDITIONS
10Hz < f < 100kHz, I
OUT
= 10mA
C
OUT
= 2.2µF
C
OUT
= 10µF
LDO3 SPECIFICATIONS
Output Voltage (V
OUT3
)
Output Voltage Accuracy
Maximum Output Current (I
OUT3
) (Note 6)
Output Current Limit (Note 6)
Dropout Voltage (Note 4)
Line Regulation
Load Regulation
Output Voltage Noise
I
OUT
= 200mA
V
IN
= 3.0V to 3.6V, I
OUT
= 10mA
I
OUT
= 10mA to 200mA
10Hz < f < 100kHz, I
OUT
= 10mA
C
OUT
= 2.2µF
C
OUT
= 10µF
RESET BLOCK SPECIFICATIONS
RESET Threshold
RESET Threshold Hysteresis (Note 6)
V
IN
to RESET Delay
RESET/RESET Active Timeout Period (Notes 5,6)
FAULT
Rising Threshold
Falling Threshold
NOTES:
4. Specifications at -40°C are guaranteed by design/characterization, not production tested.
5. The dropout voltage is defines as V
IN
- V
OUT,
when V
OUT
is 50mV below the value of V
OUT
for V
IN
= V
OUT
+ 0.5V.
6. The RESET time is linear with CT at a slope of 2.5ms/nF. Thus, at 10nF (0.01µF) the RESET time is 25ms; at 100nF (0.1µF) the RESET time
would be 250ms.
7. Guaranteed by design, not production tested.
8. LDO1 is guaranteed by design to be within regulation at 2.7V minimum input voltage.
% of VOUT
% of VOUT
5.0
-5.0
5.5
-5.5
6.0
-5.0
%
%
VCC = V
TH
to V
TH
- 100mV
2.564
6.3
-
25
2.630
-
20
-
2.696
-
-
-
V
mV
µs
ms
-
-
30
20
-
-
µV
RMS
µV
RMS
I
OUT
= 10mA
V
IN
= 3.6V
-
-1.5
200
250
-
-0.15
-
2.84
-
-
400
100
0.0
0.2
-
1.5
-
-
200
0.15
1.0
V
%
mA
mA
mV
%/V
%
-
-
65
60
-
-
µV
RMS
µV
RMS
MIN
TYP
MAX
UNITS
Typical Performance Curves
0.140
0.120
0.100
V
D
(V)
0.080
0.060
0.040
0.020
0.000
0.00
0.05
0.10
0.15
0.20
I
O
(Amps)
0.25
0.30
V
D
(V)
0.100
0.090
0.080
0.070
0.060
0.050
0.040
0.030
0.020
0.010
0.000
0.00
0.05
0.10
I
O
(Amps)
0.15
0.30
FIGURE 1. LD02 DROPOUT VOLTAGE
FIGURE 2. LD03 DROPOUT VOLTAGE
5
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参数对比
与ISL6414相近的元器件有:ISL6414IR、ISL6414IR-TK、ISL6414IR-T5K。描述及对比如下:
型号 ISL6414 ISL6414IR ISL6414IR-TK ISL6414IR-T5K
描述 Triple Output, Low-Noise LDO Regulator with Integrated Reset Circuit Triple Output, Low-Noise LDO Regulator with Integrated Reset Circuit Triple Output, Low-Noise LDO Regulator with Integrated Reset Circuit Triple Output, Low-Noise LDO Regulator with Integrated Reset Circuit
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