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ISL6426IB-T

Single Synchronous Buck Pulse-Width Modulation (PWM) Controller

厂商名称:Intersil ( Renesas )

厂商官网:http://www.intersil.com/cda/home/

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DATASHEET
ISL6406
Single Synchronous Buck Pulse-Width Modulation (PWM) Controller
The ISL6406 is an adjustable frequency, synchronous buck
switching regulator optimized for generating lower voltages
for the distributed DC/DC architectures. The ISL6406 offers
an adjustable output voltage.
Designed to drive N-Channel MOSFETs in synchronous
buck topology, the ISL6406 integrates the control, output
adjustment and protection functions into a single package.
The ISL6406 provides simple, single feedback loop,
voltage-mode control with fast transient response. The
output voltage can be precisely regulated to as low as 0.8V.
The error amplifier features a 15MHz gain-bandwidth
product and 6V/µs slew rate which enables high converter
bandwidth for fast transient performance.
Protection from overcurrent conditions is provided by
monitoring the r
DS(ON)
of the upper MOSFET to inhibit PWM
operation appropriately. This approach simplifies the
implementation and improves efficiency by eliminating the
need for a current sense resistor.
The wide programmable switching frequency range of
100kHz to 700kHz allows the use of small surface mount
inductors and capacitors. The device also provides external
frequency synchronization making it an ideal choice for
DC/DC converter applications.
FN9073
Rev 9.00
Oct 21, 2015
Features
• Operates from 3.3V/5V Input
• 0.8V to V
IN
Output Range
- 0.8V Internal Reference
- ±1.5% Reference Accuracy
• Simple Single-Loop Control Design
- Voltage-Mode PWM Control
• Fast Transient Response
- High-Bandwidth Error Amplifier
• Lossless, Programmable Overcurrent Protection
- Uses Upper MOSFET’s r
DS(ON)
• Programmable Switching Frequency 100kHz to 700kHz
• External Frequency Synchronization
• Internal Soft-Start
• QFN Package Option
- QFN Compliant to JEDEC PUB95 MO-220 QFN - Quad
Flat No Leads - Product Outline
- QFN Near Chip-Scale Package Footprint; Improves
PCB Efficiency, Thinner in Profile
• Pb-Free (RoHS compliant)
Applications
• 3V/5V DC/DC Converter Modules
• Distributed DC/DC 3.3V, 2.5V and 1.8V Power
Architectures for DSP, Logic, and Memory
• Power Supplies for Microprocessors
- PCs
- Embedded Controllers
• Memory Supplies
• Personal Computer Peripherals
Ordering Information
PART NUMBER
(Note)
ISL6406IBZ*
(No longer available,
recommended replacement: ISL6406IVZ)
ISL6406IRZ*
(No longer available or
supported)
ISL6406IVZ*
PART MARKING
6406IBZ
ISL6406 IRZ
6406 IVZ
TEMP. RANGE (°C)
-40 to +85
-40 to +85
-40 to +85
PACKAGE
(RoHS Compliant)
16 Ld SOIC
16 Ld 5x5 QFN
16 Ld TSSOP
PKG. DWG. #
M16.15
L16.5x5B
M16.173
*Add “-T” suffix to part number for tape and reel packaging. Please refer to TB347 for details on reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
FN9073 Rev 9.00
Oct 21, 2015
Page 1 of 18
ISL6406
Pinouts
ISL6406,
(16 LD SOIC,TSSOP)
TOP VIEW
GND 1
LGATE 2
CPVOUT 3
OCSET 4
CT1 5
CT2 6
RT 7
SYNC/EN 8
16 UGATE
15 BOOT
14 PHASE
13 VCC
12 CPGND
11 COMP
10 VOUT
9 FB
CPVOUT
OCSET
CT1
CT2
1
2
3
4
5
ISL6406,
(16 LD QFN)
TOP VIEW
UGATE
14
LGATE
BOOT
13
12
PHASE
11
VCC
10
CPGND
9
6
SYNC/EN
7
FB
8
VOUT
COMP
GND
15
16
Functional Block Diagram
VCC
CPVOUT
CT1
CT2
CPGND
OCSET
20µA
CHARGE
PUMP
SDWN
POWER-ON
RESET (POR)
BOOT
SOFTSTART
UGATE
OC
COMPARATOR
+
-
RT
PHASE
ERROR
AMP
+
-
PWM
COMPARATOR
+
-
SDWN
FB
VOUT
COMP
OSCILLATOR
INHIBIT
+
0.8V
-
GATE
CONTROL
LOGIC
PWM
LGATE
SYNC/EN RT
GND
FN9073 Rev 9.00
Oct 21, 2015
Page 2 of 18
ISL6406
Typical Application Schematic for 5V Input
V
IN
5V ±10%
C
IN
VCC
CT1
OCSET
r
OCSET
CPVOUT
C
BULK
NC
CT2
ISL6406
RT
CPGND
R
T
GND
UGATE
PHASE
VCC
VOUT
SYNC/EN
COMP
LGATE
FB
BOOT
D
BOOT
C
DCPL
C
HF
R
BOOT
Q
1
C
BOOT
L
OUT
V
OUT
Q
2
C
OUT
C
I
R
FB
R
F
C
F
R
OFFSET
Typical Application Schematic for 3.3V Input
V
IN
3.3V ±10%
C
IN
VCC
CT1
C
PUMP
CT2
RT
CPGND
R
T
GND
UGATE
PHASE
VCC
VOUT
SYNC/EN
COMP
LGATE
FB
Q
2
C
OUT
OCSET
r
OCSET
CPVOUT
C
BULK
ISL6406
D
BOOT
BOOT
C
BOOT
C
DCPL
C
HF
R
BOOT
Q
1
L
OUT
V
OUT
C
I
R
FB
R
F
C
F
R
OFFSET
FN9073 Rev 9.00
Oct 21, 2015
Page 3 of 18
ISL6406
Absolute Maximum Ratings
Supply Voltage, VCC (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V
Absolute Boot Voltage, V
BOOT
. . . . . . . . . . . . . . . . . . . . . . . +15.0V
Upper Driver Supply Voltage, V
BOOT
- V
PHASE
. . . . . . . . . . . +6.0V
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.3V to VCC +0.3V
Thermal Information
Thermal Resistance (Typical)
JA
(°C/W)
JC
(°C/W)
16 Ld SOIC (Note 2) . . . . . . . . . . . . . .
70
N/A
16 Ld TSSOP (Note 2) . . . . . . . . . . . . .
90
N/A
16 Ld QFN (Notes 3, 4) . . . . . . . . . . . .
35
4.5
Maximum Junction Temperature (Plastic Package) .-55°C to +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile. . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . -40°C to +85°C
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.3V ±10%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. Please refer to the Typical Application Schematics (page 3) for 3.3V/5V input configuration.
2.
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
3.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
4. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to “Functional Block Diagram” on page 2
and Typical Application Schematic beginning on page 2. V
CC
= +3.3V. Parameters with MIN and/or MAX limits
are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and
are not production tested.
TEST CONDITIONS
MIN
TYP
MAX
UNITS
PARAMETER
V
CC
SUPPLY
Shutdown Supply Current
Operating Supply Current (Note 5)
REFERENCE VOLTAGE
Nominal Reference Voltage
Reference Voltage Tolerance
SYNC/EN = GND
RT = 64.9k
-
7
20
9.8
50
11.5
µ
A
mA
-
-1.5
T
A
= 0°C to +70°C
T
A
= -40°C to +85°C
-1.8
-2.1
0.8
-
-
-
-
1.5
1.8
2.1
V
%
%
%
ERROR AMPLIFIER
Open Loop Voltage Gain (Note 6)
Gain-Bandwidth Product (Note 6)
Slew Rate (Note 5)
CHARGE PUMP
Nominal Charge Pump Output
Charge Pump Output Regulation
POWER-ON RESET
Rising CPVOUT POR Threshold
T
A
= 0°C to +70°C
T
A
= -40°C to +85°C
CPVOUT POR Threshold Hysteresis
OSCILLATOR
Gate Output Frequency Range
RT = 200k
RT = 64.9k
RT = 26.1k
Sawtooth Amplitude
Sync. Frequency Range (Note 6)
Minimum Sync Pulse Width (Note 6)
Peak-to-Peak
V
OSC
1.1x the natural switching frequency.
80
250
650
1.1
110
-
100
300
715
1.4
-
40
120
340
770
1.7
770
100
kHz
kHz
kHz
V
kHz
ns
4.20
4.1
0.3
4.35
4.35
0.5
4.5
4.6
0.9
V
V
V
V
CC
= 3.3V, No Load
4.8
-5.0
5.1
-
5.5
5.0
V
%
COMP = 10pF
-
14
4.65
82
-
6.0
-
-
9.2
dB
MHz
V/
µ
s
FN9073 Rev 9.00
Oct 21, 2015
Page 4 of 18
ISL6406
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to “Functional Block Diagram” on page 2
and Typical Application Schematic beginning on page 2. V
CC
= +3.3V. Parameters with MIN and/or MAX limits
are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization and
are not production tested.
(Continued)
TEST CONDITIONS
MIN
-
TYP
96
MAX
-
UNITS
%
PARAMETER
PWM Maximum Duty Cycle
GATE DRIVER OUTPUT (Note 6)
Upper Gate Source Current
Upper Gate Sink Current
Lower Gate Source Current
Lower Gate Sink Current
SOFT-START
Soft-Start Slew Rate
V
BOOT
- V
PHASE
= 5V, V
UGATE
= 4V
V
VCC
= 3.3V, V
LGATE
= 4V
-
-
-
-
-1
1
-1
2
-
-
-
-
A
A
A
A
f = 300kHz, T
A
= 0°C to +70°C
f = 300kHz, T
A
= -40°C to +85°C
Internal Digital Circuit Clock Count
(Soft-start time varies with frequency)
6.2
6.2
-
6.7
6.7
2048
7.3
7.6
-
ms
ms
Clk Cycles
OVERCURRENT
OCSET Current Source
T
A
= 0°C to +70°C
T
A
= -40°C to +85°C
NOTES:
5. This is the V
CC
current consumed when the device is active but not switching.
6. Limits established by characterization and are not production tested.
18
16
20
20
22
23
µ
A
µ
A
Typical Performance Curve
0.810
0.805
0.800
V
REF
(V)
0.795
0.790
0.785
0.780
-40 -30 -20 -10
0
10
20
30
40
50
60
70
80
TEMPERATURE (°C)
FIGURE 1. REFERENCE VOLTAGE vs TEMPERATURE
FN9073 Rev 9.00
Oct 21, 2015
Page 5 of 18
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