®
ISL6540
Data Sheet
March 9, 2006
FN9214.0
Single-Phase Buck PWM Controller with
Integrated High Speed MOSFET Driver
and Pre-Biased Load Capability
The ISL6540 is a single-phase voltage-mode PWM controller
with input voltage feedforward compensation to maintain a
constant loop gain for optimal transient response, especially for
applications with a wide input voltage range. Its integrated high
speed synchronous rectified MOSFET drivers and other
sophisticated features provide complete control and protection
for a DC/DC converter with minimum external components,
resulting in minimum cost and less engineering design efforts.
The output voltage of the converter can be precisely regulated
with an internal reference voltage of 0.591V, and has a system
tolerance of ±0.85% over commercial temperature and line load
variations. An external voltage can be used in place of the
internal reference for voltage tracking/DDR applications.
The ISL6540 has an internal linear regulator or external linear
regulator drive options for applications with only a single supply
rail. The internal oscillator is adjustable from 250kHz to 2MHz.
The integrated voltage margining, programmable pre-biased
soft-start, differential remote sensing amplifier, and
programmable input voltage POR features enhance the
ISL6540 value.
Features
• VIN and Power Rail Operation from +3.3V to +20V
• Fast Transient Response - 0 to 100% Duty Cycle
-
15MHz Bandwidth Error Amplifier with 6V/
µ
s Slew Rate
- Voltage-Mode PWM Leading and Trailing-edge
Modulation Control
- Input Voltage Feedforward Compensation
• 2.9V to 5.6V High Speed 2A/4A MOSFET Gate Drivers
-
Tri-state for Power Stage Shutdown
•
Internal Linear Regulator (LR) - 5.6V Bias from VIN
•
External LR Drive for Optimal Thermal Performance
• Voltage Margining with Independently Adjustable Upper and
Lower Settings for System Stress Testing & Over Clocking
•
Reference Voltage I/O for DDR/Tracking Applications
•
Precise 0.591V Internal Reference with Buffered Output
-
±0.85%/±1.25% Over Commercial/Industrial Range
•
Source and Sink Overcurrent Protections
-
Low- and High-Side MOSFET r
DS(ON)
Sensing
•
Overvoltage and Undervoltage Protections
•
Small Converter Size - QFN package
• Oscillator Programmable from 250kHz to 2MHz
• Differential Remote Voltage Sensing with Unity Gain
• Programmable Soft-start with Pre-Biased Load Capability
• Power Good Indication with Programmable Delay
• EN Input with Voltage Monitoring Capability
• Pb-Free Plus Anneal Available (RoHS Compliant)
Pinout
ISL6540
(28 LD 5x5 QFN)
TOP VIEW
VMON
COMP
HSOC
LSOC
GND
Applications
•
Power Supply for some Microprocessors and GPUs
•
Wide and Narrow Input Voltage Range Buck Regulators
21
20
19
BOOT
UGATE
PHASE
PGND
LGATE
PVCC
LINDRV
FB
28
VSEN+
VSEN-
REFOUT
REFIN
SS
OFS+
OFS-
1
2
3
27
26
25
24
FS
23
22
•
Point of Load Applications
•
Low-Voltage and High Current Distributed Power Supplies
Ordering Information
PART
NUMBER*
(Note)
ISL6540CRZ
PART
MARKING
ISL6540CRZ
TEMP.
PACKAGE PKG.
RANGE (°C) (Pb-Free) DWG. #
0 to 70
0 to 70
-40 to 85
-40 to 85
28 Ld QFN L28.5x5
28 Ld QFN L28.5x5
28 Ld QFN L28.5x5
28 Ld QFN L28.5x5
GND
4
5
6
7
8
VCC
9
MARCTRL
10
PG_DLY
11
PG
12
EN
13
VFF
14
VIN
BOTTOM
SIDE PAD
18
17
16
15
ISL6540CRZA ISL6540CRZ
ISL6540IRZ
ISL6540IRZA
ISL6540IRZ
ISL6540IRZ
*Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte
tin plate termination finish, which are RoHS compliant and compatible
with both SnPb and Pb-free soldering operations. Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that
meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2006. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
EN
VIN
LIN_DRV
VCC
POWER-ON
REFERENCE
V
REF
= 0.591 V
RESET (POR)
INTERNAL SERIES
LINEAR
EXTERNAL SERIES
LINEAR DRIVER
HSOC
Block Diagram
REFIN
2
100µA
SOFT-START
AND
FAULT LOGIC
SOURCE OCP
OTA
PWM
COMP
EA
GATE
CONTROL
LOGIC
OV/UV
COMP
SOURCE
OCP
OSCILLATOR
G
=
-1
100µA
SINKING OCP
PG
LSOC
VFF
FS
REFOUT
MAR_CTRL
BOOT
UGATE
OFS+
OFS-
VOLTAGE
MARGINING
ISL6540
SS
PHASE
FB
COMP
PVCC
VCC
800mV
LGATE
PGND
PGOOD
COMP
GND
GND
VSEN+
VSEN-
G
=
1
UNITY GAIN
DIFF AMP
FN9214.0
March 9, 2006
VMON
PG_DLY
ISL6540
Typical Application I (Internal Linear Regulator with Remote Sense)
+3.3V to +20V
R
CC
L
IN
C
F2
D
BOOT
C
HFIN
C
BIN
C
F1
VCC
VIN
VFF
C
F3
Internal 5.6V Bias
Linear Regulator
PVCC
R
BOOT
BOOT
HSOC
R
HSOC
C
BOOT
Q1
L
OUT
C
HSOC
UGATE
VCC
EN
REFIN
REFOUT
PG
C
PG_DLY
R
FS
PG_DLY
FS
PHASE
LGATE
PGND
Q2
R
LSOC
C
LSOC
C
2
C
1
MARCTRL
R
OFS+
OFS+
R
MARG
R
OFS-
OFS-
FB
VMON
VSEN+
C
SEN
Z
FB
R
2
V
OUT
C
BOUT
C
HFOUT
ISL6540
LSOC
10Ω
10Ω
COMP
C
3
R
3
Z
IN
R
1
R
FB
V
SENSE+
R
OS
SS
C
SS
LINDRV
GND
GND
VSEN-
V
SENSE-
3
FN9214.0
March 9, 2006
ISL6540
Typical Application II (External Linear Regulator without Remote Sense)
+3.3V to +20V
L
IN
C
F2
C
LC
R
LC
C
F1
R
CC
VCC
PVCC
BOOT
LINDRV
VIN
C
F3
VFF
REFOUT
REFIN
EN
PG
C
PG_DLY
R
FS
PG_DLY
FS
COMP
PHASE
LGATE
PGND
Q2
C
HFOUT
C
BOUT
C
HSOC
UGATE
Q1
HSOC
R
HSOC
C
BOOT
L
OUT
R
BOOT
D
BOOT
C
HFIN
C
BIN
R
DRV
VCC
V
OUT
ISL6540
LSOC
R
LSOC
C
LSOC
C
2
C
1
MARCTRL
R
OFS+
OFS+
FB
VMON
OFS-
VSEN+
SS
C
SS
GND
GND
VSEN-
Z
FB
C
3
R
3
Z
IN
R
2
R
1
R
MARG
R
OFS-
R
OS
VCC
R
vmon1
R
vmonOS
4
FN9214.0
March 9, 2006
ISL6540
Typical Application III (Dual Data Rate I or II)
VDDQ
1.8V or 2.5V
L
IN
5V
R
CC
C
F1
VIN
R
EN1
VFF
EN
R
EN2
C
F4
UGATE
1K
REFIN
15nF
1K
DIMM
REFOUT
PG
C
PG_DLY
R
FS
PG_DLY
FS
PHASE
LGATE
PGND
Q2
R
LSOC
C
HFOUT
C
BOUT
VCC
PVCC
BOOT
HSOC
R
HSOC
C
BOOT
Q1
L
OUT
C
F2
D
BOOT
C
HFIN
C
BIN
C
HSOC
V
TT
1.25V (DDR I)
0.9V (DDR II)
ISL6540
LSOC
COMP
C
LSOC
C
2
Z
FB
C
1
MARCTRL
R
OFS+
R
MARG
R
OFS-
OFS-
VSEN-
SS
C
SS
LINDRV GND
GND
OFS+
FB
VMON
VSEN+
C
3
R
3
Z
IN
R
2
R
1
R
FB
C
SEN
5
FN9214.0
March 9, 2006
