DATASHEET
ISL6627
VR11.1, VR12 Compatible Synchronous Rectified Buck MOSFET Driver
The ISL6627 is a high frequency MOSFET driver designed to
drive upper and lower power N-Channel MOSFETs in a
synchronous rectified buck converter topology. The advanced
PWM protocol of ISL6627 is specifically designed to work with
Intersil VR11.1, VR12 controllers and combined with
N-Channel MOSFETs to form a complete core-voltage regulator
solution for advanced microprocessors. When ISL6627 detects
a PSI protocol sent by an Intersil VR11.1, VR12 controller, it
activates Diode Emulation (DE) operation; otherwise, it
operates in normal Continuous Conduction Mode (CCM) PWM
mode.
To further enhance light load efficiency, the ISL6627 enables
diode emulation operation during PSI mode. This allows
Discontinuous Conduction Mode (DCM) by detecting when the
inductor current reaches zero and subsequently turning off the
low side MOSFET to prevent it from sinking current.
When ISL6627 detects Diode Braking command from the
PWM, it turns off both gates and reduces overshoot in load
transient situations.
An advanced adaptive shoot-through protection is integrated to
prevent both the upper and lower MOSFETs from conducting
simultaneously and to minimize dead time. The user also has
the option to program the driver working in fixed propagation
delay mode to optimize the regulator efficiency. The ISL6627
has a 20kΩ integrated high-side gate-to-source resistor to
prevent self turn-on due to high input bus dV/dt.
FN6992
Rev 1.00
January 24, 2014
Features
• Intersil VR11.1 and VR12 Compatible
• Dual MOSFET Driver for Synchronous Rectified Bridge
• Advanced Adaptive Zero Shoot-through Protection
• Programmable Fixed Deadtime for Efficiency Optimization
• Low Standby Bias Current
• 36V Internal Bootstrap Diode
• Bootstrap Capacitor Overcharge Prevention
• Supports High Switching Frequency
- 4A Sinking Current Capability
- Fast Rise/Fall Times and Low Propagation Delays
• Integrated High-Side Gate-to-Source Resistor to Prevent Self
Turn-on Due to High Input Bus dV/dt
• Power Rails Undervoltage Protection
• Expandable Bottom Copper Pad for Enhanced Heat Sinking
• Dual Flat 10 Ld (3x3 DFN) Package
- Near Chip-Scale Package Footprint; Improves PCB
Efficiency and Thinner in Profile
• Pb-Free (RoHS Compliant)
Applications
• High Light Load Efficiency Voltage Regulators
• Core Regulators for Advanced Microprocessors
• High Current DC/DC Converters
• High Frequency and High Efficiency VRM and VRD
Related Literature
• Technical Brief
TB363
“Guidelines for Handling and
Processing Moisture Sensitive Surface Mount Devices
(SMDs)”
• Technical Brief
TB417
“Designing Stable Compensation
Networks for Single Phase Voltage Mode Buck Regulators”
TD
VCC
EN
SHOOT-
THROUGH
PROTECTION/
DELAY
PROGRAMMING
BOOT
UGATE
20kΩ
+5V
33.6k
PHASE
POR/
CONTROL
LOGIC
PWM
28.8k
LGATE
GND
FIGURE 1. ISL6627 BLOCK DIAGRAM
FN6992 Rev 1.00
January 24, 2014
Page 1 of 11
ISL6627
Typical Application Circuit
+5V
VINF
+5V
EN
VCC
ISL6627
DRIVER
DVC FB
PSICOMP
HFCOMP
VSEN
VTT
SVDATA
SVALERT#
SVCLK
VR_RDY
VR_RDYS
VR_HOT#
PWM2
ISEN2-
ISEN2+
PWM3-5
ISEN3-5-
ISEN3-5+
VINF
ISL6367
I2CLK
PMALERT#
VINF
CFP
RAMP_ADJ
PWM6
IMON
IMONS
FS_DRP
FSS_DRPS
+5V
+5V
+5V
BTS_DES_TCOMPS
BT_FDVID_TCOMP
+5V
ADDR_IMAXS_TMAX
PWMS
+5V
NPSI_DE_IMAX
ISENS-
PWM
GND
ISEN6-
ISEN6+
VIN
ISENIN-
ISENIN+
+5V
EN
VCC
ISL6627
DRIVER
BOOT
UGATE
PHASE
GND
LGATE
GPU
LOAD
R
ISENIN1
R
ISENIN2
R
SENIN
VINF
PWM
EN_PWR_CFP
I2DATA +5V
VCTRL
VCC
BOOT
UGATE
ISL6596
DRIVER
PHASE
GND
LGATE
VINF
CPU
LOAD
PWM
RGND
EN_VTT
COMP
VCC PWM1
ISEN1-
ISEN1+
+5V
EN
VCC
ISL6627
DRIVER
BOOT
UGATE
PHASE
GND
LGATE
VINF
PWM
BOOT
UGATE
PHASE
GND
LGATE
ISENS+
+5V
NTC
TM
AUTO
RSET
TMS
RGNDS
VSENS
NTC
HFCOMPS/DVCS
COMPS
FBS
NTC: BETA = 3477
FN6992 Rev 1.00
January 24, 2014
Page 2 of 11
ISL6627
Pin Configuration
ISL6627
(10 LD 3x3 DFN)
TOP VIEW
UGATE
BOOT
TD
PWM
GND
1
2
3
4
5
PAD
(GND)
10 PHASE
9 EN
8 NC
7 VCC
6 LGATE
Functional Pin Descriptions
PIN #
1
2
SYMBOL
UGATE
BOOT
DESCRIPTION
Upper gate drive output. Connect to gate of high-side power N-Channel MOSFET.
Floating bootstrap supply pin for the upper gate drive. Connect the bootstrap capacitor between this pin and the PHASE pin. The
bootstrap capacitor provides the charge to turn on the upper MOSFET. See “Internal Bootstrap Device” on page 7 for guidance in
choosing the capacitor value.
Deadtime programming pin. Connect to ground or VCC via resistor to program fixed time delay from LGATE fall to UGATE rise or UGATE
fall to LGATE rise. Open pin sets the adaptive mode. See Table 1 for more details.
Control input for the driver. The PWM signal can enter three distinct states during operation; see “Advanced PWM Protocol (Patent
Pending)” on page 6 for further details. Connect this pin to the PWM output of the controller.
Bias and reference ground. All signals are referenced to this node. It is also the power ground return of the driver.
Lower gate drive output. Connect to gate of the low-side power N-Channel MOSFET.
Connect to 5V bias supply. This pin supplies power to the gate drives and small-signal circuitry. Place a high quality low ESR ceramic
capacitor from this pin to GND.
No connection.
Enable input pin. Connect this pin high to enable the driver and low to disable the driver.
Connect this pin to the SOURCE of the upper MOSFET and the DRAIN of the lower MOSFET. This pin provides a return path for the
upper gate drive.
EPAD at ground potential. Soldering it directly to GND plane is required for thermal considerations.
3
4
5
6
7
8
9
10
-
TD
PWM
GND
LGATE
VCC
NC
EN
PHASE
PAD
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL6627CRZ
ISL6627IRZ
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for
ISL6627.
For more information on MSL please see techbrief
TB363.
6627
627I
PART
MARKING
TEMP. RANGE
(°C)
0 to +70
-40 to +85
PACKAGE
(Pb-Free)
10 Ld 3x3 DFN
10 Ld 3x3 DFN
PKG.
DWG. #
L10.3X3
L10.3X3
FN6992 Rev 1.00
January 24, 2014
Page 3 of 11
ISL6627
Absolute Maximum Ratings
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 7V
Input Voltage (V
EN
, V
PWM
). . . . . . . . . . . . . . . . . . . . . . . -0.3V to VCC + 0.3V
BOOT Voltage (V
BOOT-GND
) . . . . . . . . . . -0.3V to 25V (DC) or 36V (<200ns)
BOOT to PHASE Voltage (V
BOOT-PHASE
) . . . . . . . . . . . . . . . . -0.3V to 7V (DC)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 9V (<10ns)
PHASE Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 25V (DC)
. . . . . . . . . . . . . . . GND -8V (<20ns Pulse Width, 10µJ) to 30V (<100ns)
UGATE Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . V
PHASE
- 0.3V (DC) to V
BOOT
. . . . . . . . . . . . . . . . . . .V
PHASE
- 5V (<20ns Pulse Width, 10µJ) to V
BOOT
LGATE Voltage . . . . . . . . . . . . . . . . . . . . . . . . .GND - 0.3V (DC) to VCC + 0.3V
. . . . . . . . . . . . . . . . GND - 2.5V (<20ns Pulse Width, 5µJ) to VCC + 0.3V
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . . . .-40°C to +125°C
ESD Rating
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2.5kV
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1kV
Latch Up (Tested per JESD78C; Class II, Level A) . . . . . . . . . . . . . . . 100mA
Thermal Information
Thermal Resistance
JA
(°C/W)
JC
(°C/W)
10 Ld 3x3 DFN Package (Notes 4, 5). . . . .
51
10
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . .+150°C
Maximum Storage Temperature Range . . . . . . . . . . . . . .-65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Recommended Operating Conditions
Ambient Temperature Range(ISL6627IRZ) . . . . . . . . . . . . -40°C to +85°C
Ambient Temperature Range (ISL6627CRZ) . . . . . . . . . . . . .0°C to +70°C
Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . . +125°C
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5V
10%
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
4.
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See Tech
Brief
TB379.
5. For
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications
temperature range.
PARAMETER
Recommended Operating Conditions, Unless Otherwise Noted.
Boldface limits apply over the operating
MIN
(Note 7)
MAX
(Note 7) UNITS
SYMBOL
TEST CONDITIONS
TYP
VCC SUPPLY CURRENT
No Load Switching Supply Current
Standby Supply Current
IVCC
IVCC
f_PWM = 300kHz, VCC = 5V, EN = High
VCC = 5V, PWM 0V to 2.5V transition, EN = High
VCC = 5V, PWM 0V to 2.5V transition, EN = Low
1.27
1.85
1.15
mA
mA
mA
POWER-ON RESET AND ENABLE
VCC Rising POR Threshold
VCC Falling POR Threshold
VCC POR Hysteresis
EN High Threshold
EN Low Threshold
3.20
3.00
130
1.40
1.20
3.85
3.52
300
1.65
1.35
4.40
4.00
530
1.90
1.55
V
V
mV
V
V
PWM INPUT (See “TIMING DIAGRAM” on page 6)
Input Current
Three-State Lower Gate Falling Threshold
Three-State Lower Gate Rising Threshold
Three-State Upper Gate Rising Threshold
Three-state Upper Gate Falling Threshold
UGATE Rise Time (Note 6)
LGATE Rise Time (Note 6)
UGATE Fall Time (Note 6)
LGATE Fall Time (Note 6)
UGATE Turn-On Propagation Delay (Note 6)
LGATE Turn-On Propagation Delay (Note 6)
UGATE Turn-Off Propagation Delay (Note 6)
t_RU
t_RL
t_FU
t
FL
t
PDHU
t
PDHL
t
PDLU
IPWM
VPWM = 5V
VPWM = 0V
VCC = 5V
VCC = 5V
VCC = 5V
VCC = 5V
VCC = 5V, 3nF load, 10% to 90%
VCC = 5V, 3nF load, 10% to 90%
VCC = 5V, 3nF load, 10% to 90%
VCC = 5V, 3nF load, 10% to 90%
VCC = 5V, 3nF load, adaptive
VCC = 5V, 3nF load, adaptive
VCC = 5V, 3nF load
155
-133
1.6
1.1
3.2
2.8
8
8
8
4
28
16
15
µA
µA
V
V
V
V
ns
ns
ns
ns
ns
ns
ns
FN6992 Rev 1.00
January 24, 2014
Page 4 of 11
ISL6627
Electrical Specifications
temperature range. (Continued)
PARAMETER
Recommended Operating Conditions, Unless Otherwise Noted.
Boldface limits apply over the operating
MIN
(Note 7)
230
MAX
(Note 7) UNITS
ns
450
ns
SYMBOL
t
PDLL
t
LG_ON_DM
t
PDUFLR
VCC = 5V
TEST CONDITIONS
VCC = 5V, 3nF load
TYP
14
330
LGATE Turn-Off Propagation Delay (Note 6)
Minimum LGATE on Time at Diode Emulation
PROPAGATION DELAY PROGRAMMING
UGATE Fall to LGATE Rise Time
VCC = 5V, 3nF Load, 90% to 10%,
short resistor from TD to VCC
VCC = 5V, 3nF Load, 90% to 10%, 100kΩ resistor from
TD to VCC
VCC = 5V, 3nF Load, 90% to 10%, 330kΩ resistor from
TD to VCC
VCC = 5V, 3nF Load, 90% to 10%, 910kΩ resistor from
TD to VCC
VCC = 5V, 3nF Load, 90% to 10%,
short resistor from TD to GND
LGATE Fall to UGATE Rise Time
t
PDLFUR
VCC = 5V, 3nF Load, 90% to 10%,
short resistor from TD to GND
VCC = 5V, 3nF Load, 90% to 10%, 100kΩ resistor from
TD to GND
VCC = 5V, 3nF Load, 90% to 10%, 360kΩ resistor from
TD to GND
VCC = 5V, 3nF Load, 90% to 10%,
short resistor from TD to VCC
23
18
15
7
18
40
25
17
27
ns
ns
ns
ns
ns
ns
ns
ns
ns
OUTPUT (Note 6)
Upper Drive Source Current
Upper Drive Source Impedance
Upper Drive Sink Current
Upper Drive Sink Impedance
Lower Drive Source Current
Lower Drive Source Impedance
Lower Drive Sink Current
Lower Drive Sink Impedance
NOTES:
6. Limits established by characterization and are not production tested.
7. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Temperature limits established by characterization
and are not production tested.
I_U_SOURCE VCC = 5V, 3nF load
R_U_SOURCE 20mA source current
I_U_SINK
R_U_SINK
I_L_SOURCE
I_L_SINK
R_L_SINK
VCC = 5V, 3nF load
20mA sink current
VCC = 5V, 3nF load
VCC = 5V, 3nF load
20mA sink current
2
1
2
1
2
1
4
0.4
A
Ω
A
Ω
A
Ω
A
Ω
R_L_SOURCE 20mA source current
FN6992 Rev 1.00
January 24, 2014
Page 5 of 11
