®
ISL6721
Data Sheet
March 5, 2008
FN9110.6
Flexible Single-ended Current Mode PWM
Controller
The ISL6721 is a low power, single-ended pulse width
modulating (PWM) current mode controller designed for a
wide range of DC/DC conversion applications including
boost, flyback, and isolated output configurations. Peak
current mode control effectively handles power transients
and provides inherent overcurrent protection. Other features
include a low power mode where the supply current drops to
less than 200µA during overvoltage and overcurrent
shutdown faults.
This advanced BiCMOS design features low operating
current, adjustable operating frequency up to 1MHz,
adjustable soft-start, and a bi-directional SYNC signal that
allows the oscillator to be locked to an external clock for
noise sensitive applications.
Features
• 1A MOSFET Gate Driver
• 100µA Startup Current
• Fast Transient Response with Peak Current Mode Control
• Adjustable Switching Frequency up to 1MHz
• Bi-directional Synchronization
• Low Power Disable Mode
• Delayed Restart from OV and OC Shutdown Faults
• Adjustable Slope Compensation
• Adjustable Soft-start
• Adjustable Overcurrent Shutdown Delay
• Adjustable UV and OV Monitors
• Leading Edge Blanking
• Integrated Thermal Shutdown
Ordering Information
PART
NUMBER
ISL6721AB*
PART
MARKING
ISL6721AB
TEMP
RANGE (°C)
PACKAGE
PKG.
DWG. #
M16.15
M16.15
• 1% Tolerance Voltage Reference
• Pb-Free Available (RoHS Compliant)
-40 to +105 16 Ld SOIC
(150 mil)
-40 to +105 16 Ld SOIC
(150 mil)
(Pb-Free)
-40 to +105 16 Ld TSSOP
(4.4mm)
ISL6721ABZ* 6721ABZ
(Note)
ISL6721AV*
ISL67 21AV
Applications
• Telecom and Datacom Power
• Wireless Base Station Power
• File Server Power
M16.173
M16.173
ISL6721AVZ* ISL67 21AVZ -40 to +105 16 Ld TSSOP
(Note)
(4.4mm)
(Pb-free)
• Industrial Power Systems
• Isolated Buck and Flyback Regulators
• Boost Regulators
*Add “-T” suffix for tape and reel. Please refer to TB347 for details on
reel specifications.
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach materials
and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which
is RoHS compliant and compatible with both SnPb and Pb-free
soldering operations. Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the Pb-free
requirements of IPC/JEDEC J STD-020.
Pinout
ISL6721
(16 LD SOIC, TSSOP)
TOP VIEW
GATE 1
ISENSE 2
SYNC 3
SLOPE 4
UV 5
OV 6
RTCT 7
ISET 8
16 VC
15 PGND
14 VCC
13 VREF
12 LGND
11 SS
10 COMP
9 FB
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
|
Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2003-2005, 2007, 2008. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL6721
Functional Block Diagram
VCC
START/STOP
UV COMPARATOR
+
-
BG +
-
LGND
THERMAL
PROTECTION
RESTART
DELAY
ISET
ISENSE
5k
VREF
+
S
53µA + 100mV
+
-
-
+
OC DETECT
OVERCURRENT
COMPARATOR
Q
Q
50µs
RETRIGGERABLE
ONE SHOT
S Q
R Q
OC LATCH
0.8
VREF
5V
1%
VREF
SOFT-START
CHARGE 70µA
CURRENT
ON
SS CHARGE
VOLTAGE CLAMP
SS CHARGED
ENABLE
SS
OVERCURRENT
SHUTDOWN
DELAY
25µA
+
-
+
-
15µA
4.375V
ON
SLOPE
0.1
SS LOW
SS
COMP
+
-
SS CLAMP
PWM
COMPARATOR
ERROR
AMPLIFIER
+
-
1/3
+
-
FAULT
LATCH
S Q
RQ
-
+
SS LOW 270mV
COMPARATOR
+
-
SET DOMINANT
VREF
UV COMPARATOR
4.65V -
+
BG
+
-
VREF
2.5V
VFB
VREF
20k
3.0V
1.5V 12k
ON
30k
OSCILLATOR
COMPARATOR
-
+
1mA
VREF
ON
+
-
-
+
BLANKING
COMPARATOR
3.0V
-
+
+
-
S Q
BI-DIRECTIONAL
SYNCHRONIZATION
OSC IN
CLK OUT
NO EXT SYNC
EXT SYNC BLANKING
SYNC IN
SYNC OUT
36k
R Q
2.50V
-
+
UV
1.45V
+
-
+
-
+
-
START
100ns
BLANKING
+
-
OV
VC
RTCT
GATE
4V
2V
PGND
VREF
100k
SYNC
4.5k
2
FN9110.6
March 5, 2008
ISL6721
Typical Application - 48V Input Dual Output Flyback, 3.3V @ 2.5A, 1.8V @ 1.0A
SP1
SP2
CR5
T1
ISO LATIO N
XF M R
VIN+
P9
R21
+3.3V
C21
+
C15
+ C16
R24
C18
CR4
C19
+
C22
+
+1.8V
C2
C5
CR2
C17
C20
RET URN
CR6
R1
36-75V
C6
C1
C3
TP1
Q1
R2
U2
C14
R16
R17
R18
R19
R4
R3
R22
U3
TP2
R15
C13
VIN-
R23
R20
R25
Q2
D1
TP3
SYNC
C4
G AT E
ISENSE
SYNC
U4
V
C
PG ND
V
CC
ISL6721
SLO PE
UV
R5
R6
D2
ISET
TP5
OV
RT CT
VREF
L G ND
SS
R26
CO M P
VFB
R27
R14
T P4
Q3
C12
R8
R10
C11
C9
R11
R9
R12
R13
C10
C7
R7
VR1
C8
3
FN9110.6
March 5, 2008
ISL6721
Typical Boost Converter Application Schematic
CR1
VIN+
L1
+
C2
R12
C12
RETURN
Q1
R8
R1
R2
R3
C11
C3
+VOUT
R4
C1
VIN+
C4
U1
VC
GATE
ISENSE PGND
SYNC
VCC
SLOPE VREF
UV
LGND
OV
SS
ISL6721
RTCT
ISET
R5
R11
C7
C9
VIN-
C8
R7
R6
C6
COMP
VFB
R9
R10
C10
C5
4
FN9110.6
March 5, 2008
ISL6721
Absolute Maximum Ratings
Supply Voltage, V
CC,
V
C
. . . . . . . . . . . . . . . . . GND -0.3V to +20.0V
GATE . . . . . . . . . . . . . . . . GND - 0.3V to Gate Output Limit Voltage
PGND to LGND
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±0.3V
VREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to 5.3V
Signal Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to VREF
Peak GATE Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1A
Thermal Information
Thermal Resistance (Typical, Note 1)
θ
JA
(°C/W)
16 Ld SOIC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
80
16 Ld TSSOP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
105
Maximum Junction Temperature . . . . . . . . . . . . . . .-55°C to +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range
ISL6721Ax . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +105°C
Supply Voltage Range (Typical, Note 2) . . . . . . . . 9VDC to 18VDC
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1.
θ
JA
is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
2. All voltages are with respect to GND.
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic on page 2 and page 3. 9V < V
CC
= V
C
< 20V, R
T
= 11kΩ, Ct = 330 pF, T
A
= -40 to +105°C (Note 3),
Typical values are at T
A
= +25°C.
TEST CONDITIONS
MIN
TYP
MAX
UNITS
PARAMETER
UNDERVOLTAGE LOCKOUT
START Threshold
STOP Threshold
Hysteresis
Start-Up Current, I
CC
OC/OV Fault Operating Current, I
CC
Operating Current, I
CC
Operating Supply Current, I
C
REFERENCE VOLTAGE
Overall Accuracy
7.95
7.40
0.50
V
CC
< START Threshold
-
-
-
Includes 1nF GATE loading
-
8.25
7.70
0.55
100
200
4.5
8.0
8.55
8.20
1.00
175
300
10.0
12.0
V
V
V
µA
µA
mA
mA
Line, load, 0°C to +105°C
Line, load, -40°C to +105°C
4.95
4.90
-
4.50
4.65
75
-10
-20
5.00
5.00
5
4.65
4.80
165
-
-
5.05
5.05
-
4.75
4.95
250
-
-
V
V
mV
V
V
mV
mA
mA
Long Term Stability
Fault Voltage
VREF Good Voltage
Hysteresis
Operational Current
Current Limit
CURRENT SENSE
Input Impedance
Offset Voltage
Input Voltage Range
Blanking Time
Gain, A
CS
T
A
= +125°C, 1000 hours (Note 5)
-
0.08
0
(Note 5)
V
SLOPE
= 0V, V
FB
= 2.3V,
V
ISET
= 0.35V, 1.5V
A
CS
=
ΔISET/ΔISENSE
30
0.77
5
0.10
-
60
0.79
-
0.11
1.5
100
0.81
kΩ
V
V
ns
V/V
5
FN9110.6
March 5, 2008
