DATASHEET
ISL78235
5A Automotive Synchronous Buck Regulator
The
ISL78235
is a highly efficient, monolithic, synchronous
step-down DC/DC converter that can deliver 5A of continuous
output current from a 2.7V to 5.5V input supply. The device uses
peak current mode control architecture to achieve very low duty
cycle operation at high frequency with fast transient response and
excellent loop stability.
The ISL78235 integrates a low ON-resistance P-channel
(35mΩ, typical) high-side FET and N-channel (11mΩ, typical)
low-side FET to maximize efficiency and minimize external
component count. The 100% duty cycle operation allows less
than 250mV dropout voltage at 5A output current. The
operating frequency of the Pulse Width Modulator (PWM) is
adjustable from 500kHz to 4MHz. The default switching
frequency of 2MHz is set by connecting the FS pin high.
The ISL78235 can be configured for discontinuous (PFM) or
forced continuous (PWM) operation at light load. Forced
continuous operation reduces noise and RF interference, while
discontinuous mode provides higher efficiency by reducing
switching losses at light loads.
Fault protection is provided by internal hiccup mode current
limiting during short-circuit and overcurrent conditions. The
device also integrates output overvoltage and
over-temperature protections. A power-good monitor indicates
when the output is in regulation. The ISL78235 offers a 1ms
Power-Good (PG) timer at power-up.
When in shutdown, the ISL78235 discharges the output
capacitor through an internal 100Ω soft-stop switch. Other
features include internal fixed or adjustable soft-start and
internal/external compensation.
The ISL78235 is available in a 3mmx3mm 16 Ld Thin Quad Flat
No-lead (TQFN) Pb-free package and in a 5mmx5mm 16 Ld
Wettable Flank Quad Flat No-Lead (WFQFN) package with an
exposed pad for improved thermal performance. The
ISL78235 is rated to operate across the temperature range of
-40°C to +105°C in the 3mmx3mm package and -40°C to
+125°C in the 5mmx5mm package.
FN8713
Rev 6.00
September 22, 2016
Features
• 2.7V to 5.5V input voltage range
• 2MHz default switching frequency
• 100ns guaranteed phase minimum on time for wide output
regulation
• Adjustable switching frequency from 500kHz to 4MHz
• External synchronization from 1MHz to 4MHz
• Optional PFM mode for light-load efficiency improvement
• Very low ON-resistance HS/LS switches: 35mΩ/11mΩ
• Internal 1ms or adjustable external soft-start
• Soft-stop output discharge during disable
• OTP, OCP, output OVP, input UVLO protections
• 1% reference accuracy over-temperature
• Up to 95% efficiency
• AEC-Q100 qualified
• Common pinout family allows migration from 3A to 5A
without PCB change:
- ISL78233 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3A
- ISL78234 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4A
- ISL78235 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5A
Applications
• DC/DC POL modules
•
μC/µP,
FPGA and DSP power
• Video processor/SOC power
• Automotive infotainment power
Related Literature
•
UG015,
“ISL7823xEVAL1Z Evaluation Board User Guide”
•
ISL78233, ISL78234
Datasheet
•
UG062,
“ISL7823xEVAL2Z Evaluation Board User Guide”
L
V
OUT
PHASE
PHASE
PHASE
2.7V TO 5.5V
5A LOAD
DSP, FPGA
100
90
EFFICIENCY (%)
80
70
60
50
2.5V
OUT
1.8V
OUT
1.5V
OUT
3.3V
OUT
C
IN
VIN
VIN
C
OUT
16
1
15
14
13
12
PGND
PGND
SGND
FB
*Pin Compatible
ISL78233 - 3A BUCK
ISL78234 - 4A BUCK
1.2V
OUT
VDD
2
PG
3
SYNC
4
5
*ISL78235
11
10
9
6
7
8
EN
COMP
FS
SS
40
T
A
= +25°C
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
OUTPUT LOAD (A)
FIGURE 1. TYPICAL APPLICATION: 5A BUCK REGULATOR
FIGURE 2. EFFICIENCY vs LOAD (V
IN
= 5V; f
sw
= 2MHz; SYNC = GND)
FN8713 Rev 6.00
September 22, 2016
Page 1 of 23
ISL78235
Table of Contents
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Typical Application Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Typical Operating Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Theory of Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PWM Control Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SKIP Mode (PFM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Frequency Adjust . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Negative Current Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PG . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
UVLO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Soft Start-Up . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Discharge Mode (Soft-Stop) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power MOSFETs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
100% Duty Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Applications Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Inductor and Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Loop Compensation Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
16
16
16
17
17
17
17
17
17
18
18
18
18
18
18
18
18
19
19
PCB Layout Recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
L16.3x3D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
L16.5x5D . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
FN8713 Rev 6.00
September 22, 2016
Page 2 of 23
ISL78235
Functional Block Diagram
COMP
SS
SHUTDOWN
EN
SOFT-
Soft
START
+
55pF
100kΩ
OSCILLATOR
PWM/PFM
LOGIC
CONTROLLER
PROTECTION
HS DRIVER
P
PHASE
LS
DRIVER
N
PGND
FS
SYNC
SHUTDOWN
VDD
VIN
-
3pF
+
FB
6kΩ
0.8V
-
+
OV
SLOPE
Slope
COMP
0.85*VREF
+
PG
SGND
0.5V
FN8713 Rev 6.00
September 22, 2016
+
-
-
BANDGAP VREF
EAMP
+
COMP
-
+
CSA
-
+
OCP
-
ISET
THRESHOLD
UV
+
SKIP
-
1ms
DELAY
NEG CURRENT
SENSING
ZERO-CROSS
SENSING
SCP
+
SHUTDOWN
100Ω
FIGURE 3. FUNCTIONAL BLOCK DIAGRAM
Page 3 of 23
ISL78235
Pin Configuration
ISL78235
(16 LD TQFN, WFQFN)
TOP VIEW
PHASE
PHASE
14
PHASE
13
12 PGND
11 PGND
EPAD
16
VIN
VIN 1
VDD 2
PG 3
SYNC 4
15
10 SGND
9
FB
5
EN
6
FS
7
SS
8
COMP
Pin Descriptions
PIN NUMBER
1, 16
2
3
4
PIN NAME
VIN
VDD
PG
SYNC
DESCRIPTION
Input supply voltage. Place a minimum of two 22µF low ESR ceramic capacitors from VIN to PGND as close
as possible to the IC for decoupling.
Input supply voltage for the logic circuitry. A 0.1µF high frequency decoupling ceramic capacitor should also
be placed close to the VDD and SGND pin. Connect to VIN pin.
PG is an open-drain output for power-good indication. Use a 10kΩ to 100kΩ pull-up resistor connected from
PG to VIN. At power-up or EN high, PG rising edge is delayed by 1ms upon output voltage within regulation.
Mode selection pin. Connect to logic high or input voltage VIN for forced PWM mode. Connect to logic low or
ground for PFM mode. Connect to an external function generator for synchronization with a positive edge
trigger. In external synchronization the ISL78235 operates in forced PWM mode. The transition to and from
internal oscillator to external synchronization is seamless and does not require disabling of the ISL78235.
There is an internal 1MΩ pull-down resistor to SGND to prevent an undefined logic state if SYNC pin is
floating.
Regulator enable pin. Regulator is enabled when driven logic high. Regulator is shutdown and PHASE pin
discharge output capacitor when enable pin is driven low.
This pin sets the internal oscillator switching frequency using a resistor, R
FS
, from the FS pin to GND. The
frequency of operation may be programmed between 500kHz to 4MHz. The switching frequency is 2MHz if
FS is connected to VIN.
SS is used to adjust the soft-start time. Connect SS pin to SGND for internal 1ms soft-start time. Connect a
capacitor from SS to SGND to adjust the soft-start time. Do not use more than 33nF on the SS pin.
COMP is the output of the error amplifier if COMP is not connected to VDD. An external compensation
network must be used if COMP is not tied to VDD. If COMP is tied to VDD, the error amplifier output is
internally compensated. External compensation network across COMP and SGND may be required to
improve the loop compensation of the amplifier.
The feedback network of the regulator, FB, is the negative input to the transconductance error amplifier. The
output voltage is set by an external resistor divider connected to FB. With a properly selected divider, the
output voltage can be set to any voltage between the power rail (reduced by converter losses) and the 0.6V
reference. In addition, the regulator power-good and undervoltage protection circuitry use FB to monitor the
regulator output voltage.
Signal ground, Connect to PGND.
Power ground
Switching node connections. Connect to one terminal of the inductor. This pin is discharged by a 100Ω
resistor when the device is disabled. See
“Functional Block Diagram” on page 3
for more detail.
The exposed pad must be connected to the SGND pin for proper electrical performance. Place as many vias
as possible under the pad connecting to SGND plane for optimal thermal performance.
5
6
EN
FS
7
8
SS
COMP
9
FB
10
11, 12
13, 14, 15
Exposed Pad
SGND
PGND
PHASE
EPAD
FN8713 Rev 6.00
September 22, 2016
Page 4 of 23
ISL78235
Ordering Information
PART NUMBER
(Notes
1, 2, 3)
ISL78235ARZ
ISL78235AARZ
ISL78235EVAL1Z
ISL78235EVAL2Z
NOTES:
1. Add “-T” suffix for 6k unit or “-T7A” suffix for 250 unit tape and reel options. Refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials and 100% matte tin
plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-free
products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), see the device information page for
ISL78235.
For more information on MSL, see tech brief
TB363.
8235
78235A ARZ
PART
MARKING
OUTPUT VOLTAGE
(V)
Adjustable
Adjustable
TEMP. RANGE
(°C)
PACKAGE
(RoHS Compliant)
PKG.
DWG. #
L16.3x3D
L16.5x5D
-40°C to +105°C 16 Ld 3x3mm TQFN
-40°C to +125°C 16 Ld 5x5mm WFQFN
3x3mm TQFN Evaluation Board
5x5mm WFQFN Evaluation Board
TABLE 1. KEY DIFFERENCE BETWEEN FAMILY OF PARTS
PART NUMBER
ISL78233
ISL78234
ISL78235
I
OUT
MAX
(A)
3
4
5
FN8713 Rev 6.00
September 22, 2016
Page 5 of 23
