DATASHEET
ISL85003, ISL85003A
Highly Efficient 3A Synchronous Buck Regulator
The
ISL85003
and
ISL85003A
are synchronous buck regulators
with integrated high-side and low-side FETs. The regulator can
operate from an input voltage range of 4.5V to 18V while
delivering a very efficient continuous 3A current. This is all
delivered in a very compact 3mmx4mm DFN package.
The ISL85003 is designed on Intersil’s proprietary fab process
that is designed to deliver very low r
DS(ON)
FETs with an
optimized current mode controller wrapped around it. The
high-side NFET is designed to have an r
DS(ON)
of 65mΩ while
the low-side NFET is designed to have an r
DS(ON)
of 45mΩ.
With these two FETs, the device delivers very high efficiency
power to the load.
The ISL85003 can automatically switch between DCM and
CCM for light-load efficiency in DCM. The switching frequency
in CCM is internally set to 500kHz.
The device provides a maximum static regulation tolerance of
±1% over wide line, load and temperature ranges. The output
is user adjustable, with external resistors, down to 0.8V. Pulling
EN above 0.6V enables the controller. The regulator supports
prebiased output.
Fault protection is provided by internal current limiting during
positive or negative overcurrent conditions, output and input
under and overvoltage detection and an over-temperature
monitoring circuit.
FN7968
Rev.2.00
Jan 15, 2016
Features
• Input voltage range 4.5V to 18V
• Output voltage adjustable from 0.8V,
±
1%
• Efficiency up to 95%
• Integrated boot diode with undervoltage detection
• Current mode control
- DCM/CCM
- Internal or external compensation options
- 500kHz switching frequency option
- External synchronization up to 2MHz on ISL85003
• Adjustable soft-start time on the ISL85003A
• Open-drain PG window comparator
- Built-in protection
- Positive and negative overcurrent protection
- Overvoltage and thermal protection
- Input overvoltage protection
• Small 12 Ld 3mmx4mm Dual Flat No-Lead (DFN) package
Applications
• Network and communication equipment
• Industrial process control
• Multifunction printers
• Point-of-load regulators
• Standard 12V rail supplies
• Embedded computing
Related Literature
•
AN1935,
“ISL85003DEMO1Z, ISL85003ADEMO1Z
Evaluation Board User Guide”
•
AN1930,
“ISL85003EVAL2Z, ISL85003AEVAL2Z Evaluation
Board User Guide”
•
AN1965,
“Effectively Using the Intersil Small Form Factor
Power Management Evaluation Boards”
t
SS
= 2ms, FIXED
SYNC
PG
L = 0.5V H = 1.20V POS EDGE 1
L = DE H = FPWM
U1
ISL85003
12
C
3
0.1µF
OPTIONAL CAP
NO CAP: t
SS
= 2ms
For t
SS
>2ms, ADD CAP:
C[nF] = 4.1 * t
SS
[ms]-1.6nF
U1
C
2
SS
22nF 1
SYNC
PG
EN
FB
COMP
ISL85003A
12
C
3
0.1µF
SYNC
BOOT
VDD
VIN
VIN
PHASE
PGND
PHASE
BOOT
VDD
VIN
VIN
PHASE
PGND
PHASE
2
PG
OPEN DRAIN, ADD PULL-UP
3
EN
EN
THRESHOLD 1V, HYST 100mV
+0.8V ±8mV 4
AGND
FB
R
2
R
1
301k 57.1k
5
C
1
COMP
1%
1%
4.7pF
6
AGND
11 C
4
1µF
+5V
10
9
8
7
L
1
C
5
10µF
C
6
10µF
4.5 TO 18V
VIN
GND
+5V
MAX 3A
C
8
47µF
C
9
,22µF
f
SW
= 500kHz 4.7µH
VOUT
GND
2
OPEN DRAIN, ADD PULL-UP
3
EN
THRESHOLD 1V, HYST 100mV
+0.8V ±8mV 4
AGND
R
2
R
1
301k 57.1k
5
C
1
1%
1%
4.7pF
6
PG
11 C
4
1µF
+5V
10
9
8
7
L
1
C
5
10µF
C
6
10µF
4.5 TO 18V
VIN
GND
AGND
+5V
MAX 3A
C
8
47µF
C
9
,22µF
f
SW
= 500kHz 4.7µH
VOUT
GND
13
DEVICE MUST BE
CONNECTED TO GND
PLANE WITH 8 VIAs.
DEVICE MUST BE
CONNECTED TO GND
PLANE WITH 8 VIAs.
+5V
FIGURE 1A. ISL85003 V
IN
RANGE FROM 4.5V TO 18V, V
OUT
= 5V AND
INTERNAL COMPENSATION WITH EXTERNAL
FREQUENCY SYNC
13
FIGURE 1B. ISL85003A V
IN
RANGE FROM 4.5V TO 18V, V
OUT
= 5V
AND INTERNAL COMPENSATION WITH EXTERNAL
SOFT-START
FIGURE 1. TYPICAL APPLICATION SCHEMATICS
FN7968 Rev.2.00
Jan 15, 2016
Page 1 of 23
ISL85003, ISL85003A
Table of Contents
Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
Pin Configurations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Recommended Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Electrical Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Typical Performance Curves . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Detailed Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Operation Initialization. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CCM Control Scheme. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Light-Load Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Synchronization Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Enable, Soft-Start and Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Voltage Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Protection Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Regulator Overcurrent Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Negative Current Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Overvoltage Protection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Overvoltage Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Thermal Overload Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Power Derating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Application Guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
BOOT Undervoltage Detection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Switching Regulator Output Capacitor Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output Inductor Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input Capacitor Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Loop Compensation Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
15
15
15
16
16
16
16
16
17
17
17
17
17
17
17
17
18
19
19
Compensator Design Goal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
High DC Gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Layout Considerations. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
About Intersil . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Package Outline Drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
FN7968 Rev.2.00
Jan 15, 2016
Page 2 of 23
ISL85003, ISL85003A
Functional Block Diagram
SS (ISL85003A)
SOFT-START
CONTROL
SYNC (ISL85003)
1
PG
VIN
1.5ms
DELAY
FAULT
MONITOR
UNDERVOLTAGE
LOCKOUT
0.8V
3
EN
POR
+
FB
4
600k
-
EA
GATE DRIVE
PHASE
REFERENCE
+
-
PHASE
+
SLOPE COMP
CIRCUITS
CSA
LDO
VIN
10
BOOT
REFRESH
VDD
BOOT
12
1
11
2
9
8
7
30pF
PGND
13
5
COMP
OSCILLATOR
DCM
DETECTOR
ZERO CROSS
DETECTOR
GND DETECT
6
AGND
NEGATIVE
CURRENT
LIMIT
FIGURE 2. FUNCTIONAL BLOCK DIAGRAM
FN7968 Rev.2.00
Jan 15, 2016
Page 3 of 23
ISL85003, ISL85003A
Pin Configurations
ISL85003
(12 ld 3X4 DFN)
TOP VIEW
ISL85003A
(12 LD 3X4 DFN)
TOP VIEW
SYNC
PG
EN
FB
COMP
AGND
1
2
3
PGND
4
5
6
13
12 BOOT
11 VDD
10 VIN
9
8
7
VIN
PHASE
PHASE
SS
PG
EN
FB
COMP
AGND
1
2
3
PGND
4
5
6
13
12 BOOT
11 VDD
10 VIN
9
8
7
VIN
PHASE
PHASE
Pin Descriptions
PIN
NUMBER
1
(ISL85003)
1
(ISL85003A)
2
PIN
NAME
SYNC
DESCRIPTION
Synchronization and mode selection input. Connect to VDD for CCM mode. Connect to AGND for DCM mode. Connect to an
external function generator for synchronization with the positive edge trigger. There is an internal 1MΩ pull-up resistor to VDD,
which prevents an undefined logic state in cases where SYNC is floating.
Soft-Start input. This pin provides a programmable soft-start. When the chip is enabled, the regulated 4µA pull-up current
source charges a capacitor connected from SS to ground. The output voltage of the converter follows the ramping voltage on
this pin. Without the external capacitor, the default soft-start is 2ms.
Power-good open-drain output. Connect 10kΩ to 100kΩ pull-up resistor between PG and VDD or between PG and a voltage not
exceeding 5.5V. PG transitions high about 1ms after the switching regulator’s output voltage reaches the regulation threshold,
which is 85% of the regulated output voltage typically.
Enable input. The regulator is held off when the pin is pulled to ground. The device is enabled when the voltage on this pin rises
above 0.6V.
Feedback input. The synchronous buck regulator employs a current mode control loop. FB is the negative input to the voltage
loop error amplifier. The output voltage is set by an external resistor divider connected to FB. The output voltage can be set to
any voltage between the power rail (reduced by converter losses) and the 0.8V reference.
Compensation node. This pin is connected to the output of the error amplifier, and is used to compensate the loop. Internal
compensation is used to meet most applications. Connect COMP to AGND to select internal compensation. Connect a
compensation network between COMP and FB to use external compensation.
The AGND terminal provides the return path for the core analog control circuitry within the device. Connect AGND to the board
ground plane. AGND and PGND are connected internally within the device. Do not operate the device with AGND and PGND
connected to dissimilar voltages.
Phase switch output node. This is the main output of the device. Connect to the external output inductor.
Voltage supply input. The main power input for the IC. Connect to a suitable voltage supply. Place a ceramic capacitor from VIN
to PGND, close to the IC for decoupling (typical 10µF).
Low dropout linear regulator decoupling pin. VDD is the internally generated 5V supply voltage and is derived from VIN. The
VDD is used to power all the internal core analog control blocks and drivers. Connect a 1µF capacitor from VDD to the board
ground plane. If VIN is between 4.5V to 5.5V, then connect VDD directly to VIN to improve efficiency.
Bootstrap input. Floating bootstrap supply pin for the upper power MOSFET gate driver. Connect a 0.1µF capacitor between
BOOT and PHASE.
Power ground terminal. Provides thermal relief for the package and is connected to the source of the low-side output MOSFET.
Connect PGND to the board ground plane using as many vias as possible. AGND and PGND are connected internally within the
device. Do not operate the device with AGND and PGND connected to dissimilar voltages.
SS
PG
3
4
EN
FB
5
COMP
6
AGND
7, 8
9, 10
11
PHASE
VIN
VDD
12
13
(EPAD)
BOOT
PGND
FN7968 Rev.2.00
Jan 15, 2016
Page 4 of 23
ISL85003, ISL85003A
Ordering Information
PART NUMBER
(Notes
1, 2, 3)
ISL85003FRZ
ISL85003AFRZ
ISL85003EVAL2Z
ISL85003AEVAL2Z
ISL85003DEMO1Z
ISL85003ADEMO1Z
NOTES:
1. Add “-T” suffix for 6k unit, “-TK” suffix for 1k unit or “-T7A” suffix for 250 unit Tape and Reel options. Please refer to
TB347
for details on reel
specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil
Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see product information page for
ISL85003, ISL85003A.
For more information on MSL, please see tech
brief
TB363.
4. The ISL85003 is provided with a frequency synchronization input. The ISL85003A is a version of the part with programmable soft-start.
PART
MARKING
003F
003A
Evaluation Board
Evaluation Board
Demo Evaluation Board
Demo Evaluation Board
TEMP RANGE
(°C)
-40 to +125
-40 to +125
OPTION
SYNC
Soft-Start
FREQUENCY
(kHz)
500
500
PACKAGE
(RoHS Compliant)
12 Ld DFN
12 Ld DFN
PKG.
DWG. #
L12.3x4
L12.3x4
TABLE 1. COMPONENTS SELECTION (Refer to
Figures 1A
and
1B)
V
OUT
C
5
, C
6
C
8
C
9
C
1
L
1
R
1
R
2
0.8V
10µF
22µF
22µF
Open
1.8µH
301kΩ
Open
1V
10µF
22µF
22µF
Open
2.2µH
301kΩ
1.2MΩ
1.2V
10µF
22µF
22µF
Open
2.2µH
301kΩ
604kΩ
1.5V
10µF
47µF
22µF
4.7pF
3.3µH
301kΩ
344kΩ
1.8V
10µF
47µF
22µF
4.7pF
3.3µH
301kΩ
241kΩ
2.5V
10µF
47µF
22µF
4.7pF
3.3µH
301kΩ
142kΩ
3.3V
10µF
47µF
22µF
4.7pF
4.7µH
301kΩ
96.3kΩ
5V
10µF
47µF
22µF
4.7pF
4.7µH
301kΩ
57.1kΩ
NOTE: V
IN
= 12V, I
OUT
= 3A; The components selection table is a suggestion for typical application using internal compensation mode. For application
that required high output capacitance greater than 200µF, R
1
should be adjusted to maintain loop response bandwidth about 40kHz. See
“Loop
Compensation Design” on page 19
for more detail.
TABLE 2. KEY DIFFERENCES BETWEEN FAMILY OF PARTS
PART NUMBER
ISL85003
ISL85003A
INTERNAL/EXTERNAL
COMPENSATION
Yes
Yes
EXTERNAL FREQUENCY
SYNC
Yes
No
PROGRAMMABLE
SOFT-START
No
Yes
SWITCHING FREQUENCY
300kHz to 2MHz
500kHz
FN7968 Rev.2.00
Jan 15, 2016
Page 5 of 23
