6-Channel LED Driver with Phase Shift Control and
Frame Rate to Dimming Frequency
Synchronization
ISL97674
The ISL97674 is a 6-Channel 45V dual dimming capable
LED driver that can be used with either SMBus/I
2
C or
PWM signal for dimming control. The ISL97674 drives 6
channels of LED to support 78 LEDs from 4.5V to 26V or
48 LEDs from a boost supply of 2.7V to 26V and a
separate 5V bias on the ISL97674 VIN pin.
The ISL97674 compensates for non-uniformity of the
forward voltage drops in the LED strings with its 6 voltage
controlled-current source channels. Its headroom control
monitors the highest LED forward voltage string for output
regulation, to minimize the voltage headroom and power
loss in a typical multi string operation.
The ISL97674 features optional channel phase shift
control to minimize the input, output ripple
characteristics and load transients as well as spreading
the light output to help reduce the video and audio
interference from the backlight driver operation. The
phase shift can be programmed with equal phase angle
or adjustable in 7-bit resolution. In addition, the
ISL97674 also has a unique V
SYNC
function that accepts
30Hz ~ 120Hz frame signal and synchronizes it to the
dimming frequency to minimize panel to panel visual
interference variation. The dimming frequencies are
available from 200Hz to 30kHz and can be synchronized
from 140Hz to 1085Hz.
ISL97674
Features
• 6 Channels
• Frame Rate to Dimming Frequency Synchronization
• 4.5V to 26.5V Input
• 45V Output Max
• Up to 40mA LED Current per channel
• Extensive Dimming Control
- PWM/DPST Dimming, I
2
C 8-bit with equal phase
shift, and 0.007% Direct PWM dimming at 200Hz
• Optional Master Fault Protection
• PWM Dimming Linearity 0.4%~100% <30kHz
• 600kHz/1.2MHz selectable switching frequency
• Dynamic Headroom Control
• Protections with Flag Indication
- String Open/Short Circuit, V
OUT
Short Circuit,
Overvoltage and Over-Temperature Protections
- Optional Master Fault Protection
• Current Matching ±0.7%
• 20 Ld 4mmx3mm QFN Package
Applications
• Notebook Displays WLED or RGB LED Backlighting
• LCD Monitor LED Backlighting
• Automotive Displays LED Backlighting
Typical Application Circuit
V
IN
= 4.5~26.5V
V
OUT
= 45V*, 40mA PER STRING
ISL97674
1
FAULT
LX
20
OVP
16
2
VIN
4
VDC
18
COMP
7
SCL
6
SDA
3
EN/PWM
5
VSYNC
8
PGND
19
CH0
10
CH1
11
CH2
12
CH3
13
CH4
14
CH5
15
AGND
9
*V
IN
> 12V
PLLC
17
RSET
FIGURE 1. ISL97674 TYPICAL APPLICATION DIAGRAM
June 25, 2010
FN7634.0
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774
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Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2010. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
ISL97674
Block Diagram
VIN = 4.5V~26.5V
10uH/3A
VIN
VDC
FAULT
Bias
fsw
Fault/Status
Register
45V*,
40mA
per string
25mA
78 (6x13) LEDs
LX
4.7uF/50V
REG
OSC &
RAMP
Comp
O/P Short
OVP
Boost SW
OVP
Σ
=0
Imax
ILIMIT
Logic
FET
Drivers
Segmentation
Slew Rate Ctrl
PGND
Fault/Status Control
COMP
GM
AMP
Open Ckt, Short Ckt
Detects
p
e
Highest VF
String Detect
VSET
CH0
CH1
CH5
DAC0
DAC0
PWM0
Controls
+
-
0
RSET
+
-
REF
GEN
Temp
Sensor
Fault/Status
Register
PWM0
DAC1
DAC 1
PWM1
Controls
GND
EN/PWM
REF_OVP
REF_VSC
+
-
1
PWM
Ctrl Ckt
Dimming
Controller
Phase
Shift
Controller
PWM1
*V
> 12V
IN
* Vin > 6V
VSYNC
PLLC
SCL
SDA
PLL
DAC5
D AC5
PWM5
Controls
+
-
5
I2C
Control
PWM5
ISL97674
FIGURE 2. ISL97674 BLOCK DIAGRAM
2
FN7634.0
June 25, 2010
ISL97674
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
ISL97674IRZ
NOTES:
1. Add “-T” or “-TK” suffix for tape and reel. Please refer to
TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ
special Pb-free material sets, molding compounds/die
attach materials, and 100% matte tin plate plus anneal
(e3 termination finish, which is RoHS compliant and
compatible with both SnPb and Pb-free soldering
operations). Intersil Pb-free products are MSL classified at
Pb-free peak reflow temperatures that meet or exceed the
Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device
information page for
ISL97674.
For more information on
MSL please see techbrief
TB363.
PART
MARKING
7674
PACKAGE
(Pb-free)
PKG.
DWG. #
20 Ld 4x3 QFN L20.3x4
Pin Configuration
ISL97674
(20 LD QFN)
TOP VIEW
COMP
18
PGND
RSET
17
16 OVP
15 CH5
14 CH4
13 CH3
12 CH2
11 CH1
7
SCL
8
PLLC
9
AGND
10
CH0
LX
20
FAULT
VIN
EN/PWM
VDC
VSYNC
1
2
3
4
5
SDA 6
19
Pin Descriptions
PIN NAME PIN NO. TYPE
FAULT
VIN
EN/PWM
1
2
3
O
S
I
(I = Input, O = Output, S = Supply)
DESCRIPTION
Fault disconnect switch
Input voltage for the device and LED power
Dual Functions: Enable pin and PWM brightness control pin. The device needs 4ms for initial
power-up Enable, then this pin can be applied with a PWM signal with off time no longer than
28ms.
De-couple capacitor for internally generated supply rail.
Frame Rate to Dimming Frequency Synchronization Input
SMBus/I
2
C serial data input and output
SMBus/I
2
C serial clock input
RC Components Setting Pin for Internal Phase Lock Loop
Analog Ground for precision circuits
Input 0 to current source, FB, and monitoring
Input 1 to current source, FB, and monitoring
Input 2 to current source, FB, and monitoring
Input 3 to current source, FB, and monitoring
Input 4 to current source, FB, and monitoring
Input 5 to current source, FB, and monitoring
Overvoltage protection input
Resistor connection for setting LED current, (see Equation 1 for calculating the ILEDpeak)
Boost compensation pin
Power ground
Input to boost switch
VDC
VSYNC
SDA
SCL
PLLC
AGND
CH0
CH1
CH2
CH3
CH4
CH5
OVP
RSET
COMP
PGND
LX
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
S
I
I/O
I
I
S
I
I
I
I
I
I
I
I
O
S
O
3
FN7634.0
June 25, 2010
ISL97674
Table of Contents
Typical Application Circuit ................................. 1
Block Diagram ................................................... 2
Pin Descriptions (I = Input, O = Output,
S = Supply)..................................................... 3
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 5
Thermal Information . . . . . . . . . . . . . . . . . . . . . 5
Operating Conditions . . . . . . . . . . . . . . . . . . . . . 5
Electrical Specifications . . . . . . . . . . . . . . . . . . . 5
Typical Performance Curves .............................. 8
Theory of Operation......................................... 10
PWM Boost Converter ...................................... 10
Enable and PWM ............................................. 10
Current Matching and Current Accuracy ............. 10
Dynamic Headroom Control .............................. 11
Dimming Controls ........................................... 11
Maximum DC Current Setting . . . . . . . . . . . . . . . . . . 11
DC Current Adjustment . . . . . . . . . . . . . . . . . . . . . . . 11
PWM Control................................................... 11
Phase Shift Control . . . . . . . . . . . . . . . . . . . . . . . . . . 12
V
SYNC
Frame Rate to Dimming Synchronization ... 13
Switching Frequency........................................13
5V Low Dropout Regulator................................ 13
In-rush Control and Soft-Start .......................... 13
Fault Protection and Monitoring ......................... 13
Short Circuit Protection (SCP) ........................... 14
Open Circuit Protection (OCP) ........................... 14
Overvoltage Protection (OVP) ........................... 14
Undervoltage Lockout ..................................... 14
Input Overcurrent Protection............................ 14
Over-Temperature Protection (OTP) .................. 14
Write Byte ......................................................... 17
Read Byte ......................................................... 17
Slave Device Address.......................................... 17
SMBus/I
2
C Register Definitions......................... 17
PWM Brightness Control Register (0x00)............ 19
Device Control Register (0x01)......................... 20
Fault/Status Register (0x02) ............................ 20
Si Revision Register (0x03) .............................. 20
DC Brightness Control Register (0x07) .............. 22
Configuration Register (0x08) .......................... 22
Output Channel Select and Fault Readout
Register (0x09) ............................................ 22
Phase Shift Control Register (0x0A) .................. 24
PLL Control Register (0x0B) ............................. 24
Components Selections ................................... 24
Input Capacitor ..............................................
Inductor ........................................................
Output Capacitors...........................................
Channel Capacitor ..........................................
Output Ripple.................................................
Schottky Diode...............................................
24
25
25
25
25
26
Applications .................................................... 26
High Current Applications ................................ 26
Multiple Drivers Operation ............................... 26
Revision History .............................................. 27
Products.......................................................... 27
Package Outline Drawing ................................ 28
4
FN7634.0
June 25, 2010
ISL97674
Absolute Maximum Ratings
(T
A
= +25°C)
VIN, EN/PWM. . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 28V
FAULT . . . . . . . . . . . . . . . . . . . . . VIN - 8.5V to VIN + 0.3V
VDC, COMP, RSET, OVP . . . . . . . . . . . . . . . . . -0.3V to 5.5V
SCL, SDA, VSYNC, PLLC . . . . . . . . . . . . . . . . -0.3V to 5.5V
CH0 - CH5, LX . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 45V
PGND, AGND . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +0.3V
Above voltage ratings are all with respect to AGND pin
ESD Rating
Human Body Model (Tested per JESD22-A114E) . . . . . 3kV
Machine Model (Tested per JESD22-A115-A) . . . . . . . 300V
Charged Device Model . . . . . . . . . . . . . . . . . . . . . . . 1kV
Thermal Information
Thermal Resistance (Typical)
20 Ld QFN Package (Notes 4, 5, 7).
Thermal Characterization (Typical)
θ
JA
(°C/W)
θ
JC
(°C/W)
40
2.5
PSI
JT
(°C/W)
20 Ld QFN Package (Note 6) . . . . . . . . . . . .
1
Maximum Continuous Junction Temperature . . . . . . +125°C
Storage Temperature . . . . . . . . . . . . . . . -65°C to +150°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Operating Conditions
Temperature Range . . . . . . . . . . . . . . . . . . -40°C to +85°C
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless
otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: T
J
= T
C
= T
A
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
NOTES:
4.
θ
JA
is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach”
features. See Tech Brief TB379.
5. For
θ
JC
, the “case temp” location is the center of the exposed metal pad on the package underside.
6. PSI
JT
is the PSI junction-to-top thermal characterization parameter. If the package top temperature can be measured with this
rating then the die junction temperature can be estimated more accurately than the
θ
JC
and
θ
JC
thermal resistance ratings.
7. Refer to JESD51-7 high effective thermal conductivity board layout for proper via and plane designs.
Electrical Specifications
All specifications below are tested at T
A
= +25°C; V
IN
= 12V, EN/PWM = 5V, R
SET
= 20.1kΩ,
unless otherwise noted.
Boldface limits apply over the operating temperature range,
-40°C to +85°C.
CONDITION
≤13
LEDs per channel (3.2V/20mA
type)
4.5V < V
IN
≤
26V,
F
SW
= 600kHz
8.55V < V
IN
≤
26V,
F
SW
= 1.2MHz
4.5V < V
IN
≤
8.55V, F
SW
= 1.2MHz
MIN
(Note 8)
4.5
TYP
MAX
(Note 8)
26.5
10
45
45
V
IN
/0.19
2.6
275
V
IN
> 6V
EN/PWM = 0V
EN/PWM = 5V
V
IN
> 5.5V, 20mA
5
20
200
0.5
1.8
30.5
4.55
4.8
5
5
3.3
UNIT
V
µA
V
V
V
V
mV
V
µA
mA
mV
V
V
ms
PARAMETER
GENERAL
V
IN
(Note 9)
I
VIN_STBY
V
OUT
DESCRIPTION
Backlight Supply Voltage
V
IN
Shutdown Current
Output Voltage
V
UVLO
V
UVLO_HYS
REGULATOR
V
DC
I
VDC_STBY
I
VDC
V
LDO
ENLow
ENHi
t
ENLow
Undervoltage Lock-out Threshold
Undervoltage Lock-out Hysteresis
LDO Output Voltage
Standby Current
Active Current
VDC LDO Droop Voltage
Guaranteed Range for EN Input Low
Voltage
Guaranteed Range for EN Input High
Voltage
EN/PWM low time before shut-down
5
FN7634.0
June 25, 2010
微控制器 MCU
