ISP1181A
Full-speed Universal Serial Bus peripheral controller
Rev. 05 — 08 December 2004
Product data
1. General description
The ISP1181A is a Universal Serial Bus (USB) peripheral controller that complies
with
Universal Serial Bus Specification Rev. 2.0,
supporting data transfer at full-speed
(12 Mbit/s). It provides full-speed USB communication capacity to microcontroller or
microprocessor-based systems. The ISP1181A communicates with the system’s
microcontroller or microprocessor through a high-speed general-purpose parallel
interface.
The ISP1181A supports fully autonomous, multi-configurable Direct Memory Access
(DMA) operation.
The modular approach to implementing a USB peripheral controller allows the
designer to select the optimum system microcontroller from the wide variety available.
The ability to reuse existing architecture and firmware investments shortens
development time, eliminates risks and reduces costs. The result is fast and efficient
development of the most cost-effective USB peripheral solution.
The ISP1181A is ideally suited for application in many personal computer peripherals
such as printers, communication devices, scanners, external mass storage (Zip
®
drive) devices and digital still cameras. It offers an immediate cost reduction for
applications that currently use SCSI implementations.
2. Features
s
Complies with
Universal Serial Bus Specification Rev. 2.0
and most Device Class
specifications
s
Supports data transfer at full-speed (12 Mbit/s)
s
High performance USB peripheral controller with integrated Serial Interface
Engine (SIE), FIFO memory, transceiver and 3.3 V voltage regulator
s
High speed (11.1 Mbyte/s or 90 ns read/write cycle) parallel interface
s
Fully autonomous and multi-configuration DMA operation
s
Up to 14 programmable USB endpoints with 2 fixed control IN/OUT endpoints
s
Integrated physical 2462 bytes of multi-configuration FIFO memory
s
Endpoints with double buffering to increase throughput and ease real-time data
transfer
s
Seamless interface with most microcontrollers/microprocessors
s
Bus-powered capability with low power consumption and low ‘suspend’ current
s
6 MHz crystal oscillator input with integrated PLL for low EMI
s
Controllable LazyClock (100 kHz
±
50 %) output during ‘suspend’
s
Software controlled connection to the USB bus (SoftConnect™)
s
Good USB connection indicator that blinks with traffic (GoodLink™)
Philips Semiconductors
ISP1181A
Full-speed USB peripheral controller
Clock output with programmable frequency (up to 48 MHz)
Complies with the ACPI™, OnNow™ and USB power management requirements
Internal power-on and low-voltage reset circuit, with possibility of a software reset
Operation over the extended USB bus voltage range (4.0 V to 5.5 V) with 5 V
tolerant I/O pads
s
Operating temperature range
−40 °C
to
+85 °C
s
Full-scan design with high fault coverage
s
Available in TSSOP48 and HVQFN48 packages.
s
s
s
s
3. Applications
s
Personal Digital Assistant (PDA)
s
Digital camera
s
Communication device, for example:
x
Router
x
Modem
s
Mass storage device, for example:
x
Zip drive
s
Printer
s
Scanner.
4. Ordering information
Table 1:
Ordering information
Package
Name
ISP1181ADGG
ISP1181ABS
TSSOP48
HVQFN48
Description
Plastic thin shrink small outline package; 48 leads; body width 6.1 mm
Plastic thermal enhanced very thin quad flat package; no leads;
48 terminals; body 7
×
7
×
0.85 mm
Version
SOT362-1
SOT619-2
Type number
9397 750 13959
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 05 — 08 December 2004
2 of 70
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9397 750 13959
Product data
6 MHz
CLKOUT
XTAL1
XTAL2
47
48
MHz
17
18
PROGR.
DIVIDER
DMA
HANDLER
to/from
microcontroller
BUS_CONF0
BUS_CONF1
45
11
10, 12
48
PLL
OSCILLATOR
BIT CLOCK
RECOVERY
38, 35 to 27,
24 to 19 16
BUS
INTERFACE
43 to 39
5
2
DREQ
EOT, DACK
to LED
7
PHILIPS
SIE
MEMORY
MANAGEMENT
UNIT
MICRO
CONTROLLER
HANDLER
AD0,
DATA1 to DATA9,
DATA10 to DATA15
CS, ALE, WR,
RD, A0
15
internal
reset
INTEGRATED
RAM
ENDPOINT
HANDLER
INT
3.3 V
3.3 V
INTERNAL
SUPPLY
I/O PIN
SUPPLY
to/from USB
5. Block diagram
D+
D− VBUS
GL
Philips Semiconductors
sense
input
5
4
6
3.3 V
HUB
GoodLink
1.5
kΩ
SoftConnect
ANALOG
Tx/Rx
Rev. 05 — 08 December 2004
ISP1181A
9
25, 36, 46
3
SUSPEND WAKEUP
GND
VCC(3.3)
Vref
37
8
26
004aaa020
RESET
44
POWER-ON
RESET
VCC
1
VOLTAGE
REGULATOR
2
3
REGGND
Vreg(3.3)
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
ISP1181A
Full-speed USB peripheral controller
3 of 70
Fig 1. Block diagram.
Philips Semiconductors
ISP1181A
Full-speed USB peripheral controller
6. Pinning information
6.1 Pinning
VCC 1
REGGND 2
Vreg(3.3) 3
D− 4
D+ 5
VBUS 6
GL 7
WAKEUP 8
SUSPEND 9
EOT 10
DREQ 11
DACK 12
48 XTAL1
47 XTAL2
46 GND
45 CLKOUT
44 RESET
43 CS
42 ALE
41 WR
40 RD
39 A0
38 AD0
37 VCC(3.3)
ISP1181ADGG
TEST1
13
TEST2
14
INT 15
TEST3
16
BUS_CONF0 17
BUS_CONF1 18
DATA15 19
DATA14 20
DATA13 21
DATA12 22
DATA11 23
DATA10 24
004aaa019
36 GND
35 DATA1
34 DATA2
33 DATA3
32 DATA4
31 DATA5
30 DATA6
29 DATA7
28 DATA8
27 DATA9
26 Vref
25 GND
Fig 2. Pin configuration TSSOP48.
9397 750 13959
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 05 — 08 December 2004
4 of 70
Philips Semiconductors
ISP1181A
Full-speed USB peripheral controller
13 BUS_CONF1
14 DATA15
15 DATA14
16 DATA13
17 DATA12
18 DATA11
19 DATA10
BUS_CONF0 12
TEST3 11
INT 10
TEST2 9
TEST1
DACK
DREQ
EOT
SUSPEND
WAKEUP
GL
VBUS
8
7
6
5
4
3
2
1
Vreg(3.3) 46
REGGND 45
VCC 44
XTAL1 43
XTAL2 42
GND 41
CLKOUT 40
RESET 39
CS 38
ALE 37
D+ 48
D− 47
23 DATA8
24 DATA7
25 DATA6
26 DATA5
27 DATA4
28 DATA3
29 DATA2
30 DATA1
31 GND
32 VCC(3.3)
33 AD0
34 A0
35 RD
36 WR
ISP1181ABS
Bottom view
22 DATA9
20 GND
21 Vref
004aaa021
Fig 3. Pin configuration HVQFN48.
6.2 Pin description
Table 2:
Symbol
[1]
V
CC
REGGND
V
reg(3.3)
Pin description
Pin
TSSOP48
1
2
3
HVQFN48
44
45
46
-
-
-
supply voltage (3.3 V or 5.0 V)
voltage regulator ground supply
regulated supply voltage (3.3 V
±
10 %)
from internal regulator; used to connect
decoupling capacitor and pull-up resistor on
D+ line;
Remark:
Cannot be used to supply external
devices.
D−
D+
V
BUS
GL
4
5
6
7
47
48
1
2
AI/O
AI/O
I
O
USB D− connection (analog)
USB D+ connection (analog)
V
BUS
sensing input
GoodLink LED indicator output (open-drain,
8 mA); the LED is default ON, blinks OFF
upon USB traffic; to connect an LED use a
series resistor of 470
Ω
(V
CC
= 5.0 V) or
330
Ω
(V
CC
= 3.3 V)
wake-up input (edge triggered,
LOW to HIGH); generates a remote
wake-up from ‘suspend’ state
‘suspend’ state indicator output (4 mA);
used as power switch control output (active
LOW) for powered-off application
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Type
Description
WAKEUP
8
3
I
SUSPEND
9
4
O
9397 750 13959
Product data
Rev. 05 — 08 December 2004
5 of 70
