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K4S511633C-YN1H

Synchronous DRAM, 32MX16, 7ns, CMOS, PBGA54, CSP-54

器件类别：存储    存储   

厂商名称：SAMSUNG(三星)

厂商官网：http://www.samsung.com/Products/Semiconductor/

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参数 预览 参数对比
器件参数
参数名称
属性值
是否Rohs认证
不符合
厂商名称
SAMSUNG(三星)
零件包装代码
BGA
包装说明
LFBGA, BGA54,9X9,32
针数
54
Reach Compliance Code
compliant
ECCN代码
EAR99
访问模式
FOUR BANK PAGE BURST
最长访问时间
7 ns
其他特性
AUTO/SELF REFRESH
最大时钟频率 (fCLK)
100 MHz
I/O 类型
COMMON
交错的突发长度
1,2,4,8
JESD-30 代码
R-PBGA-B54
JESD-609代码
e0
长度
15.5 mm
内存密度
536870912 bit
内存集成电路类型
SYNCHRONOUS DRAM
内存宽度
16
功能数量
1
端口数量
1
端子数量
54
字数
33554432 words
字数代码
32000000
工作模式
SYNCHRONOUS
最高工作温度
85 °C
最低工作温度
-25 °C
组织
32MX16
输出特性
3-STATE
封装主体材料
PLASTIC/EPOXY
封装代码
LFBGA
封装等效代码
BGA54,9X9,32
封装形状
RECTANGULAR
封装形式
GRID ARRAY, LOW PROFILE, FINE PITCH
峰值回流温度（摄氏度）
NOT SPECIFIED
电源
3 V
认证状态
Not Qualified
刷新周期
8192
座面最大高度
1.3 mm
自我刷新
YES
连续突发长度
1,2,4,8,FP
最大待机电流
0.002 A
最大压摆率
0.335 mA
最大供电电压 (Vsup)
3.6 V
最小供电电压 (Vsup)
2.7 V
标称供电电压 (Vsup)
3 V
表面贴装
YES
技术
CMOS
温度等级
OTHER
端子面层
Tin/Lead (Sn/Pb)
端子形式
BALL
端子节距
0.8 mm
端子位置
BOTTOM
处于峰值回流温度下的最长时间
NOT SPECIFIED
宽度
9.5 mm
文档预览
K4S511633C-YL/N/P
CMOS SDRAM
32Mx16
Mobile SDRAM
54CSP 1/CS
(VDD/VDDQ 3.0V/3.0V or 3.3V/3.3V)
Revision 1.2
December 2002
Rev. 1.2 Dec. 2002
K4S511633C-YL/N/P
8M x 16Bit x 4 Banks Mobile SDRAM
FEATURES
• 3.0V power supply
• LVCMOS compatible with multiplexed address
• Four banks operation
• MRS cycle with address key programs
-. CAS latency (1 & 2 & 3)
-. Burst length (1, 2, 4, 8 & Full page)
-. Burst type (Sequential & Interleave)
• All inputs are sampled at the positive going edge of the system
clock.
• Burst read single-bit write operation
• DQM for masking
• Auto & self refresh
• 64ms refresh period (8K cycle)
• 1 /CS Support.
• Commercial Temperature Operation (-25°C ~ 70
°C).
Extended Temperature Operation (-25°C ~ 85°C).
Industrial Temperature Operation (-40°C ~ 85°C).
• 54balls DDP CSP
K4S511633C-YL/N80
K4S511633C-YL/N1H
K4S511633C-YL/N1L
CMOS SDRAM
GENERAL DESCRIPTION
The K4S511633C is 536,870,912 bits synchronous high data
rate Dynamic RAM organized as 4 x 8,388,608 words by 16bits,
fabricated with SAMSUNG's high performance CMOS technology.
Synchronous design allows precise cycle control with the use of
system clock I/O transactions are possible on every clock cycle.
Range of operating frequencies, programmable burst length and
programmable latencies allow the same device to be useful for a
variety of high bandwidth, high performance memory system
applications.
ORDERING INFORMATION
Part No.
Max Freq.
125MHz(CL=3)
100MHz(CL=2)
100MHz(CL=2)
100MHz(CL=3)
*1
LVCMOS
54 CSP
Interface
Package
- YN : Low Power, Operating Temp : -25°C ~ 85
°C.
- YL : Low Power, Operating Temp : -25°C ~ 70
°C.
- YP : Low Power, Operating Temp : -40
°C
~ 85
°C.
Note :
1. In case of 33MHz Frequency, CL1 can be supported.
FUNCTIONAL BLOCK DIAGRAM
I/O Control
LWE
Data Input Register
LDQM
Bank Select
8M x 16
Sense AMP
8M x 16
8M x 16
8M x 16
Refresh Counter
Output Buffer
Row Decoder
Row Buffer
DQi
Address Register
CLK
ADD
Column Decoder
Col. Buffer
Latency & Burst Length
LRAS
LCBR
LCKE
LRAS
LCBR
LWE
LCAS
Programming Register
LWCBR
LDQM
Timing Register
* Samsung Electronics reserves the right to
change products or specification without
notice.
CLK
CKE
CS
RAS
CAS
WE
DQM
Rev. 1.2 Dec. 2002
K4S511633C-YL/N/P
Package Dimension and Pin Configuration
< Bottom View
*1
>
E
1
CMOS SDRAM
< Top View
*2
>
54Ball(6x9) CSP
1
2
DQ15
DQ13
DQ11
DQ9
NC
CLK
A11
A7
A5
3
V
SSQ
V
DDQ
V
SSQ
V
DDQ
V
SS
CKE
A9
A6
A4
7
V
DDQ
V
SSQ
V
DDQ
V
SSQ
V
D D
CAS
BA0
A0
A3
8
DQ0
DQ2
DQ4
DQ6
LDQM
RAS
BA1
A1
A2
9
V
D D
DQ1
DQ3
DQ5
DQ7
WE
CS
A10
V
D D
9
A
8
7
6
5
4
3
2
1
e
A
B
C
D
E
F
G
H
J
D/2
D
V
SS
DQ14
DQ12
DQ10
DQ8
UDQM
A12
A8
V
SS
B
C
D
D
1
E
F
G
H
J
E
E/2
Pin Name
CLK
CS
CKE
A
0
~ A
12
BA
0
~ BA
1
RAS
A
A1
Pin Function
System Clock
Chip Select
Clock Enable
Address
Bank Select Address
Row Address Strobe
Column Address Strobe
Write Enable
Data Input/Output Mask
Data Input/Output
Power Supply/Ground
Data Output Power/Ground
*2: Top View
CAS
WE
L(U)DQM
D Q
0
~
15
V
DD
/V
SS
V
DDQ
/V
SSQ
Max. 0.20
Encapsulant
b
z
*1: Bottom View
< Top
View
*2
>
#A1 Ball Origin Indicator
K4S511633C-XXXX
SAMSUNG
Week
[Unit:mm]
Symbol
A
A
1
E
E
1
D
D
1
e
b
z
Min
1.00
0.27
-
-
-
-
-
0.40
-
Typ
1.10
0.32
9.50
6.40
15.50
6.40
0.80
0.45
-
Max
1.30
0.37
-
-
-
-
-
0.50
0.10
Rev. 1.2 Dec. 2002
K4S511633C-YL/N/P
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on any pin relative to Vss
Voltage on V
D D
supply relative to Vss
Storage temperature
Power dissipation
Short circuit current
Symbol
V
I N
, V
O U T
V
DD
, V
DDQ
T
STG
P
D
I
OS
Value
-1.0 ~ 4.6
-1.0 ~ 4.6
-55 ~ +150
1
50
CMOS SDRAM
Unit
V
V
°C
W
mA
Notes :
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
=Commercial, Extended and Industrial)
Parameter
Supply voltage
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current
Symbol
V
D D
V
DDQ
V
I H
V
IL
V
O H
V
OL
I
LI
Min
2.7
2.7
2.2
-0.3
2.4
-
-10
Typ
3.0
3.0
3.0
0
-
-
-
Max
3.6
3.6
V
DDQ
+0.3
0.5
-
0.4
10
Unit
V
V
V
V
V
V
uA
1
2
I
O H
= -2mA
I
OL
= 2mA
3
Note
Notes :
1. V
IH
(max) = 5.3V AC. The overshoot voltage duration is
≤
3ns.
2. V
IL
(min) = -2.0V AC. The undershoot voltage duration is
≤
3ns.
3. Any input 0V
≤
V
IN
≤
V
DDQ
.
Input leakage currents include HI-Z output leakage for all bi-directional buffers with tri-state outputs.
4. Dout is disabled, 0V
≤
V
OUT
≤
V
DDQ.
CAPACITANCE
Clock
(V
DD
= 3.0V, T
A
= 23°C, f = 1MHz, V
REF
=0.9V
±
50 mV)
Pin
Symbol
C
CLK
C
IN
C
IN
C
ADD
C
OUT
Min
3.0
3.0
1.5
3.0
3.0
Max
9.0
9.0
4.5
9.0
6.5
Unit
pF
pF
pF
pF
pF
Note
RAS, CAS, WE, CS, CKE
DQM
Address
D Q
0
~ DQ
15
Rev. 1.2 Dec. 2002
K4S511633C-YL/N/P
DC CHARACTERISTICS
CMOS SDRAM
Recommended operating conditions (Voltage referenced to V
SS
= 0V, T
A
=Commercial, Extended and Industrial)
Parameter
Symbol
Burst length = 1
t
RC
≥
t
R C
(min)
I
O
= 0 mA
CKE
≤
V
IL
(max), t
CC
= 10ns
Test Condition
-80
Operating Current
(One Bank Active)
Precharge Standby Current
in power-down mode
I
CC1
160
Version
-1H
155
-1L
145
mA
1
Unit
Note
I
CC2
P
2
2
35
I
C C 2
PS CKE & CLK
≤
V
IL
(max), t
CC
=
∞
I
CC2
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
CKE
≤
V
IL
(max), t
CC
= 10ns
mA
Precharge Standby Current
in non power-down mode
I
CC2
NS
Active Standby Current
in power-down mode
I
CC3
P
mA
25
15
15
50
mA
I
C C 3
PS CKE & CLK
≤
V
IL
(max), t
CC
=
∞
I
CC3
N
CKE
≥
V
IH
(min), CS
≥
V
IH
(min), t
CC
= 10ns
Input signals are changed one time during 20ns
CKE
≥
V
IH
(min), CLK
≤
V
IL
(max), t
CC
=
∞
Input signals are stable
I
O
= 0 mA
Page burst
4Banks Activated
t
CCD
= 2CLKs
t
RC
≥
t
R C
(min)
-YL
mA
Active Standby Current
in non power-down mode
(One Bank Active)
I
CC3
NS
45
mA
Operating Current
(Burst Mode)
Refresh Current
I
CC4
230
210
210
mA
1
I
CC5
350
335
305
mA
2
3
Self Refresh Current
I
CC6
CKE
≤
0.2V
-YN
-YP
1800
uA
4
5
Notes :
1. Measured with outputs open.
2. Refresh period is 64ms.
3.
4.
5.
6.
K4S511633C-YL**
K4S511633C-YN**
K4S511633C-YP**
Unless otherwise noted, input swing IeveI is CMOS(V
IH
/V
IL
=V
DDQ
/V
SSQ)
Rev. 1.2 Dec. 2002
查看更多>
参数对比
与K4S511633C-YN1H相近的元器件有：K4S511633C-YL1H、K4S511633C-YP1H、K4S511633C-YN1L、K4S511633C-YP1L、K4S511633C-YL1L、K4S511633C-YP80、K4S511633C-YN80、K4S511633C-YL80。描述及对比如下：
型号 K4S511633C-YN1H K4S511633C-YL1H K4S511633C-YP1H K4S511633C-YN1L K4S511633C-YP1L K4S511633C-YL1L K4S511633C-YP80 K4S511633C-YN80 K4S511633C-YL80
描述 Synchronous DRAM, 32MX16, 7ns, CMOS, PBGA54, CSP-54 Synchronous DRAM, 32MX16, 7ns, CMOS, PBGA54, CSP-54 Synchronous DRAM, 32MX16, 7ns, CMOS, PBGA54, CSP-54 Synchronous DRAM, 32MX16, 7ns, CMOS, PBGA54, CSP-54 Synchronous DRAM, 32MX16, 7ns, CMOS, PBGA54, CSP-54 Synchronous DRAM, 32MX16, 7ns, CMOS, PBGA54, CSP-54 Synchronous DRAM, 32MX16, 6ns, CMOS, PBGA54, CSP-54 Synchronous DRAM, 32MX16, 6ns, CMOS, PBGA54, CSP-54 Synchronous DRAM, 32MX16, 6ns, CMOS, PBGA54, CSP-54
零件包装代码 BGA BGA BGA BGA BGA BGA BGA BGA BGA
包装说明 LFBGA, BGA54,9X9,32 LFBGA, BGA54,9X9,32 LFBGA, LFBGA, BGA54,9X9,32 LFBGA, LFBGA, BGA54,9X9,32 LFBGA, LFBGA, BGA54,9X9,32 LFBGA, BGA54,9X9,32
针数 54 54 54 54 54 54 54 54 54
Reach Compliance Code compliant compliant unknown compliant unknown compliant unknown compliant compliant
ECCN代码 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
访问模式 FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST FOUR BANK PAGE BURST
最长访问时间 7 ns 7 ns 7 ns 7 ns 7 ns 7 ns 6 ns 6 ns 6 ns
其他特性 AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH
JESD-30 代码 R-PBGA-B54 R-PBGA-B54 R-PBGA-B54 R-PBGA-B54 R-PBGA-B54 R-PBGA-B54 R-PBGA-B54 R-PBGA-B54 R-PBGA-B54
长度 15.5 mm 15.5 mm 15.5 mm 15.5 mm 15.5 mm 15.5 mm 15.5 mm 15.5 mm 15.5 mm
内存密度 536870912 bit 536870912 bit 536870912 bit 536870912 bit 536870912 bit 536870912 bit 536870912 bit 536870912 bit 536870912 bit
内存集成电路类型 SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM SYNCHRONOUS DRAM
内存宽度 16 16 16 16 16 16 16 16 16
功能数量 1 1 1 1 1 1 1 1 1
端口数量 1 1 1 1 1 1 1 1 1
端子数量 54 54 54 54 54 54 54 54 54
字数 33554432 words 33554432 words 33554432 words 33554432 words 33554432 words 33554432 words 33554432 words 33554432 words 33554432 words
字数代码 32000000 32000000 32000000 32000000 32000000 32000000 32000000 32000000 32000000
工作模式 SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
最高工作温度 85 °C 70 °C 85 °C 85 °C 85 °C 70 °C 85 °C 85 °C 70 °C
最低工作温度 -25 °C -25 °C -40 °C -25 °C -40 °C -25 °C -40 °C -25 °C -25 °C
组织 32MX16 32MX16 32MX16 32MX16 32MX16 32MX16 32MX16 32MX16 32MX16
封装主体材料 PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
封装代码 LFBGA LFBGA LFBGA LFBGA LFBGA LFBGA LFBGA LFBGA LFBGA
封装形状 RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
封装形式 GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH GRID ARRAY, LOW PROFILE, FINE PITCH
认证状态 Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
座面最大高度 1.3 mm 1.3 mm 1.3 mm 1.3 mm 1.3 mm 1.3 mm 1.3 mm 1.3 mm 1.3 mm
自我刷新 YES YES YES YES YES YES YES YES YES
最大供电电压 (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V 3.6 V
最小供电电压 (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V
标称供电电压 (Vsup) 3 V 3 V 3 V 3 V 3 V 3 V 3 V 3 V 3 V
表面贴装 YES YES YES YES YES YES YES YES YES
技术 CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS CMOS
温度等级 OTHER OTHER INDUSTRIAL OTHER INDUSTRIAL OTHER INDUSTRIAL OTHER OTHER
端子形式 BALL BALL BALL BALL BALL BALL BALL BALL BALL
端子节距 0.8 mm 0.8 mm 0.8 mm 0.8 mm 0.8 mm 0.8 mm 0.8 mm 0.8 mm 0.8 mm
端子位置 BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM BOTTOM
宽度 9.5 mm 9.5 mm 9.5 mm 9.5 mm 9.5 mm 9.5 mm 9.5 mm 9.5 mm 9.5 mm
是否Rohs认证 不符合 不符合 - 不符合 - 不符合 - 不符合 不符合
厂商名称 SAMSUNG(三星) - - SAMSUNG(三星) SAMSUNG(三星) SAMSUNG(三星) SAMSUNG(三星) SAMSUNG(三星) SAMSUNG(三星)
最大时钟频率 (fCLK) 100 MHz 100 MHz - 100 MHz - 100 MHz - 125 MHz 125 MHz
I/O 类型 COMMON COMMON - COMMON - COMMON - COMMON COMMON
交错的突发长度 1,2,4,8 1,2,4,8 - 1,2,4,8 - 1,2,4,8 - 1,2,4,8 1,2,4,8
JESD-609代码 e0 e0 - e0 - e0 - e0 e0
输出特性 3-STATE 3-STATE - 3-STATE - 3-STATE - 3-STATE 3-STATE
封装等效代码 BGA54,9X9,32 BGA54,9X9,32 - BGA54,9X9,32 - BGA54,9X9,32 - BGA54,9X9,32 BGA54,9X9,32
峰值回流温度（摄氏度） NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED - NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED
电源 3 V 3 V - 3 V - 3 V - 3 V 3 V
刷新周期 8192 8192 - 8192 - 8192 - 8192 8192
连续突发长度 1,2,4,8,FP 1,2,4,8,FP - 1,2,4,8,FP - 1,2,4,8,FP - 1,2,4,8,FP 1,2,4,8,FP
最大待机电流 0.002 A 0.002 A - 0.002 A - 0.002 A - 0.002 A 0.002 A
最大压摆率 0.335 mA 0.335 mA - 0.305 mA - 0.305 mA - 0.35 mA 0.35 mA
端子面层 Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) - Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
处于峰值回流温度下的最长时间 NOT SPECIFIED NOT SPECIFIED - NOT SPECIFIED - NOT SPECIFIED - NOT SPECIFIED NOT SPECIFIED
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器件捷径:
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