K8D1716UTC / K8D1716UBC
FLASH MEMORY
Document Title
16M Bit (2M x8/1M x16) Dual Bank NOR Flash Memory
Revision History
Revision No. History
0.0
0.1
0.2
1.0
Initial Draft
Support 48TSOP1 Lead Free Package
Support 48FBGA Leaded/Lead Free Package
Specification finalized
Draft Date
July 25, 2004
Sep 16, 2004
Nov 29, 2004
Dec 16, 2004
Remark
Advance
Preliminary
Preliminary
1
Revision 1.0
December 2004
K8D1716UTC / K8D1716UBC
16M Bit (2M x8/1M x16) Dual Bank NOR Flash Memory
FEATURES
•
Single Voltage, 2.7V to 3.6V for Read and Write operations
•
Organization
1,048,576 x 16 bit (Word mode)
•
Fast Read Access Time : 70ns
•
Read While Program/Erase Operation
•
Dual Bank architectures
Bank 1 / Bank 2 : 8Mb / 8Mb
•
Secode(Security Code) Block : Extra 64K Byte block
•
Power Consumption (typical value @5MHz)
- Read Current : 14mA
- Program/Erase Current : 15mA
- Read While Program or Read While Erase Current : 25mA
- Standby Mode/Auto Sleep Mode : 5µA
•
WP/ACC input pin
- Allows special protection of two outermost boot blocks at V
IL
,
regardless of block protect status
- Removes special protection of two outermost boot block at V
IH,
the two blocks return to normal block protect status
- Program time at V
HH
: 9µs/word
•
Erase Suspend/Resume
•
Unlock Bypass Program
•
Hardware RESET Pin
•
Command Register Operation
•
Block Group Protection / Unprotection
•
Supports Common Flash Memory Interface
•
Industrial Temperature : -40°C to 85°C
•
Endurance : 100,000 Program/Erase Cycles Minimum
•
Data Retention : 10 years
•
Package : 48 Pin TSOP1 : 12 x 20 mm / 0.5 mm Pin pitch
48 Ball FBGA : 6 x 8.5 mm / 0.8 mm Ball pitch
FLASH MEMORY
GENERAL DESCRIPTION
The K8D1716U featuring single 3.0V power supply, is a 16Mbit
NOR-type Flash Memory organized as 2Mx8 or 1M x16. The
memory architecture of the device is designed to divide its
memory arrays into 39 blocks to be protected by the block
group. This block architecture provides highly flexible erase and
program capability. The K8D1716U NOR Flash consists of two
banks. This device is capable of reading data from one bank
while programming or erasing in the other bank. Access times
of 70ns, 80ns and 90ns are available for the device. The
device′s fast access times allow high speed microprocessors to
operate without wait states. The device performs a program
operation in units of 8 bits (Byte) or 16 bits (Word) and erases in
units of a block. Single or multiple blocks can be erased. The
block erase operation is completed within typically 0.7 sec. The
device requires 15mA as program/erase current in the standard
and industrial temperature ranges.
The K8D1716U NOR Flash Memory is created by using Sam-
sung's advanced CMOS process technology. This device is
available in 48 pin TSOP1 and 48 ball FBGA package. The
device is compatible with EPROM applications to require high-
density and cost-effective nonvolatile read/write storage solu-
tions.
PIN DESCRIPTION
Pin Name
A0 - A19
Pin Function
Address Inputs
Data Inputs / Outputs
DQ15 Data Input / Output
A-1 LSB Address
Word / Byte Selection
Chip Enable
Output Enable
Hardware Reset Pin
Ready/Busy Output
Write Enable
Hardware Write Protection/Program
Acceleration
Power Supply
Ground
No Connection
PIN CONFIGURATION
A15
A14
A13
A12
A11
A10
A9
A8
A19
N.C
WE
RESET
N.C
WP/ACC
RY/BY
A18
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
A16
BYTE
Vss
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
Vcc
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE
Vss
CE
A0
DQ0 - DQ14
DQ15/A-1
BYTE
CE
OE
RESET
RY/BY
WE
WP/ACC
48-pin TSOP1
Standard Type
12mm x 20mm
Note :
Please refer to the package dimension.
Vcc
V
SS
N.C
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
2
Revision 1.0
December 2004
K8D1716UTC / K8D1716UBC
48 Ball FBGA TOP VIEW (BALL DOWN)
1
2
3
4
5
6
FLASH MEMORY
A
A3
A7
RY/BY
WE
A9
A13
B
A4
A17
WP/
ACC
RESET
A8
A12
C
A2
A6
A18
N.C
A10
A14
D
A1
A5
N.C
A19
A11
A15
E
A0
DQ0
DQ2
DQ5
DQ7
A16
F
CE
DQ8
DQ10
DQ12
DQ14
BYTE
G
OE
DQ9
DQ11
V
CC
DQ13
DQ15/
A-1
H
V
SS
DQ1
DQ3
DQ4
DQ6
V
SS
FUNCTIONAL BLOCK DIAGRAM
Vcc
Vss
Bank1
Address
X
Dec
Bank1
Cell Array
Y Dec
CE
OE
WE
BYTE
RESET
RY/BY
WP/ACC
I/O
Interface
&
Bank
Control
Bank1 Data-In/Out
Bank2 Data-In/Out
Latch &
Control
Y Dec
Bank2
Address
Latch &
Control
X
Dec
Bank2
Cell Array
A0~A19
DQ15/A-1
DQ0~DQ14
Erase
Control
High
Voltage
Gen.
Program
Control
3
Revision 1.0
December 2004
K8D1716UTC / K8D1716UBC
ORDERING INFORMATION
FLASH MEMORY
K 8 D 17 1 6 U T C - Y I 0 7
Samsung
NOR Flash Memory
Device Type
Dual Bank Boot Block
Access Time
07 = 70 ns
08 = 80 ns
09 = 90 ns
Operating Temperature Range
C = Commercial Temp. (0
°C
to 70
°C)
I = Industrial Temp. (-40
°C
to 85
°C)
Package
P = 48TSOP1(Lead-Free) Y = 48 TSOP1
D : FBGA(Lead Free)
F : FBGA
Version
ion
Block Architecture
T = Top Boot Block
B = Bottom Boot Block
Bank Division
17 = 8Mbits + 8Mbits
Organization
x16
Operating Voltage Range
2.7V to 3.6V
Table 1. PRODUCT LINE-UP
Part No.
Vcc
Max. Address Access Time (ns)
Max. CE Access Time (ns)
Max. OE Access Time (ns)
70ns
70ns
25ns
-7
-8
2.7V~3.6V
80ns
80ns
25ns
90ns
90ns
35ns
-9
Table 2. K8D1716U DEVICE BANK DIVISIONS
Device
Part Number
K8D1716U
Bank 1
Mbit
8 Mbit
Block Sizes
Eight 8 Kbyte/4 Kword,
fifteen 64 Kbyte/32 Kword
Mbit
8 Mbit
Bank 2
Block Sizes
Sixteen
64 Kbyte/32 Kword
4
Revision 1.0
December 2004
K8D1716UTC / K8D1716UBC
Table 3. Top Boot Block Address (K8D1716UT
)
K8D1716UT
Block
BA38
BA37
BA36
BA35
BA34
BA33
BA32
BA31
BA30
BA29
BA28
Bank1
BA27
BA26
BA25
BA24
BA23
BA22
BA21
BA20
BA19
BA18
BA17
BA16
BA15
BA14
BA13
BA12
BA11
BA10
BA9
Bank2
BA8
BA7
BA6
BA5
BA4
BA3
BA2
BA1
BA0
A19
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
A18
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
A17
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
A16
1
1
1
1
1
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
A15
1
1
1
1
1
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
A14
1
1
1
1
0
0
0
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
A13
1
1
0
0
1
1
0
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
A12
1
0
1
0
1
0
1
0
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Block Size
(KW/KB)
4/8
4/8
4/8
4/8
4/8
4/8
4/8
4/8
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
32 / 64
FLASH MEMORY
Address Range
Word Mode
FF000H-FFFFFH
FE000H-FEFFFH
FD000H-FDFFFH
FC000H-FCFFFH
FB000H-FBFFFH
FA000H-FAFFFH
F9000H-F9FFFH
F8000H-F8FFFH
F0000H-F7FFFH
E8000H-EFFFFH
E0000H-E7FFFH
D8000H-DFFFFH
D0000H-D7FFFH
C8000H-CFFFFH
C0000H-C7FFFH
B8000H-BFFFFH
B0000H-B7FFFH
A8000H-AFFFFH
A0000H-A7FFFH
98000H-9FFFFH
90000H-97FFFH
88000H-8FFFFH
80000H-87FFFH
78000H-7FFFFH
70000H-77FFFH
68000H-6FFFFH
60000H-67FFFH
58000H-5FFFFH
50000H-57FFFH
48000H-4FFFFH
40000H-47FFFH
38000H-3FFFFH
30000H-37FFFH
28000H-2FFFFH
20000H-27FFFH
18000H-1FFFFH
10000H-17FFFH
08000H-0FFFFH
00000H-07FFFH
Byte Mode
1FE000H-1FFFFFH
1FC000H-1FDFFFH
1FA000H-1FBFFFH
1F8000H-1F9FFFH
1F6000H-1F7FFFH
1F4000H-1F5FFFH
1F2000H-1F3FFFH
1F0000H-1F1FFFH
1E0000H-1EFFFFH
1D0000H-1DFFFFH
1C0000H-1CFFFFH
1B0000H-1BFFFFH
1A0000H-1AFFFFH
190000H-19FFFFH
180000H-18FFFFH
170000H-17FFFFH
160000H-16FFFFH
150000H-15FFFFH
140000H-14FFFFH
130000H-13FFFFH
120000H-12FFFFH
110000H-11FFFFH
100000H-10FFFFH
0F0000H-0FFFFFH
0E0000H-0EFFFFH
0D0000H-0DFFFFH
0C0000H-0CFFFFH
0B0000H-0BFFFFH
0A0000H-0AFFFFH
090000H-09FFFFH
080000H-08FFFFH
070000H-07FFFFH
060000H-06FFFFH
050000H-05FFFFH
040000H-04FFFFH
030000H-03FFFFH
020000H-02FFFFH
010000H-01FFFFH
000000H-00FFFFH
Table 4. Secode Block Addresses for Top Boot Devices
Device
K8D1716UT
Block Address
A19-A12
11111xxx
Block
Size
64/32
(X8)
Address Range
1F0000H-1FFFFFH
(X16)
Address Range
F8000H-FFFFFH
5
Revision 1.0
December 2004
