Rev. 1.0, May. 2010
K8P2815UQC
128Mb C-die NOR FLASH
60FBGA & 84FBGA, Page Mode
2.7V ~ 3.6V
datasheet
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K8P2815UQC
datasheet
History
Initial draft
Revised Erase and Program Performance table.
Deleted data retenion.
Device ID chagned
80FBGA Package code changed to G.
Specification finalized
Correct Typo
Draft Date
Jul. 07, 2009
Aug. 04, 2009
Aug. 27, 2009
Sep. 15, 2009
May 12, 2010
Rev. 1.0
FLASH MEMORY
Revision History
Revision No.
0.0
0.1
0.2
0.3
1.0
Remark
Target
Target
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Final
Editor
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K8P2815UQC
128Mb C-die NOR FLASH 1
datasheet
Rev. 1.0
FLASH MEMORY
1.0 FEATURES................................................................................................................................................................. 5
2.0 GENERAL DESCRIPTION ......................................................................................................................................... 5
3.0 PIN DESCRIPTION .................................................................................................................................................... 6
4.0 PIN CONFIGURATION ............................................................................................................................................... 7
4.1 64 Ball FBGA TOP VIEW (BALL DOWN)................................................................................................................ 7
4.2 80 Ball FBGA TOP VIEW (BALL DOWN)................................................................................................................ 8
5.0 56TSOP PIN CONFIGURATION ................................................................................................................................ 9
6.0 FUNCTIONAL BLOCK DIAGRAM .............................................................................................................................. 9
7.0 ORDERING INFORMATION ...................................................................................................................................... 10
8.0 PRODUCT INTRODUCTION...................................................................................................................................... 12
9.0 COMMAND DEFINITIONS ......................................................................................................................................... 13
10.0 DEVICE OPERATION .............................................................................................................................................. 15
10.1 Read Mode ............................................................................................................................................................ 15
10.2 Standby Mode ....................................................................................................................................................... 15
10.3 Output Disable....................................................................................................................................................... 15
10.4 Automatic Sleep Mode .......................................................................................................................................... 15
10.5 Autoselect Mode.................................................................................................................................................... 15
10.6 Write (Program/Erase) Mode................................................................................................................................. 16
10.7 Program ................................................................................................................................................................. 16
10.8 Unlock Bypass....................................................................................................................................................... 16
10.9 Chip Erase ............................................................................................................................................................. 17
10.10 Block Erase ......................................................................................................................................................... 17
10.11 Erase Suspend / Resume.................................................................................................................................... 18
10.12 Program Suspend / Resume ............................................................................................................................... 18
10.13 Read While Write................................................................................................................................................. 18
10.14 Write Protect (WP)............................................................................................................................................... 18
10.15 Software Reset .................................................................................................................................................... 18
10.16 Hardware Reset................................................................................................................................................... 19
10.17 Power-up Protection ............................................................................................................................................ 19
10.18 Low Vcc Write Inhibit ........................................................................................................................................... 19
10.19 Write Pulse Glitch Protection............................................................................................................................... 19
10.20 Logical Inhibit....................................................................................................................................................... 19
10.21 Commom Flash Memory Interface ...................................................................................................................... 19
10.22 OTP Block Region ............................................................................................................................................... 19
10.22.1 Customer Lockable ....................................................................................................................................... 19
10.22.2 OTP Protection Bits....................................................................................................................................... 19
10.23 High Voltage Block Protection ............................................................................................................................. 20
10.24 Accelerated Program Operation .......................................................................................................................... 20
10.24.1 Single word accelerated program operation ................................................................................................. 20
10.24.2 Quadruple word accelerated program operation........................................................................................... 20
10.25 Block Protection................................................................................................................................................... 22
10.26 DEVICE STATUS FLAGS ................................................................................................................................... 32
11.0 ABSOLUTE MAXIMUM RATINGS
..................................................................................................................... 35
12.0 RECOMMENDED OPERATING CONDITIONS ( Voltage reference to GND )
..................................................... 35
13.0 DC CHARACTERISTICS...................................................................................................................................
36
14.0 CAPACITANCE (TA = 25 °C, VCC = 3.0V, f = 1.0MHz)......................................................................................
37
15.0 AC TEST CONDITION
...................................................................................................................................... 37
16.0 AC CHARACTERISTICS .......................................................................................................................................... 38
16.1 Read Operations
.............................................................................................................................................38
16.2 Write(Erase/Program)Operations .......................................................................................................................... 39
16.2.1 Alternate WE Controlled Write
...................................................................................................................39
16.2.2 Alternate CE Controlled Writes
..................................................................................................................40
16.3 ERASE AND PROGRAM PERFORMANCE.....................................................................................................40
17.0 SWITCHING WAVEFORMS ..................................................................................................................................... 41
17.1 Conventional Read Operations ............................................................................................................................ 41
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K8P2815UQC
datasheet
Rev. 1.0
FLASH MEMORY
17.2 Page Read Operations .......................................................................................................................................... 42
17.3 Hardware Reset/Read Operations ........................................................................................................................ 43
17.4 Alternate WE Controlled Program Operations...................................................................................................... 44
17.5 Alternate CE Controlled Program Operations ....................................................................................................... 45
17.6 Chip/Block Erase Operations ................................................................................................................................ 46
17.7 Read While Write Operations ................................................................................................................................ 47
17.8 Data Polling During Internal Routine Operation .................................................................................................... 48
17.9 Toggle Bit During Internal Routine Operation........................................................................................................ 49
17.10 RESET Timing Diagram ..................................................................................................................................... 50
17.11 Power-up and RESET Timing Diagram .............................................................................................................. 50
17.12 Block Group Protect & Unprotect Operations...................................................................................................... 51
17.13 Temporary Block Group Unprotect ...................................................................................................................... 51
17.14 Unlock Bypass Program Operations(Accelerated Program) ............................................................................... 52
17.15 Unlock Bypass Block Erase Operations ............................................................................................................. 52
17.16 Quad word Accelerated Program ....................................................................................................................... 53
18.0 PACKAGE DIMENSIONS......................................................................................................................................... 60
18.1 64 Ball Final Ball Grid Array Package (measured in millimeters) .......................................................................... 60
18.2 80-Ball Fine Ball Grid Array Package (measured in millimeters)........................................................................... 61
18.3 56-PIN LEAD PLASTIC THIN SMALL OUT-LINE PACKAGE TYPE .................................................................... 62
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K8P2815UQC
datasheet
Rev. 1.0
FLASH MEMORY
128M Bit (8M x16) Page Mode / Multi-Bank NOR Flash Memory
1.0 FEATURES
•
Single Voltage, 2.7V to 3.6V for Read and Write operations
Voltage range of 2.7V to 3.1V valid for MCP product
•
Organization
8M x16 bit (Word mode Only)
•
Fast Read Access Time : 65ns
•
Page Mode Operation
8 Words Page access allows fast asychronous read
Page Read Access Time : 25ns
•
Read While Program/Erase Operation
•
Multiple Bank architectures (4 banks)
Bank 0: 16Mbit (4Kw x 8 and 32Kw x 31)
Bank 1: 48Mbit (32Kw x 96)
Bank 2: 48Mbit (32Kw x 96)
Bank 3: 16Mbit (4Kw x 8 and 32Kw x 31)
•
OTP Block : Extra 256 word
- 128word for factory and 128word for customer OTP
•
Power Consumption (typical value)
- Active Read Current : 45mA (@10MHz)
- Program/Erase Current : 17mA
- Read While Program or Read While Erase Current : 35mA
- Standby Mode/Auto Sleep Mode : 15uA
•
Support Single & Quad word accelerate program
•
WP/ACC input pin
- Allows special protection of two outermost boot blocks at V
IL
,
regardless of block protect status
- Removes special protection of two outermost boot block at V
IH,
the two blocks return to normal block protect status
- Accelerated Quadword Program time : 1.5us
•
Erase Suspend/Resume
•
Program Suspend/Resume
•
Unlock Bypass Program
•
Hardware RESET Pin
•
Command Register Operation
•
Block Protection / Unprotection
•
Supports Common Flash Memory Interface
•
Industrial Temperature : -40°C to 85°C
•
Extended Temperature : -25°C to 85°C
•
Endurance : 100,000 Program/Erase Cycles Minimum
•
V
IO
options at 1.8V and 3V I/O
•
Package options
- 80 Ball Fine-pitch BGA
(11x8mm, 0.8mm Ball Pitch)
- 64 Ball FBGA (13x11mm, 1.0mm Ball Pitch)
- 56 Pin TSOP (20x14mm)
2.0 GENERAL DESCRIPTION
The K8P2815UQC featuring single 3.0V power supply, is an 128Mbit NOR-
type Flash Memory organized as 8M x16. The memory architecture of the
device is designed to divide its memory arrays into 270 blocks with inde-
pendent hardware protection. This block architecture provides highly flexi-
ble erase and program capability. The K8P2815UQC NOR Flash consists
of four banks. This device is capable of reading data from one bank while
programming or erasing in the other banks.
The K8P2815UQC offers fast page access time of 25~30ns with random
access time of 65~70ns. The device′s fast access times allow high speed
microprocessors to operate without wait states. The device performs a pro-
gram operation in unit of 16 bits (Word) and erases in units of a block. Sin-
gle or multiple blocks can be erased. The block erase operation is
completed within typically 0.7 sec. The device requires 15mA as program/
erase current in the commercial and industrial temperature ranges.
The K8P2815UQC NOR Flash Memory is created by using Samsung's
advanced CMOS process technology. This device is available in 80/64 ball
FBGA and 56 Pin TSOP. The device is compatible with EPROM applica-
tions to require high-density and cost-effective non-volatile read/write stor-
age solutions.
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