K8S2815ET(B)B
NOR FLASH MEMORY
128Mb B-die SLC NOR Specification
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AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL
INFORMATION IN THIS DOCUMENT IS PROVIDED
ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.
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2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
applications where Product failure couldresult in loss of life or personal or physical harm, or any military or
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* Samsung Electronics reserves the right to change products or specification without notice.
1
Revision 1.2
September, 2006
K8S2815ET(B)B
NOR FLASH MEMORY
Document Title
128M Bit (8M x16) Muxed Burst , Multi Bank NOR Flash Memory
Revision History
Revision No. History
0.0
1.0
Preliminary
Draft Date
August 24, 2004
Remark
Advanced
Revision
March 31, 2005
- Specification finalized
- Add the requirement and note of Quadruple word program operation
tAVDH is changed to 2ns
"Asynchronous mode may not support read following four sequential
invalid read condition within 200ns." is added
February 20,2006
September 08, 2006
1.1
1.2
2
Revision 1.2
September, 2006
K8S2815ET(B)B
NOR FLASH MEMORY
128M Bit (8M x16) Muxed Burst , Multi Bank NOR Flash Memory
FEATURES
•
Single Voltage, 1.7V to 1.95V for Read and Write operations
•
Organization
- 8,386,108 x 16 bit ( Word Mode Only)
•
Multiplexed Data and Address for reduction of interconnections
- A/DQ0 ~ A/DQ15
•
Read While Program/Erase Operation
•
Multiple Bank Architecture
- 16 Banks (8Mb Partition)
•
OTP Block : Extra 256Byte block
•
Read Access Time (@ C
L
=30pF)
- Asynchronous Random Access Time :
90ns (54MHz) / 80ns (66MHz)
- Synchronous Random Access Time :
88.5ns (54MHz) / 70ns (66MHz)
- Burst Access Time :
14.5ns (54MHz) / 11ns (66MHz)
•
Burst Length :
- Continuous Linear Burst
- Linear Burst : 8-word & 16-word with No-wrap & Wrap
•
Block Architecture
- Eight 4Kword blocks and two hundreds fifty-five 32Kword
blocks
- Bank 0 contains eight 4 Kword blocks and fifteen 32Kword
blocks
- Bank 1 ~ Bank 15 contain two hundred forty 32Kword blocks
•
Reduce program time using the V
PP
•
Support Single & Quad word accelerate program
•
Power Consumption (Typical value, C
L
=30pF)
- Burst Access Current : 30mA
- Program/Erase Current : 15mA
- Read While Program/Erase Current : 40mA
- Standby Mode/Auto Sleep Mode : 15uA
•
Block Protection/Unprotection
- Using the software command sequence
- Last two boot blocks are protected by WP=V
IL
- All blocks are protected by V
PP
=V
IL
•
Handshaking Feature
- Provides host system with minimum latency by monitoring
RDY
•
Erase Suspend/Resume
•
Program Suspend/Resume
•
Unlock Bypass Program/Erase
•
Hardware Reset (RESET)
•
Data Polling and Toggle Bits
- Provides a software method of detecting the status of program
or erase completion
•
Endurance
100K Program/Erase Cycles Minimum
•
Data Retention : 10 years
•
Extended Temperature : -25°C ~ 85°C
•
Support Common Flash Memory Interface
•
Low Vcc Write Inhibit
•
Package : 44 - ball FBGA Type, 7.5 x 8.5mm
0.5 mm ball pitch
1.0 mm (Max.) Thickness
GENERAL DESCRIPTION
The K8S2815E featuring single 1.8V power supply is a 128Mbit
Muxed Burst Multi Bank Flash Memory organized as 8Mbx16.
The memory architecture of the device is designed to divide its
memory arrays into 263 blocks with independent hardware pro-
tection. This block architecture provides highly flexible erase
and program capability. The K8S2815E NOR Flash consists of
sixteen banks. This device is capable of reading data from one
bank while programming or erasing in the other bank.
Regarding read access time, the K8S2815E provides an 14.5ns
burst access time and an 90ns initial access time at 54MHz. At
66MHz, the K8S2815E provides an 11ns burst access time and
70ns initial access time. The device performs a program opera-
tion in units of Single 16 bits (word) and an erase operation in
units of a block. Single or multiple blocks can be erased. The
block erase operation is completed within typically 0.7 sec. The
device requires 15mA as program/erase current in the
extended temperature ranges.
The K8S2815E NOR Flash Memory is created by using Sam-
sung's advanced CMOS process technology. This device is
available in 44 ball FBGA package.
PIN DESCRIPTION
Pin Name
A16 - A22
Pin Function
Address Inputs
A/DQ0 - A/DQ15 Multiplexed Address/Data input/output
CE
OE
RESET
V
PP
WE
WP
CLK
RDY
AVD
Vcc
V
SS
Chip Enable
Output Enable
Hardware Reset Pin
Accelerates Programming
Write Enable
Hardware Write Protection Input
Clock
Ready Output
Address Valid Input
Power Supply
Ground
SAMSUNG ELECTRONICS CO., LTD.
reserves the right to change products and specifications without notice.
3
Revision 1.2
September, 2006
K8S2815ET(B)B
44 Ball FBGA TOP VIEW (BALL DOWN)
NOR FLASH MEMORY
1
2
3
4
5
6
7
8
9
10
A
RDY
A21
V
SS
CLK
V
CC
WE
V
PP
A19
A17
A22
B
V
CC
A16
A20
AVD
NC
RESET
WP
A18
CE
V
SS
C
V
SS
A/DQ7
A/DQ6
A/DQ13
A/DQ12
A/DQ3
A/DQ2
A/DQ9
A/DQ8
OE
D
A/DQ15
A/DQ14
V
SS
A/DQ5
A/DQ4
A/DQ11
A/DQ10
V
CC
A/DQ1
A/DQ0
FUNCTIONAL BLOCK DIAGRAM
Bank 0
Address
Vcc
Vss
Vpp
CLK
CE
OE
WE
WP
RESET
RDY
AVD
I/O
Interface
&
Bank
Control
Bank 1
Address
X
Dec
Bank 0
Cell Array
Y Dec
Latch &
Control
Y Dec
X
Dec
Bank 1
Cell Array
Latch &
Control
Bank 15
Address
X
Dec
Bank 15
Cell Array
Y Dec
A16~A22
A/DQ0~
A/DQ15
Erase
Control
Block
Inform
Program
Control
Latch &
Control
High
Voltage
Gen.
4
Revision 1.2
September, 2006
K8S2815ET(B)B
ORDERING INFORMATION
NOR FLASH MEMORY
K 8 S 28 1 5 E T B - D E 7C
Samsung
NOR Flash Memory
Device Type
Multiplexed Burst
Access Time
Refer to Table 1
Operating Temperature Range
C = Commercial Temp. (0
°C
to 70
°C)
E= Extended Temp. (-25
°C
to 85
°C)
Package
F : FBGA
D : FBGA(Lead Free)
Version
3rd Generation
Block Architecture
T = Top Boot Block, B = Bottom Boot Block
Density
128Mbits
Organization
x16 Organization
Operating Voltage Range
1.7 V to 1.95V
Table 1. PRODUCT LINE-UP
K8S2815E
Synchronous/Burst
Speed Option
Max. Initial Access Time (t
IAA,
ns)
V
CC
=1.7V-1.95V Max. Burst Access Time (t
BA,
ns)
Max. OE Access Time (t
OE,
ns)
7B
(54MHz)
88.5
14.5
20
7C
(66MHz)
70
11
20
Asynchronous
Speed Option
Max Access Time (t
AA,
ns)
Max CE Access Time (t
CE,
ns)
Max OE Access Time (t
OE,
ns)
7B
7C
(54MHz) (66MHz)
90
90
20
80
80
20
Table 2. K8S2815E DEVICE BANK DIVISIONS
Bank 0
Mbit
8 Mbit
Block Sizes
Eight 4Kwords,
Fifteen 32Kwords
Mbit
120 Mbit
Bank 1 ~ Bank 15
Block Sizes
Two hundred
forty 32Kwords
5
Revision 1.2
September, 2006
