GTD-18464 Rev.2.0
1
Electronic Components
Preliminary
KGA4140
10 Gbps Transimpedance Limiting Amplifier IC
Sep. 12. 2002
DESCRIPTION
Oki’s 10Gbps transimpedance limiting amplifier is fabricated 0.1
µm
gate length P-HEMTs for high-speed optical
communication. The IC has a high sensitivity and a wide dynamic range.
FEATURES
•
•
•
•
•
Transimpedance
Sensitivity
Overload
Group Delay
+3.3V Single Power Supply
:
:
:
:
30kΩ (Differential)
< -18dBm
> +1dBm
< ±20ps
ABSOLUTE MAXIMUM RATINGS
(Ta = 25°C)
Parameters
Supply Voltage
Input Current
Storage Temperature Range
Symbol
V
d
I
(IN)
T
ST
Units
V
mA
°C
Rating
0 to +4
3.5
–40 to 125
RECOMMENDED OPERATING CONDITIONS
(Ta = 25°C)
Parameters
Supply Voltage
Operating Temperature Range
*1)
At backside of die.
*1)
Symbol
V
d
Ts
Units
V
Min.
+3.14
0
Typ.
+3.3
—
Max.
+3.46
+85
°C
1/1
GTD-18464 Rev.2.0
1
Semiconductor
KGA4140
ELECTRICAL CHARACTERISTICS
(Ta= 25°C, V
d
= +3.3V, C(diode)+C(stray) = 0.20 pF)
Parameters
Transimpedance (Differential Output, I
(IN)
<15 µA)
Transimpedance (Single Ended Output, I
(IN)
<15 µA)
Differential Output Swing (I
(IN)
>50 µA)
Single Ended Output Swing (I
(IN)
>50 µA)
Small Signal Bandwidth (–3 dB)
Transimpedance Flatness (< 6 GHz)
Equivalent Input Noise Current (< 7 GHz)
Optical sensitivity
Optical Overload
Input Offset Voltage
Group Delay (<10 GHz)
Output Return Loss (<10 GHz)
Power Consumption
*1)
*1), *2)
Units
Ω
Ω
mVpp
mVpp
GHz
dBΩ
pA/√Hz
dBm
dBm
V
ps
dB
W
Min.
22000
11000
700
350
—
—
—
—
+1
—
—
—
—
Typ.
30000
15000
800
400
7.5
—
10
-18.5
+1.5
+0.80
—
—
0.5
Max.
—
—
900
450
—
±1.5
—
-18
—
—
±20
10
—
*1) Measured at 10
-12
BER with a 2
31
-1 PRBS, assuming responsivity of photo diode of 1.0 A/W and extinction
ratio of transmitter of 10dB.
*2) With external components. Please show “BLOCK DIAGRAM”.
TYPICAL FREQUENCY RESPONSE AND GROUP DELAY
(Ta= 25°C, V
d
= +3.3V, C(diode)+C(stray) = 0.20 pF, Optical Input Power = -18dBm)
90
Transimpedance [dBΩ]
85
80
75
70
65
60
0
5
10
Frequency [GHz]
15
20
50
Group Delay [ps]
0
-50
0
5
10
Frequency [GHz]
15
20
2/8
GTD-18464 Rev.2.0
1
Semiconductor
KGA4140
TYPICAL EYE DIAGRAMS
(Ta= 25°C, V
d
= +3.3V, C(diode)+C(stray) = 0.20 pF, Optical Input Signal
: PRBS 2
31
-1
)
10Gbps, Pin = -18[dBm]
12.5Gbps, Pin = -18[dBm]
(100mV/div)
(20ps/div)
(100mV/div)
(20ps/div)
10Gbps, Pin = -15[dBm]
12.5Gbps, Pin = -15[dBm]
(100mV/div)
(20ps/div)
(100mV/div)
(20ps/div)
10Gbps, Pin = -5[dBm]
12.5Gbps, Pin = -5[dBm]
(100mV/div)
(100mV/div)
(20ps/div)
(20ps/div)
10Gbps, Pin = +1[dBm]
12.5Gbps, Pin = +1[dBm]
(100mV/div)
(20ps/div)
(100mV/div)
(20ps/div)
3/8
GTD-18464 Rev.2.0
1
Semiconductor
KGA4140
OUTPUT VOLTAGE VS. INPUT CURRENT
(Ta= 25°C, V
d
= +3.3V, Responsivity of PD: 1.0A/W, Extinction ratio of optical input signal: 10dB)
Output Voltage Amplitude [mVp-p]
450
400
350
300
250
200
150
100
50
0
0
0.5
1.0
1.5
2.0
2.5
Input Current [mAp-p]
3.0
3.5
450
400
350
300
250
200
150
100
50
0
0
10
20
30
40
50
60
70
[µAp-p]
80
TYPICAL BIT ERROR RATE CHARACTERISTICS
(Ta= 25°C, V
d
= +3.3V, Extinction ratio of optical input signal: 10dB)
10
-3
10
-4
-5
PRBS:2
31
-1
η
PD
= 1 A/W
10.0Gbps
12.5Gbps
Bit Error Rate
10
10
-6
10
10
-7
-8
10
-9
10
10
10
-10
-11
-12
-24 -22 -20 -18 -16 0 +1 +2 +3
Optical Input Power [dBm]
4/8
GTD-18464 Rev.2.0
1
Semiconductor
KGA4140
BLOCK DIAGRAM AND APPLICATION OUTLINES
Vd
Vd
0.1µF
220pF
0.1µF
220pF
V(PD)
Photo
KGA4140
D iode
Vd1
Vd2
Vd3
OUT
____
OUT
Blocking
Capacitor
IN
Output Offset
Adjustment Circuit
15pF
20kohm
20kohm
15pF
GND1
Cap1
220pF
0.1µF
Cap2
G N D 2 GND3
220pF
0.1µF
Vd
R1
-
OP Amp.
+
V th
Vz = 2.6 - 3.0V
R2
R1:R2 = 1:3
External Capacitors of Cap1 and Cap2 pads
The low frequency cutoff of KGA4140 can be reduced by adding external capacitors to “Cap1” and
“Cap2” pads, respectively. KGA4140 has on-chip 20kΩ resistors with shunt 15pF capacitors to ground.
Without the external capacitors, the low frequency cutoff will be 30MHz.
The low frequency cutoff with the external capacitors is almost given by
1
f
low
−
cutoff
≈
×
(10 ~ 100)
R
=
20
k
Ω
2
π
⋅
R
⋅
C
ext
External Components and Adjustable Decision Threshold
The “output offset adjustment amplifier” feeds back a DC offset from the output to the input of “limiting
amplifier” stage, to eliminate the offset of KGA4140 outputs, for small signal input. To control the DC
offset between the two outputs for large signal operation, the use of the external components, shown in
the diagram above, is recommended. Under the configuration as in the diagram, there are typical
relationship between the voltages of “Cap1” and “Cap2” (Vcap1 and Vcap2) and the input current, as
following.
5/8
