TECHNICAL DATA
Dual 4-Input NAND Gate
High-Speed Silicon-Gate CMOS
The KK74AC20 is identical in pinout to the LS/ALS20, HC/HCT20.
The device inputs are compatible with standard CMOS outputs; with
pullup resistors, they are compatible with LS/ALS outputs.
•
Outputs Directly Interface to CMOS, NMOS, and TTL
•
Operating Voltage Range: 2.0 to 6.0 V
•
Low Input Current: 1.0
µA;
0.1
µA
@ 25°C
•
High Noise Immunity Characteristic of CMOS Devices
•
Outputs Source/Sink 24 mA
KK74AC20
ORDERING INFORMATION
KK74AC20N Plastic
KK74AC20D SOIC
T
A
= -40° to 85° C for all packages
LOGIC DIAGRAM
PIN ASSIGNMENT
NC = NO CONNECTION
PIN 14 =V
CC
PIN 7 = GND
PINS 3,11 = NO CONNECTION
A
L
X
X
X
H
FUNCTION TABLE
Inputs
B
X
L
X
X
H
C
X
X
L
X
H
D
X
X
X
L
H
Output
Y
H
H
H
H
L
X = don’t care
1
KK74AC20
MAXIMUM RATINGS
*
Symbol
V
CC
V
IN
V
OUT
I
IN
I
OUT
I
CC
P
D
Tstg
T
L
*
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
DC Output Sink/Source Current, per Pin
DC Supply Current, V
CC
and GND Pins
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
Storage Temperature
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
Value
-0.5 to +7.0
-0.5 to V
CC
+0.5
-0.5 to V
CC
+0.5
±20
±50
±50
750
500
-65 to +150
260
Unit
V
V
V
mA
mA
mA
mW
°C
°C
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
IN
, V
OUT
T
J
T
A
I
OH
I
OL
t
r
, t
f
Parameter
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Junction Temperature (PDIP)
Operating Temperature, All Package Types
Output Current - High
Output Current - Low
Input Rise and Fall Time
*
(except Schmitt Inputs)
V
CC
=3.0 V
V
CC
=4.5 V
V
CC
=5.5 V
0
0
0
-40
Min
2.0
0
Max
6.0
V
CC
140
+85
-24
24
150
40
25
Unit
V
V
°C
°C
mA
mA
ns/V
*
V
IN
from 30% to 70% V
CC
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range GND≤(V
IN
or
V
OUT
)≤V
CC
.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
outputs must be left open.
2
KK74AC20
DC ELECTRICAL CHARACTERISTICS
(Voltages Referenced to GND)
V
CC
Symbol
V
IH
Parameter
Minimum High-
Level Input Voltage
Maximum Low -
Level Input Voltage
Minimum High-
Level Output Voltage
Test Conditions
V
OUT
=0.1 V or V
CC
-0.1 V
V
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
3.0
4.5
5.5
5.5
5.5
5.5
5.5
4.0
Guaranteed Limits
25
°C
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.56
3.86
4.86
0.1
0.1
0.1
0.36
0.36
0.36
±0.1
-40°C to
85°C
2.1
3.15
3.85
0.9
1.35
1.65
2.9
4.4
5.4
2.46
3.76
4.76
0.1
0.1
0.1
0.44
0.44
0.44
±1.0
75
-75
40
µA
mA
mA
µA
V
Unit
V
V
IL
V
OUT
=0.1 V or V
CC
-0.1 V
V
V
OH
I
OUT
≤
-50
µA
V
V
IN
=V
IH
or V
IL
I
OH
=-12 mA
I
OH
=-24 mA
I
OH
=-24 mA
V
OL
Maximum Low-
Level Output Voltage
I
OUT
≤
50
µA
*
V
IN
=V
IH
I
OL
=12 mA
I
OL
=24 mA
I
OL
=24 mA
I
IN
I
OLD
I
OHD
I
CC
Maximum Input
Leakage Current
+Minimum Dynamic
Output Current
+Minimum Dynamic
Output Current
Maximum Quiescent
Supply Current
(per Package)
V
IN
=V
CC
or GND
V
OLD
=1.65 V Max
V
OHD
=3.85 V Min
V
IN
=V
CC
or GND
*
*
All outputs loaded; thresholds on input associated with output under test.
+Maximum test duration 2.0 ms, one output loaded at a time.
Note: I
IN
and I
CC
@ 3.0 V are guaranteed to be less than or equal to the respective limit @ 5.5 V V
CC
3
KK74AC20
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=3.0 ns)
V
CC*
Symbol
Parameter
V
Guaranteed Limit
25
°C
Min
t
PLH
t
PHL
C
IN
Propagation Delay, Input A , B, C or D to
Output Y (Figure 1)
Propagation Delay, Input A , B, C or D to
Output Y (Figure 1)
Maximum Input Capacitance
3.3
5.0
3.3
5.0
5.0
2.0
1.5
1.5
1.5
4.5
Max
8.5
7.0
7.0
6.0
-40°C to
85°C
Min
1.5
1.0
1.0
1.0
4.5
Max
10.0
8.0
9.0
7.0
ns
ns
pF
Unit
Typical @25°C,V
CC
=5.0 V
C
PD
*
Power Dissipation Capacitance
40
pF
Voltage Range 3.3 V is 3.3 V
±0.3
V
Voltage Range 5.0 V is 5.0 V
±0.5
V
Figure 1. Switching Waveforms
4
KK74AC20
N SUFFIX PLASTIC DIP
(MS - 001AA)
A
14
8
B
1
7
Dimension, mm
Symbol
A
B
C
MIN
18.67
6.1
MAX
19.69
7.11
5.33
0.36
1.14
2.54
7.62
0°
2.92
7.62
0.2
0.38
10°
3.81
8.26
0.36
0.56
1.78
F
L
D
F
C
-T-
SEATING
N
G
D
0.25 (0.010) M T
K
PLANE
G
H
H
J
M
J
K
L
M
N
NOTES:
1. Dimensions “A”, “B” do not include mold flash or protrusions.
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
D SUFFIX SOIC
(MS - 012AB)
Dimension, mm
8
A
14
Symbol
A
MIN
8.55
3.8
1.35
0.33
0.4
1.27
5.27
0°
0.1
0.19
5.8
0.25
MAX
8.75
4
1.75
0.51
1.27
H
B
P
B
C
1
G
7
C
R x 45
D
F
G
-T-
D
0.25 (0.010) M T C M
K
SEATING
PLANE
H
J
F
M
J
K
M
P
R
8°
0.25
0.25
6.2
0.5
NOTES:
1. Dimensions A and B do not include mold flash or protrusion.
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side
for A; for B
‑
0.25 mm (0.010) per side.
5
