KM44C1005DJ-5,KM44C1005DJ-5 pdf中文资料,KM44C1005DJ-5引脚图,KM44C1005DJ-5电路-Datasheet-电子工程世界

文档预览

KM44C1005D

CMOS DRAM

1M x 4bit CMOS Quad CAS DRAM with Extended Data Out

DESCRIPTION

This is a family of 1,048,576 x 4bit Extended Data Out Quad CAS CMOS DRAMs. Extended Data Out offers high speed random access

of memory cells within the same row. Access time (-5, -6 or -7), power consumption(Normal), and package type (SOJ or TSOP-II) are

optional features of this family. All of this family have CAS-before-RAS refresh, RAS-only refresh and Hidden refresh capabilities. Fur-

thermore, Self-refresh operation is available in Low power version. Four seperate CAS pins provide for seperate I/O operation allowing

this device to operate in parity mode. This 1Mx4 Extended Data Out DRAM family is fabricated using Samsung′s advanced CMOS pro-

cess to realize high band-width, low power consumption and high reliability.

• Extended Data Out mode operation

FEATURES

•

Part Identification

- KM44C1005D(5V, 1K Ref.)

(Fast Page Mode with Extended data out)

• Four seperate CAS pins provide for seperate I/O

operation

• CAS-before-RAS refresh capability

• RAS-only and Hidden refresh capability

• Self-refresh capability (L-ver only)

• Fast parallel test mode capability

•

Active Power Dissipation

Unit : mW

Speed

-5

-6

-7

Active power dissipation

468

413

358

• TTL compatible inputs and outputs

• Early Write or output enable controlled write

• JEDEC Standard pinout

• Available in 26(24)-pin SOJ 300mil and TSOP(II)

300mil packages

• Single +5V±10% power supply

•

Refresh Cycles

Part

NO.

KM44C1005D

Refresh

cycle

Refresh Period

Normal

16ms

RAS

CAS0~3

FUNCTIONAL BLOCK DIAGRAM

Control

Clocks

VBB Generator

Vcc

Vss

Refresh Timer

Row Decoder

Sense Amps & I/O

Data in

Buffer

DQ0

DQ3

•

Performance Range

Speed

-5

-6

-7

Refresh Control

RAC

50ns

60ns

70ns

CAC

15ns

20ns

84ns

104ns

124ns

HPC

20ns

25ns

30ns

A0~A9

Refresh Counter

Row Address Buffer

Col. Address Buffer

Memory Array

1,048,576 x 4

Cells

Column Decoder

Data out

Buffer

SAMSUNG ELECTRONICS CO., LTD.

reserves the right to

change products and specifications without notice.

KM44C1005D

CMOS DRAM

PIN CONFIGURATION

(Top Views)

•KM44C1005DJ

•KM44C1005DT

DQ0

DQ1

RAS

CAS0

CAS1

( SOJ )

DQ3

DQ2

CAS3

CAS2

N.C

DQ0

DQ1

RAS

CAS0

CAS1

DQ3

DQ2

CAS3

CAS2

N.C

( TSOP-II )

Pin Name

A0 - A9

DQ0 - 3

RAS

CAS0~CAS3

N.C

Pin function

Address Inputs

Data In/Out

Ground

Row Address Strobe

Column Address Strobe

Read/Write Input

Data Output Enable

Power(+5.0V)

No Connection

KM44C1005D

ABSOLUTE MAXIMUM RATINGS

Parameter

Voltage on any pin relative to V

Voltage on V

supply relative to V

Storage Temperature

Power Dissipation

Short Circuit Output Current

Symbol

IN,

OUT

Tstg

Rating

-1 to +7.0

-55 to +150

CMOS DRAM

Units

°C

* Permanent device damage may occur if "ABSOLUTE MAXIMUM RATINGS" are exceeded. Functional operation should be restricted to

the conditions as detailed in the operational sections of this data sheet. Exposure to absolute maximum rating conditions for extended

periods may affect device reliability.

RECOMMENDED OPERATING CONDITIONS

(Voltage referenced to Vss, T

= 0 to 70°C)

Parameter

Supply Voltage

Ground

Input High Voltage

Input Low Voltage

Symbol

Rating

4.5

2.4

-1.0

Typ

5.0

Max

5.5

+1.0

0.8

Units

*1 : V

+2.0V at pulse width≤20ns, Pulse width is measured at V

*2 : - 2.0V at pulse width≤20ns, Pulse width is measured at V

DC AND OPERATING CHARACTERISTICS

(Recommended operating conditions unless otherwise noted.)

Parameter

Input Leakage Current (Any input 0≤V

≤V

+0.5V,

all other input pins not under test=0 Volt)

Output Leakage Current

(Data out is disabled, 0V≤V

OUT

≤V

)

Output High Voltage Level(I

=-5mA)

Output Low Voltage Level(I

=4.2mA)

Symbol

I(L)

O(L)

Min

-5

2.4

Max

0.4

Units

KM44C1005D

DC AND OPERATING CHARACTERISTICS

(Continued)

Symbol

Power

Speed

-5

-6

-7

Don′t Care

-5

-6

-7

-5

-6

-7

Don′t Care

-5

-6

-7

Max

KM44C1005D

CC1

CC2

CC3

Don′t Care

200

CMOS DRAM

Units

CC4

Don′t Care

Normal

Don′t Care

CC5

CC6

CC1

* : Operating Current (RAS and CAS cycling @

=min.)

CC2

: Standby Current (RAS=CAS=W=V

)

CC3

* : RAS-only Refresh Current (CAS=V

, RAS, Address cycling @

=min.)

CC4

* : EDO Mode Current (RAS=V

, CAS, Address cycling @

HPC

=min.)

CC5

: Standby Current (RAS=CAS=W=V

-0.2V)

CC6

* : CAS-Before-RAS Refresh Current (RAS and CAS cycling @

=min)

*Note :

CC1

, I

CC3

, I

CC4

and I

CC6

are dependent on output loading and cycle rates. Specified values are obtained with the output open.

is specified as an average current. In I

CC1

, I

CC3

and I

CC6

address can be changed maximum once while RAS=V

. In I

CC4

address can be changed maximum once within one hyper page cycle time,

HPC

KM44C1005D

CAPACITANCE

=25°C, V

=5V, f=1MHz)

Parameter

Input capacitance [A0 ~ A9]

Input capacitance [RAS, CAS, W, OE]

Output capacitance [DQ0 - DQ3]

Symbol

IN1

IN2

Min

CMOS DRAM

Max

Units

AC CHARACTERISTICS

(0°C≤T

≤70°C,

See note 1,2)

Test condition : V

=5.0V±10%, Vih/Vil=2.4/0.8V, Voh/Vol=2.0/0.8V

Parameter

Random read or write cycle time

Read-modify-write cycle time

Access time from RAS

Access time from CAS

Access time from column address

CAS to output in Low-Z

Output buffer turn-off delay from CAS

Transition time (rise and fall)

RAS precharge time

RAS pulse width

RAS hold time

CAS hold time

CAS pulse width

RAS to CAS delay time

RAS to column address delay time

CAS to RAS precharge time

Row address set-up time

Row address hold time

Column address set-up time

Column address hold time

Column address to RAS lead time

Read command set-up time

Read command hold time referenced to CAS

Read command hold time referenced to RAS

Write command hold time

Write command pulse width

Write command to RAS lead time

Write command to CAS lead time

Data set-up time

Data hold time

Symbol

Min

-5

Max

Min

104

138

10K

-6

Max

Min

124

163

Max

4,20

3,4,10

3,4,5,22

3,10

3,22

6,13,22

Units

Notes

RWC

RAC

CAC

CLZ

CEZ

RAS

RSH

CSH

CAS

RCD

RAD

CRP

ASR

RAH

ASC

CAH

RAL

RCS

RCH

RRH

WCH

RWL

CWL

116

参数对比

与KM44C1005DJ-5相近的元器件有：KM44C1005DT-5、KM44C1005DT-6、KM44C1005DT-7、KM44C1005DJ-6、KM44C1005DJ-7。描述及对比如下：

型号	KM44C1005DJ-5	KM44C1005DT-5	KM44C1005DT-6	KM44C1005DT-7	KM44C1005DJ-6	KM44C1005DJ-7
描述	EDO DRAM, 1MX4, 50ns, CMOS, PDSO24, 0.300 INCH, SOJ-26/24	EDO DRAM, 1MX4, 50ns, CMOS, PDSO24, 0.300 INCH, TSOP2-26/24	EDO DRAM, 1MX4, 60ns, CMOS, PDSO24, 0.300 INCH, TSOP2-26/24	EDO DRAM, 1MX4, 70ns, CMOS, PDSO24, 0.300 INCH, TSOP2-26/24	EDO DRAM, 1MX4, 60ns, CMOS, PDSO24, 0.300 INCH, SOJ-26/24	EDO DRAM, 1MX4, 70ns, CMOS, PDSO24, 0.300 INCH, SOJ-26/24
是否Rohs认证	不符合	不符合	不符合	不符合	不符合	不符合
零件包装代码	SOJ	TSOP2	TSOP2	TSOP2	SOJ	SOJ
包装说明	SOJ, SOJ24/26,.34	TSOP2, TSOP24/26,.36	TSOP2, TSOP24/26,.36	TSOP2, TSOP24/26,.36	SOJ, SOJ24/26,.34	SOJ, SOJ24/26,.34
针数	24	26	26	26	24	24
Reach Compliance Code	unknown	unknown	unknown	unknown	unknown	unknown
ECCN代码	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
访问模式	FAST PAGE WITH EDO	FAST PAGE WITH EDO	FAST PAGE WITH EDO	FAST PAGE WITH EDO	FAST PAGE WITH EDO	FAST PAGE WITH EDO
最长访问时间	50 ns	50 ns	60 ns	70 ns	60 ns	70 ns
其他特性	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH	RAS ONLY/CAS BEFORE RAS/HIDDEN REFRESH
I/O 类型	COMMON	COMMON	COMMON	COMMON	COMMON	COMMON
JESD-30 代码	R-PDSO-J24	R-PDSO-G24	R-PDSO-G24	R-PDSO-G24	R-PDSO-J24	R-PDSO-J24
JESD-609代码	e0	e0	e0	e0	e0	e0
长度	17.15 mm	17.14 mm	17.14 mm	17.14 mm	17.15 mm	17.15 mm
内存密度	4194304 bit	4194304 bit	4194304 bit	4194304 bit	4194304 bit	4194304 bit
内存集成电路类型	EDO DRAM	EDO DRAM	EDO DRAM	EDO DRAM	EDO DRAM	EDO DRAM
内存宽度	4	4	4	4	4	4
功能数量	1	1	1	1	1	1
端口数量	1	1	1	1	1	1
端子数量	24	24	24	24	24	24
字数	1048576 words	1048576 words	1048576 words	1048576 words	1048576 words	1048576 words
字数代码	1000000	1000000	1000000	1000000	1000000	1000000
工作模式	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS	ASYNCHRONOUS
最高工作温度	70 °C	70 °C	70 °C	70 °C	70 °C	70 °C
组织	1MX4	1MX4	1MX4	1MX4	1MX4	1MX4
输出特性	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE	3-STATE
封装主体材料	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
封装代码	SOJ	TSOP2	TSOP2	TSOP2	SOJ	SOJ
封装等效代码	SOJ24/26,.34	TSOP24/26,.36	TSOP24/26,.36	TSOP24/26,.36	SOJ24/26,.34	SOJ24/26,.34
封装形状	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
封装形式	SMALL OUTLINE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE, THIN PROFILE	SMALL OUTLINE	SMALL OUTLINE
电源	5 V	5 V	5 V	5 V	5 V	5 V
认证状态	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
刷新周期	1024	1024	1024	1024	1024	1024
座面最大高度	3.76 mm	1.2 mm	1.2 mm	1.2 mm	3.76 mm	3.76 mm
自我刷新	NO	NO	NO	NO	NO	NO
最大待机电流	0.001 A	0.001 A	0.001 A	0.001 A	0.001 A	0.001 A
最大压摆率	0.085 mA	0.085 mA	0.075 mA	0.065 mA	0.075 mA	0.065 mA
最大供电电压 (Vsup)	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V	5.5 V
最小供电电压 (Vsup)	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V	4.5 V
标称供电电压 (Vsup)	5 V	5 V	5 V	5 V	5 V	5 V
表面贴装	YES	YES	YES	YES	YES	YES
技术	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
温度等级	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL
端子面层	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
端子形式	J BEND	GULL WING	GULL WING	GULL WING	J BEND	J BEND
端子节距	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm	1.27 mm
端子位置	DUAL	DUAL	DUAL	DUAL	DUAL	DUAL
宽度	7.62 mm	7.62 mm	7.62 mm	7.62 mm	7.62 mm	7.62 mm
厂商名称	SAMSUNG(三星)	SAMSUNG(三星)	-	SAMSUNG(三星)	SAMSUNG(三星)	SAMSUNG(三星)