KSZ8873MLL/FLL/RLL
Integrated 3-Port 10/100 Managed Switch
with PHYs
Features
• Advanced Switch Features
- IEEE 802.1q VLAN Support for Up to 16 Groups
(Full Range of VLAN IDs)
- VLAN ID Tag/Untag Options, Per Port Basis
- IEEE 802.1p/q Tag Insertion or Removal on a
Per Port Basis (Egress)
- Programmable Rate Limiting at the Ingress and
Egress on a Per Port Basis
- Broadcast Storm Protection with Percent Con-
trol (Global and Per Port Basis)
- IEEE 802.1d Rapid Spanning Tree Protocol
Support
- Tail Tag Mode (1 byte Added before FCS) Sup-
port at Port 3 to Inform the Processor which
Ingress Port Receives the Packet and its Prior-
ity
- Bypass Feature that Automatically Sustains the
Switch Function between Port 1 and Port 2
when CPU (Port 3 Interface) Goes into Sleep
Mode
- Self-Address Filtering
- Individual MAC Address for Port 1 and Port 2
- Supports RMII Interface and 50 MHz Reference
Clock Output
- MAC MII Interface Supports Both MAC and
PHY Modes
- IGMP Snooping (IPv4) Support for Multicast
Packet Filtering
- IPv4/IPv6 QoS Support
- MAC Filtering Function to Forward Unknown
Unicast Packets to Specified Port
• Comprehensive Configuration Register Access
- Serial Management Interface (SMI) to All Inter-
nal Registers
- MII Management (MIIM) Interface to PHY Reg-
isters
- High Speed SPI and I
2
C Interface to All Internal
Registers
- I/O Pins Strapping and EEPROM to Program
Selective Registers in Unmanaged Switch
Mode
- Control Registers Configurable on the Fly (Port-
Priority, 802.1p/d/q, AN…)
• QoS/CoS Packet Prioritization Support
• Per Port, 802.1p and DiffServ-Based
- Re-Mapping of 802.1p Priority Field Per Port
basis, Four Priority Levels
• Proven Integrated 3-Port 10/100 Ethernet Switch
- 3rd Generation Switch with Three MACs and
Two PHYs Fully Compliant with IEEE 802.3u
2017 Microchip Technology Inc.
•
•
•
•
Standard
- Non-Blocking Switch Fabric Ensures Fast
Packet Delivery by Utilizing a 1k MAC Address
Lookup Table and a Store-and-Forward Archi-
tecture
- Full-Duplex IEEE 802.3x Flow Control (PAUSE)
with Force Mode Option
- Half-Duplex Back Pressure Flow Control
- HP Auto MDI-X for Reliable Detection of and
Correction for Straight-Through and Crossover
Cables with Disable and Enable Option
- LinkMD
®
TDR-Based Cable Diagnostics Permit
Identification of Faulty Copper Cabling on Port 2
- Comprehensive LED Indicator Support for Link,
Activity, Full-/Half-Duplex and 10/100 Speed
- HBM ESD Rating 3 kV
Switch Monitoring Features
- Port Mirroring/Monitoring/Sniffing: Ingress and/
or Egress Traffic to Any Port or MII
- MIB Counters for Fully Compliant Statistics
Gathering 34 MIB Counters Per Port
- Loopback Modes for Remote Diagnostic of Fail-
ure
Low Power Dissipation
- Full-Chip Software Power-Down (Register Con-
figuration Not Saved)
- Full-Chip Hardware Power-Down (Register
Configuration Not Saved)
- Energy-Detect Mode Support
- Dynamic Clock Tree Shutdown Feature
- Per Port Based Software Power-Save on PHY
(Idle Link Detection, Register Configuration Pre-
served)
- Voltages: Single 3.3V Supply with Internal 1.8V
LDO for 3.3V VDDIO
- Optional 3.3V, 2.5V, and 1.8V for VDDIO
- Transceiver Power 3.3V for VDDA_3.3
Industrial Temperature Range: –40°C to +85°C
Available in a 64-Pin LQFP, Lead-Free Package
Applications
•
•
•
•
•
•
•
•
•
•
VoIP Phone
Set-Top/Game Box
Automotive Ethernet
Industrial Control
IPTV POF
SOHO Residential Gateway
Broadband Gateway/Firewall/VPN
Integrated DSL/Cable Modem
Wireless LAN Access Point + Gateway
Standalone 10/100 Switch
DS00002348A-page 1
KSZ8873MLL/FLL/RLL
TO OUR VALUED CUSTOMERS
It is our intention to provide our valued customers with the best documentation possible to ensure successful use of your Microchip
products. To this end, we will continue to improve our publications to better suit your needs. Our publications will be refined and
enhanced as new volumes and updates are introduced.
If you have any questions or comments regarding this publication, please contact the Marketing Communications Department via
E-mail at
docerrors@microchip.com.
We welcome your feedback.
Most Current Data Sheet
To obtain the most up-to-date version of this data sheet, please register at our Worldwide Web site at:
http://www.microchip.com
You can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page.
The last character of the literature number is the version number, (e.g., DS30000000A is version A of document DS30000000).
Errata
An errata sheet, describing minor operational differences from the data sheet and recommended workarounds, may exist for cur-
rent devices. As device/documentation issues become known to us, we will publish an errata sheet. The errata will specify the
revision of silicon and revision of document to which it applies.
To determine if an errata sheet exists for a particular device, please check with one of the following:
• Microchip’s Worldwide Web site;
http://www.microchip.com
• Your local Microchip sales office (see last page)
When contacting a sales office, please specify which device, revision of silicon and data sheet (include -literature number) you are
using.
Customer Notification System
Register on our web site at
www.microchip.com
to receive the most current information on all of our products.
DS00002348A-page 2
2017 Microchip Technology Inc.
KSZ8873MLL/FLL/RLL
Table of Contents
1.0 Introduction ..................................................................................................................................................................................... 4
2.0 Pin Description and Configuration .................................................................................................................................................. 5
3.0 Functional Description .................................................................................................................................................................. 12
4.0 Register Descriptions .................................................................................................................................................................... 38
5.0 Operational Characteristics ........................................................................................................................................................... 74
6.0 Electrical Characteristics ............................................................................................................................................................... 75
7.0 Timing Specifications .................................................................................................................................................................... 77
8.0 Reset Circuit ................................................................................................................................................................................. 88
9.0 Selection of Isolation Transformers .............................................................................................................................................. 89
10.0 Package Outline .......................................................................................................................................................................... 90
Appendix A: Data Sheet Revision History ........................................................................................................................................... 91
The Microchip Web Site ...................................................................................................................................................................... 92
Customer Change Notification Service ............................................................................................................................................... 92
Customer Support ............................................................................................................................................................................... 92
Product Identification System ............................................................................................................................................................. 93
2017 Microchip Technology Inc.
DS00002348A-page 3
KSZ8873MLL/FLL/RLL
1.0
1.1
INTRODUCTION
General Description
The KSZ8873MLL/FLL/RLL are highly integrated 3-port switch-on-a-chip ICs in the industry’s smallest footprint. They
are designed to enable a new generation of low port count, cost-sensitive, and power efficient 10/100 Mbps switch sys-
tems. Low power consumption, advanced power management, and sophisticated QoS features (e.g., IPv6 priority clas-
sification support) make these devices ideal for IPTV, IP-STB, VoIP, automotive, and industrial applications.
The KSZ8873 family is designed to support the GREEN requirement in today’s switch systems. Advanced power man-
agement schemes include hardware power down, software power down, per port power down, and the energy detect
mode that shuts downs the transceiver when a port is idle.
KSZ8873MLL/FLL/RLL also offer a bypass mode. In this mode, the processor connected to the switch through the MII
interface can be shut down without impacting the normal switch operation.
The configurations provided by the KSZ8873 family enables the flexibility to meet requirements of different applications:
• KSZ8873MLL: Two 10/100BASE-T/TX transceivers and one MII interface.
• KSZ8873RLL: Two 10/100BASE-T/TX transceivers and one RMII interface.
• KSZ8873FLL: Two 100BASE-FX transceivers and one MII interface.
The devices are available in RoHS-compliant 64-pin LQFP packages. Industrial-grade and qualified AEC-Q100 Auto-
motive-grade versions are also available.
FIGURE 1-1:
SYSTEM BLOCK DIAGRAM
HP AUTO
MDIX
10/100
T/TX/FX
PHY 1
10/100
T/TX/FX
PHY 2
1K LOOK-UP
ENGINE
FIFO, FLOW CONTROL, VLAN TAGGING, PRIORITY
10/100
MAC 1
QUEUE
MANAGEMENT
HP AUTO
MDIX
10/100
MAC 2
BUFFER
MANAGEMENT
MII/SNI
10/100
MAC 3
FRAME
BUFFERS
SPI
SPI
MIB
COUNTERS
MIIM
SMI
I2C
P1 LED[1:0]
P2 LED[1:0]
LED
DRIVERS
CONTROL
REGISTERS
EEPROM
INTERFACE
STRAP IN
CONFIGURATION
DS00002348A-page 4
2017 Microchip Technology Inc.
KSZ8873MLL/FLL/RLL
2.0
PIN DESCRIPTION AND CONFIGURATION
FIGURE 2-1:
64-PIN 10 MM X 10 MM LQFP ASSIGNMENT, (TOP VIEW)
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
RXM1
RXP1
AGND
TXM1
TXP1
VDDA_3.3
AGND
ISET
VDDA_1.8
RXM2
RXP2
AGND
TXM2
TXP2
FXSD2
PWRDN
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
X1
X2
SMTXEN3
SMTXD33/EN_REFCLKO_3
SMTXD32
SMTXD31
SMTXD30
GND
VDDIO
SMTXC3/REFCLKI_3
SMTXER3/MII_LINK_3
SMRXDV3
SMRXD33/REFCLKO_3
SMRXD32
SMRXD31
GND
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
GND
P1DPX
P1SPD
P1ANEN
NC
SDA_MDIO
SCL_MDC
INTRN
SPISN
SPIQ
VDDC
GND
SMRXC3
SCOL3
SCRS3
SMRXD30
2017 Microchip Technology Inc.
VDDA_1.8
FXSD1
RSTN
P2LED0
P2LED1
P1LED0
P1LED1
NC
VDDCO
GND
VDDIO
NC
NC
P3SPD
P1FFC
VDDC
DS00002348A-page 5
嵌入式系统
