L6565
QUASI-RESONANT SMPS CONTROLLER
QUASI-RESONANT (QR) ZERO-VOLTAGE-
SWITCHING (ZVS) TOPOLOGY
s
LINE FEED FORWARD TO DELIVER
CONSTANT POWER vs. MAINS CHANGE
s
FREQUENCY FOLDBACK FOR OPTIMUM
STANDBY EFFICIENCY
s
PULSE-BY-PULSE & HICCUP-MODE OCP
s
ULTRA-LOW START-UP (< 70µA) AND
QUIESCENT CURRENT (< 3.5mA)
s
DISABLE FUNCTION (ON/OFF CONTROL)
s
1% PRECISION (@ T
j
= 25°C) INTERNAL
REFERENCE VOLTAGE
s
±400mA TOTEM POLE GATE DRIVER WITH
UVLO PULL-DOWN
s
BLUE ANGEL, ENERGY STAR, ENERGY
2000 COMPLIANT
APPLICATIONS
s
TV/MONITOR SMPS
s
AC-DC ADAPTERS/CHARGERS
s
DIGITAL CONSUMER
s
PRINTERS, FAX MACHINES,
PHOTOCOPIERS AND SCANNERS
s
DIP8(Minidip)
SO-8
ORDERING NUMBERS:
L6565N
L6565D
DESCRIPTION
The L6565 is a current-mode primary controller IC,
specifically designed to build offline Quasi-resonant
ZVS (Zero Voltage Switching at switch turn-on) fly-
back converters.
Quasi-resonant operation is achieved by means of a
transformer demagnetization sensing input that trig-
gers MOSFET's turn-on.
BLOCK DIAGRAM
COMP
2
1
INV
-
+
2.5V
VOLTAGE
REGULATOR
2V
-
+
-
+
5pF
LINE VOLTAGE
FEEDFORWARD
40K
4
CS
VFF
3
8
V
CC
20V
R1
+
R2
V
REF2
-
Blanking
START
UVLO
S
Q
INTERNAL
SUPPLY
Hiccup-mode
OCP
R
Q
V
CC
7
GD
DRIVER
Starter
STOP
ZERO CURRENT
DETECTOR
+
2.1V
1.6V
BLANKING
STARTER
-
Hiccup-mode
OCP
DISABLE
6
GND
5
ZCD
January 2003
1/17
L6565
DESCRIPTION
(continued)
Converter's power capability variations with the mains voltage are compensated by line voltage feedforward.
At light load the device features a special function that automatically lowers the operating frequency still main-
taining the operation as close to ZVS as possible. In addition to very low start-up and quiescent currents, this
feature helps keep low the consumption from the mains at light load and be Blue Angel and Energy Star com-
pliant.
The IC includes also a disable function, an on-chip filter on current sense, an error amplifier with a precise ref-
erence voltage for primary regulation and an effective two-level overcurrent protection.
PIN CONNECTION
(Top view, Minidip and SO8)
INV
COMP
VFF
CS
1
2
3
4
8
7
6
5
Vcc
GD
GND
ZCD
PIN DESCRIPTION
N°
1
Name
INV
Function
Inverting input of the error amplifier. The information on the output voltage is fed into the pin
through either a resistor divider (primary regulation) or an optocoupler (secondary feedback).
This pin can be grounded in some secondary feedback schemes (see pin 2).
Output of the error amplifier. Typically, a compensation network is placed between this pin and
the INV pin to achieve stability and good dynamic performance of the voltage control loop. With
secondary feedback, the pin can be also driven directly by an optocoupler to control PWM by
modulating the current sunk from the pin (with the INV pin grounded).
Line voltage feedforward. The information on the converter’s input voltage is fed into the pin
through a resistor divider and is used to change the setpoint of the pulse-by-pulse current
limitation (the higher the voltage, the lower the setpoint). If this function is not desired the pin will
be grounded and the current limitation setpoint will be maximum.
Input to the PWM comparator. The primary current is sensed through a resistor, the resulting
voltage is applied to this pin and compared with an internal reference to determine MOSFET’s
turn-off. The internal reference is clamped at a value, which defines the pulse-by-pulse current
limitation setpoint, depending on the voltage at pin VFF. If the signal at the pin CS exceeds 2 V,
the gate driver will be disabled (Hiccup-mode OCP).
Transformer’s demagnetization sensing input for Quasi-Resonant operation. Alternately,
synchronization input for an external signal. A negative-going edge triggers MOSFET’s turn-on.
The trigger circuit is blanked for a minimum of 3.5 µs after MOSFET turn-off, for safe operation
under short circuit conditions and frequency foldback. If the pin is grounded the IC will be
disabled.
Ground. Current return for both the signal part of the IC and the gate driver.
Gate driver output. The totem pole output stage is able to drive power MOSFET’s and IGBT’s
with a peak current of 400 mA (source and sink).
Supply Voltage of both the signal part of the IC and the gate driver. An electrolytic capacitor is
connected between this pin and ground. A resistor connected from this pin to the converter’s
input bulk capacitor will be typically used to start up the device.
2
COMP
3
VFF
4
CS
5
ZCD
6
7
8
GND
GD
Vcc
2/17
L6565
THERMAL DATA
Symbol
R
th j-amb
Parameter
Max. Thermal Resistance, Junction-to-ambient
SO8
150
Minidip
100
Unit
°C/W
ABSOLUTE MAXIMUM RATINGS
Symbol
I
Vcc
I
GD
INV, COMP,
VFF, CS
I
ZCD
P
tot
T
j
T
stg
Pin
8
7
I
CC
+ I
Z
Output Totem Pole Peak Current (2 µs)
Parameter
Value
30
±700
-0.3 to 7
50 (source)
-10 (sink)
(Minidip)
(SO8)
1
0.65
-40 to 150
-55 to 150
Unit
mA
mA
V
mA
W
°C
°C
1, 2, 3 4 Analog Inputs & Outputs
5
Zero Current Detector
Power Dissipation @T
amb
= 50°C
Junction Temperature Operating range
Storage Temperature
ELECTRICAL CHARACTERISTCS
(T
j
= -25 to 125°C, V
CC
= 12V, C
o
= 1nF; unless otherwise specified)
Symbol
SUPPLY VOLTAGE
V
cc
V
CCOn
V
CCOff
Hys
V
Z
I
start-up
I
q
I
CC
I
q
I
q
I
VFF
V
VFF
K
V
INV
Operating range
Turn-on threshold
Turn-off threshold
Hysteresis
Zener Voltage
Start-up Current
Quiescent Current
Operating Supply Current
Quiescent Current
Quiescent Current
Input Bias Current
Operating Range
Gain
Voltage Feedback Input
Threshold
Line Regulation
I
INV
Input Bias Current
V
VFF
= 1.5V, V
COMP
= 4V
T
amb
= 25°C
12V < V
CC
< 18V
Vcc = 12 to 18V
2.465
2.44
2
-0.1
I
cc
= 25 mA
Before turn-on, V
CC
= 12V
After turn-on
@ 70 kHz
During Hiccup-mode OCP
V
ZCD
< V
DIS
, V
CC
>V
CCOff
V
VFF
= 0 to 3 V
0 to 3
0.16
2.5
2.535
2.56
5
-1
mV
µA
V
1.6
1.4
After turn-on
10.3
12.5
8.7
3.65
18
13.5
9.5
4
20
45
2.3
3.5
18
14.5
10.3
4.3
22
70
3.5
5
3.5
2.1
-1
V
V
V
V
µA
mA
mA
mA
mA
µA
V
Parameter
Test Condition
Min.
Typ.
Max.
Unit
SUPPLY CURRENT
LINE FEEDFORWARD
ERROR AMPLIFIER
3/17
L6565
ELECTRICAL CHARACTERISTCS
(continued)
(T
j
= -25 to 125°C, V
CC
= 12V, C
o
= 1nF; unless otherwise specified)
Symbol
G
V
GB
I
COMP
V
COMP
Parameter
Voltage Gain
Gain-Bandwidth Product
Source Current
Sink Current
Upper Clamp Voltage
Lower Clamp Voltage
CURRENT SENSE COMPARATOR
I
CS
t
d(H-L)
V
CSx
Input Bias Current
Delay to Output
Current Sense Reference Clamp
V
COMP
= Upper clamp, V
VFF
= 0V
V
COMP
= Upper clamp, V
VFF
= 1.5V
V
COMP
= Upper clamp, V
VFF
= 3V
V
CSdis
V
ZCDH
V
ZCDL
V
ZCDA
V
ZCDT
I
ZCDb
I
ZCDsrc
I
ZCDsnk
V
DIS
I
ZCDr
T
BLANK
Hiccup-mode OCP level
Upper Clamp Voltage
Lower Clamp Voltage
Arming Voltage
(positive-going edge)
Triggering Voltage
(negative-going edge)
Input Bias Current
Source Current Capability
Sink Current Capability
Disable Threshold
Restart Current After Disable
Blanking time after pin 7 high-to-
low transition
V
ZCD
< V
DIS
, Vcc > Vcc
off
V
COMP
≥
3.2 V
V
COMP
= 2.5 V
250
I
GDsource
= 200mA
I
GDsource
= 20mA
V
OH
t
f
t
r
I
GDoff
Current Fall Time
Current Rise Time
I
GD
sink current
Vcc = 4 V, V
GD
= 1 V
5
I
GDsink
= 200mA
I
GDsink
= 20mA
40
40
10
V
ZCD
= 1 to 4.5 V
-3
3
150
-70
200
-150
3.5
18
400
1.2
0.7
550
2
1
2
0.3
100
100
ns
ns
mA
V
µs
V
I
ZCD
= 3mA
I
ZCD
= - 3mA
(1)
Test Condition
Open loop
V
COMP
= 4V, V
INV
= 2.4 V
V
COMP
= 4V, V
INV
= 2.6 V
I
SOURCE
= 0.5 mA
I
SINK
= 0.5 mA
V
CS
= 0
Min.
60
-2
2.5
5
Typ.
80
1
-3.5
4.5
5.5
2.25
-0.05
200
Max.
Unit
dB
MHz
-5
mA
mA
V
2.55
-1
450
1.5
0.78
0.2
2.2
6.1
1
V
µA
ns
V
1.28
0.62
1.85
4.7
0.3
1.4
0.7
0
2.0
5.2
0.65
2.1
1.6
2
V
V
V
V
V
µA
ZERO CURRENT DETECTOR/ SYNCHRONIZATION
-10
10
250
-230
mA
mA
mV
µA
µs
START TIMER
t
START
V
OL
Start Timer period
Dropout Voltage
GATE DRIVER
(1) Parameters guaranteed by design, not tested in production.
4/17
L6565
Figure 1. Supply current vs. Supply voltage
I
CC
(mA)
10
5
1
5.0 V
Figure 4. Line feedforward characteristics
V
csx
[V]
1.5
Upper clamp
1
0.5
0.1
0.05
0.01
0.005
0
0
5
10
15
20
V
CC
(V)
CL = 1nF
f = 70KHz
TA = 25°C
0.5
4.5 V
4.0 V
3.5 V
3.0 V
V
COMP
= 2.5V
0
0
0.5
1
1.5
2
2.5
3
3.5
V
VFF
[V]
Figure 2. Start-up & UVLO vs. Temperature
14
Figure 5. Pin 2 (COMP) V-I characteristics
V
COMP
[V]
6
5
4
3
Tj = 25 °C
Vpin1 = 0
V
CC-ON
(V)
13
12
11
2
10
V
CC-OFF
(V)
9
-25
Regulation
range
1
0
0
25
50
75
100
125
0
1
2
3
4
T (°C)
I
COMP
[mA]
Figure 3. Feedback reference vs. Temperature
V
REF
(V)
D94IN048A
Figure 6. ZCD blanking time vs. COMP voltage
T
BLANK
[µs]
20
Tj = 25 °C
15
2.50
10
2.48
5
0
2
2.46
-50
0
50
100
T (°C)
3
4
5
6
V
COMP
[V]
5/17
