L6706
VR11.1 single phase controller with integrated driver
Features
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8-bit programmable output up to 1.60000 V -
Intel
®
VR11.1 DAC
High current embedded driver
High output voltage accuracy
Programmable droop function
Imon output
Load transient boost LTB Technology™ to
minimize the number of output capacitors
Full differential current sense across inductor
Differential remote voltage sensing
Adjustable voltage offset
LSLess startup to manage pre-biased output
Feedback disconnection protection
Preliminary overvoltage protection
Programmable overcurrent protection
Programmable overvoltage protection
Adjustable switching frequency
SSEND and OUTEN signal
VFQFPN-40 6x6 mm package with exp. pad
The device implements a single phase step-down
controller with integrated high current driver in a
compact 6x6 mm body package with exposed
pad.
The device embeds VR11.x DACs: the output
voltage ranges up to 1.60000 V managing D-VID
with high output voltage accuracy over line and
temperature variations.
Imon capability guarantee full compatibility with
VR11.1 enabling additional power saving
technique.
Programmable droop function allows to supply all
the latest Intel CPU rails.
Load transient boost LTB Technology™ reduces
system cost by providing the fastest response to
load transition.
The controller assures fast protection against load
over current and under / over voltage. Feedback
disconnection prevents from damaging the load in
case of disconnections in the system board.
In case of over-current, the system works in
constant current mode until UVP.
VFQFPN-40 6 x 6 mm
Description
Applications
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VTT and VAXG rails
CPU power supply
High density DC/DC converters
Table 1.
Device summary
Order codes
L6706
VFQFPN-40
L6706TR
Tape and reel
Package
Packing
Tray
January 2010
Doc ID 15698 Rev 2
1/47
www.st.com
47
Contents
L6706
Contents
1
Principle application circuit and block diagram . . . . . . . . . . . . . . . . . . . 4
1.1
1.2
Principle application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2
Pins description and connection diagrams . . . . . . . . . . . . . . . . . . . . . . 6
2.1
2.2
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1
3.2
Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4
5
6
7
8
Voltage identifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
DAC and current reading . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Differential remote voltage sensing . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Voltage positioning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
8.1
8.2
Offset (optional) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Droop function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
9
10
11
12
13
14
2/47
Droop thermal compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Output current monitoring (IMON) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Load transient boost technology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Dynamic VID transitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Enable and disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Doc ID 15698 Rev 2
L6706
Contents
14.1
Low-side-less startup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
15
Output voltage monitor and protections . . . . . . . . . . . . . . . . . . . . . . . . 34
15.1
15.2
15.3
15.4
15.5
Undervoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Preliminary overvoltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Over voltage and programmable OVP . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Feedback disconnection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
16
17
18
19
20
Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Driver section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
System control loop compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Layout guidelines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
20.1
20.2
20.3
Power components and connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Small signal components and connections . . . . . . . . . . . . . . . . . . . . . . . 43
Embedding L6706 - Based VR . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
21
22
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Doc ID 15698 Rev 2
3/47
Principle application circuit and block diagram
L6706
1
1.1
Principle application circuit and block diagram
Principle application circuit
Figure 1.
V
IN
= 12V
GND
IN
35 VCCDR
Principle application circuit
(a)
L
IN
5V
SB
Optional:Pre-OVP
BOOT
37
PGND
1
DGND
40
V
IN
C
IN
UGATE
39
HS1
L1
Vcc_core
V
cc
3 VCC
PHASE
38
2 SGND
LGATE 36
LS1
R
C
OUT
R
OUT
LOAD
R
OVP
R
OCSET
R
OFFSET
R
LTBGAIN
12
13
11
C
OVPSEL
CS-
OCSET
CS+
LTB
COMP
18
17
8
4
C
F
C
P
R
F
Rg
220nF
GND_core
OFFSET
10 LTBGAIN
R
OSC_SGND
14
To Vcc
R
OSC_VCC
R
SS_FLIM
15
OSC/FAULT
FB
SSOSC/FLIMIT
5
R
FB1
C
LTB
C
i
R
FB
R
LTB
R
FB2
Optional:
R
SSOSC
Optional:
See DS
L6706
R
i
R
FB3
VSEN
FBG
IMON
6
7
9
D
R
FLIMT
Q
See DS
NTC
10k
VTT
1k
SS_END
+3V3
CI
MON
R
IMON_OS
R
1
29 SSEND
VID bus from CPU
27
26
25
24
23
22
21
20
R
IMON_TOT
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
R
2
+3V3
INT1
INT3
INT4
19
31
33
R
3
+12V
NTC
Optional:
See DS
To Enable circuitry
L6706 REF.SCH
16 OUTEN
EXPAD
41
INT2
28
a. Refer to the application note for the reference schematic.
4/47
Doc ID 15698 Rev 2
L6706
Principle application circuit and block diagram
1.2
Block diagram
Figure 2.
Block diagram
VCCDR
PHASE
UGATE
LGATE
PGND
SGND
BOOT
DGND
INT2
INT3
INT1
INT4
VCC
SSEND
OSCILLATOR
OSC / FAULT
+.1240V
LOGIC PWM
ADAPTIVE ANTI
CROSS CONDUCTION
LTBGAIN
SSOSC/
FLIMT
PWM
LTB
INT1
INT2
INT3
INT4
PWM1
INFO
VCC
CH CURRENT
READING
CS-
CS+
I
OCSET
DIGITAL
SOFT START
SSOSC
OUTEN
L6706
CONTROL LOGIC
AND PROTECTIONS
VCCDR
OCSET
INFO
+.1240V
OCSET
20uA
OVP
VID0
VID1
VID2
VID3
VID4
VID5
VID6
VID7
I
DROOP
DAC
WITH DYNAMIC
VID CONTROL
DELIVERED CURRENT
OVP
COMPARATOR
+175mV
1.800V / OVP
OVPSEL
I
OFFSET
I
DROOP
IMON
I
OFFSET
VREF
+.1240V
50uA
LTB
OUTEN
10uA
GND DROP
RECOVERY
ERROR
AMPLIFIER
FBG
COMP
OFFSET
VSEN
LTB
FB
Doc ID 15698 Rev 2
OUTEN
5/47
