L6917B
5 BIT PROGRAMMABLE DUAL-PHASE CONTROLLER
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APPLICATIONS
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POWER SUPPLY FOR SERVERS AND
WORKSTATIONS
s
POWER SUPPLY FOR HIGH CURRENT
MICROPROCESSORS
s
DISTRIBUTED DC-DC CONVERTERS
BLOCK DIAGRAM
ROSC / INH
SGND
PGOOD
2 PHASE
OSCILLATOR
PWM1
2 PHASE OPERATION WITH
SYNCRHONOUS RECTIFIER CONTROL
ULTRA FAST LOAD TRANSIENT RESPONSE
INTEGRATED HIGH CURRENT GATE
DRIVERS: UP TO 2A GATE CURRENT
TTL-COMPATIBLE 5 BIT PROGRAMMABLE
OUTPUT COMPLIANT WITH VRM 9.0
0.8% INTERNAL REFERENCE ACCURACY
10% ACTIVE CURRENT SHARING
ACCURACY
DIGITAL 2048 STEP SOFT-START
OVERVOLTAGE PROTECTION
OVERCURRENT PROTECTION REALIZED
USING THE LOWER MOSFET'S R
dsON
OR A
SENSE RESISTOR
300 kHz INTERNAL OSCILLATOR
OSCILLATOR EXTERNALLY ADJUSTABLE
UP TO 600kHz
POWER GOOD OUTPUT AND INHIBIT
FUNCTION
REMOTE SENSE BUFFER
PACKAGE: SO-28
SO-28
ORDERING NUMBERS:L6917BD
L6917BDTR (Tape & Reel)
b
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DESCRIPTION
The device is a power supply controller specifically
designed to provide a high performance DC/DC con-
version for high current microprocessors.
The device implements a dual-phase step-down con-
troller with a 180° phase-shift between each phase.
A precise 5-bit digital to analog converter (DAC) al-
lows adjusting the output voltage from 1.100V to
1.850V with 25mV binary steps.
The high precision internal reference assures the se-
lected output voltage to be within ±0.8%. The high
peak current gate drive affords to have fast switching
to the external power mos providing low switching
losses.
The device assures a fast protection against load
over current and load over/under voltage. An internal
crowbar is provided turning on the low side mosfet if
an over-voltage is detected. In case of over-current,
the system works in Constant Current mode.
so
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P
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t(
P
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t(
uc
VCCDR
BOOT1
LOGIC PWM
ADAPTIVE ANTI
CROSS-CONDUCTION
UGATE1
HS
PHASE1
-
+
CURRENT
CORRECTION
DIGITAL
SOFT START
CH 1 OVER
CURRENT
LGATE1
LS
ISEN1
VCC
VCCDR
LOGIC
AND
PROTECTIONS
TOTAL
CURRENT
+
CURRENT
READING
PGNDS1
PGND
PGNDS2
VID4
VID3
VID2
VID1
VID0
AVG
CURRENT
DAC
CH2 OVER
CURRENT
CH1 OVER
CURRENT
<>
CURRENT
READING
ISEN2
LOGIC PWM
ADAPTIVE ANTI
CROSS-CONDUCTION
CH 2 OVER
CURRENT
LGATE2
LS
10k
10k
10k
REMOTE
BUFFER
+
IFB
FBG
FBR
CURRENT
CORRECTION
-
ERROR
AMPLIFIER
PHASE2
PWM2
UGATE2
HS
10k
Vcc
BOOT2
VSEN
FB
COMP
Vcc
September 2002
1/33
L6917B
ABSOLUTE MAXIMUM RATINGS
Symbol
Vcc, V
CCDR
V
BOOT
-V
PHASE
V
UGATE1
-V
PHASE1
V
UGATE2
-V
PHASE2
LGATE1, PHASE1, LGATE2, PHASE2 to PGND
All other pins to PGND
V
phase
Sustainable Peak Voltage t < 20ns @ 600kHz
to PGND
Boot Voltage
Parameter
Value
15
15
15
Unit
V
V
V
-0.3 to Vcc+0.3
-0.3 to 7
26
V
V
THERMAL DATA
Symbol
R
th j-amb
T
max
Parameter
Thermal Resistance Junction to Ambient
Maximum junction temperature
Storage temperature range
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P
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150
T
storage
T
j
-40 to 150
-25 to 125
2
Junction Temperature Range
P
MAX
Max power dissipation at T
amb
= 25°C
ro
P
60
Value
uc
d
s)
t(
V
Unit
°C/W
°C
°C
s)
t(
uc
°C
W
PIN CONNECTION
LGATE1
1
2
3
4
5
6
7
8
9
28
27
26
25
24
23
22
21
PGND
VCCDR
LGATE2
PHASE1
PHASE2
UGATE1
UGATE2
BOOT2
BOOT1
VCC
PGOOD
VID4
GND
COMP
VID3
VID2
VID1
FB
20
19
18
17
16
15
VSEN
10
FBR
11
12
13
14
VID0
FBG
OSC / INH / FAULT
ISEN2
PGNDS2
ISEN1
PGNDS1
SO28
2/33
L6917B
ELECTRICAL CHARACTERISTICS
V
CC
= 12V ±10%, T
J
= 0 to 70°C unless otherwise specified
Symbol
Parameter
Test Condition
Min
Typ
Max
Unit
Vcc SUPPLY CURRENT
I
CC
I
CCDR
I
BOOTx
Vcc supply current
V
CCDR
supply current
Boot supply current
HGATEx and LGATEx open
V
CCDR
=V
BOOT
=12V
LGATEx open; V
CCDR
=12V
HGATEx open; PHASEx to PGND
V
CC
=V
BOOT
=12V
7.5
2
0.5
10
3
1
12.5
4
1.5
mA
mA
mA
POWER-ON
Turn-On V
CC
threshold
Turn-Off V
CC
threshold
Turn-On V
CCDR
Threshold
Turn-Off V
CCDR
Threshold
OSCILLATOR/INHIBIT/FAULT
f
OSC
Initial Accuracy
V
CC
Rising; V
CCDR
=5V
V
CC
Falling; V
CCDR
=5V
V
CCDR
Rising
V
CC
=12V
V
CCDR
Falling
V
CC
=12V
7.8
6.5
9
7.5
)-
(s
so
b
ct
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s)
P
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b
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f
OSC,Rosc
Total Accuracy
INH
R
T
to GND=74kΩ
I
SINK
=5mA
Inhibit threshold
d
MAX
Maximum duty cycle
OSC = OPEN
∆Vosc
Ramp Amplitude
FAULT
Voltage at pin OSC
OVP or UVP Active
REFERENCE AND DAC
Output Voltage
Accuracy
I
DAC
VID pull-up Current
VID pull-up Voltage
VIDx = GND
VIDx = OPEN
ERROR AMPLIFIER
DC Gain
SR
Slew-Rate
COMP=10pF
DIFFERENTIAL AMPLIFIER (REMOTE BUFFER)
DC Gain
CMRR
Common Mode Rejection Ratio
OSC = OPEN
OSC = OPEN; Tj=0°C to 125°C
b
O
so
t
le
P
e
4.0
278
270
450
0.8
70
1.8
4.75
4.2
ro
4.4
uc
d
10.2
8.5
s)
t(
V
V
V
4.6
4.2
P
te
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r
300
500
0.85
75
2
5.0
ct
u
4.4
322
330
550
0.9
s)
(
V
kHz
kHz
kHz
V
%
2.2
5.25
V
V
VID0, VID1, VID2, VID3, VID4
see Table1;
FBR = V
OUT
; FBG = GND
-0.8
-
0.8
%
4
3.1
5
-
6
3.4
µA
V
80
15
dB
V/µs
1
40
V/V
dB
3/33
L6917B
ELECTRICAL CHARACTERISTICS
(continued)
V
CC
= 12V ±10%, T
J
= 0 to 70°C unless otherwise specified
Symbol
Parameter
Input Offset
SR
Slew Rate
Test Condition
FBR=1.100V to1.850V;
FBG=GND
VSEN=10pF
Min
-12
15
Typ
Max
12
Unit
mV
V/µs
DIFFERENTIAL CURRENT SENSING
I
ISEN1
,
I
ISEN2
I
PGNDSx
I
ISEN1
,
I
ISEN2
I
FB
Bias Current
Iload=0
45
50
55
µA
Bias Current
Bias Current at
Over Current Threshold
Active Droop Current
Iload<0%
Iload=100%
45
80
50
85
55
47.5
GATE DRIVERS
t
RISE
HGATE
High Side
Rise Time
High Side
Source Current
High Side
Sink Resistance
Low Side
Rise Time
V
BOOTx
-V
PHASEx
=10V;
C
HGATEx
to PHASEx=3.3nF
V
BOOTx
-V
PHASEx
=10V
I
HGATEx
R
HGATEx
t
RISE
LGATE
)-
(s
so
b
ct
u
d
-O
ro
s)
P
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P
b
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so
b
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V
BOOTx
-V
PHASEx
=12V;
V
CCDR
=10V;
C
LGATEx
to PGNDx=5.6nF
V
CCDR
=10V
V
CCDR
=12V
I
LGATEx
Low Side
Source Current
R
LGATEx
Low Side
Sink Resistance
P GOOD and OVP/UVP PROTECTIONS
PGOOD
Upper Threshold
(V
SEN
/DACOUT)
V
SEN
Rising
PGOOD
OVP
UVP
Lower Threshold
(V
SEN
/DACOUT)
V
SEN
Falling
V
SEN
Rising
Over Voltage Threshold
(V
SEN
)
Under Voltage Trip
(V
SEN
/DACOUT)
V
SEN
Falling
V
PGOOD
PGOOD Voltage Low
I
PGOOD
= -4mA
b
O
so
te
le
r
P
du
o
0
50
15
2
ct
90
1
52.5
30
s)
(
µA
µA
P
te
le
1.5
0.7
od
r
2
30
1.8
1.1
s)
t(
uc
A
2.5
55
Ω
µA
µA
ns
ns
A
1.5
Ω
108
84
2.0
56
0.3
112
88
116
92
2.25
%
%
V
%
V
60
0.4
64
0.5
4/33
L6917B
Table 1. VID Settings
VID4
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
VID3
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
VID2
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
VID1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
VID0
1
0
1
0
1
0
1
0
1
0
Output Voltage (V)
OUTPUT OFF
1.100
1.125
1.150
1.175
1.200
1.225
O
bs
0
0
0
0
0
0
0
0
0
0
et
l
o
r
P
e
1
1
1
1
1
0
0
0
0
0
0
0
0
1
od
uc
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
s)
t(
O
-
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
so
b
te
le
0
1
0
1
ro
P
uc
d
1.250
1.275
1.300
1.325
1.350
1.375
1.400
1.425
1.450
1.475
1.500
1.525
1.550
1.575
1.600
1.625
1.650
1.675
1.700
1.725
1.750
1.775
1.800
1.825
1.850
s)
t(
b
O
so
te
le
ro
P
uc
d
s)
t(
so
b
-O
te
le
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
r
P
od
s)
t(
uc
5/33