Ordering number : EN7202A
LC89057W-VF4A-E
CMOS IC
Digital Audio Interface Transceiver
http://onsemi.com
1. Overview
The LC89057W-VF4A-E is an audio IC that demodulates and modulates signals according to data transfer format
between digital audio devices via the IEC60958/61937 and EIAJ CP-1201 and supports up to 192kHz of sampling
frequency. It features a built-in VCO and oscillation amplifier, two bit clock circuits that are capable of setting
independently the frequency-dividing ratios that can also be used for the DSP data input/output clocks, and LR clock
output pins. A multi-channel PCM interface using multiple LC89057W-VF4A-E ICs is also available through a
master/slave function.
This IC is optimal for use in high performance AV amplifiers and a multi-channel PCM interface for DVD audio
equipment.
2. Features
2.1 Realizes full demodulation for high performance AV equipment
•
Possible to receive the sampling frequency of 32kHz to 192kHz and 24 bits data at a maximum.
•
Supports I
2
S data output that facilitates interfacing with DSP.
•
Output clock: 512fs, 256fs, 128fs, 64fs, 32fs, 2fs, fs, and fs/2
•
Possible to output oscillation amplifier and external input clocks regardless of the PLL status.
•
Maintains output clock continuity during clock switching.
•
Supports Multi-channel transfer and reception, using master/slave function.
•
Possible to process demodulation functions using common low-jitter clock without using PLL
(external clock synchronization function)
•
Built-in PLL error lock prevention circuit to provide accurate lock
Semiconductor Components Industries, LLC, 2013
May, 2013
N0707HKIM VL-2194 No.7202-1/59
LC89057W-VF4A-E
2.2 Outputs various information to make system configuration easy
•
Outputs DTS-CD/LD detection flag by DTS sync signal detection.
•
Outputs burst preamble Pc from microcontroller interface.
•
Calculates sampling frequency of input signal and outputs it from microcontroller interface.
•
Outputs interrupt signal for microcontroller (interrupt source can be selected).
•
Outputs signal of transitional period switching between VCO clock and oscillation amplifier clock.
•
Outputs bit 1 of channel status (non-PCM data detection bit).
•
Outputs emphasis information of channel status.
•
Outputs renewed flag of the first 48 bits channel status.
•
Channel status bit, validity flag and user data output are selectable.
•
Outputs modulation/demodulation preamble B information.
•
Possible to carry out and output various settings through microcontroller interface.
2.3 Plenty of built-in functions to reduce peripheral circuits
•
Includes modulation function that can attach channel status, validity flag, and user data.
•
Equipped with a total of 7 digital data input pins: 1 input pin with an amplifier and 6 input pins with 5V tolerable
TTL level signal.
•
Possible to monitor input pin status with microcontroller by mounting a bi-phase input data detection function.
•
Possible to select input data among 8 system input data including modulation function output.
•
Possible to select output of input-data through among 8 system input data aside from selecting demodulation data.
•
Includes 2 system bit clock and LR clock outputs. Various frequency-dividing ratios can be set to one of these two
systems.
•
Equipped with a serial digital audio data input pin. Possible to switch with demodulation output.
•
Possible to modulate the data that is input to the serial digital audio data input pin.
•
Includes built-in oscillation amplifier and frequency divider for quartz resonator and also possible to use them as
clock generator.
•
Includes 4 bits general-purpose parallel I/O port. It can be used for interface with peripheral ICs.
•
All the channel status can be decoded through peripheral circuit using preamble B information.
•
A continuous switching operation between external clock synchronous mode and PLL clock synchronous mode is
possible.
•
Single 3.3V-power supply operation. TTL input port supports 5V interface.
•
Adopts small SQFP48 package for efficient use of substrate mounting area.
Package Dimensions
unit : mm (typ)
3163B
9.0
7.0
36
37
25
24
48
1
0.5
(0.75)
12
0.18
13
7.0
9.0
0.15
1.7max
0.1
(1.5)
SANYO : SQFP48(7X7)
0.5
No.7202-2/59
LC89057W-VF4A-E
4. Pin Assignment
EMPHA/UO/CD
CKST/PB
AUDIO/VO
DGND
DVDD
36 35 34 33 32 31 30 29 28 27 26 25
DGND
24
SDIN
23
SLRCK
22
SBCK
21
RDATA
20
RLRCK
19
DV
DD
18
DGND
17
RBCK
16
RMCK
15
AGND
14
AV
DD
13
LPF
XMCK
* RX6/UI
DO
37
DI
38
CE
39
CL
40
XMODE
41
DGND
42
DVDD
43
TMCK/PIO0
44
TBCK/PIO1
45
TLRCK/PIO2
46
TDATA/PIO3
47
TXO/PIOEN
48
1
2
3
4
5
6
7
8
9
10 11 12
LC89057W-VF4A-E
* RX5/VI
* RX3
* RX0
* RX2
DVDD
* RX4
RXOUT
DGND
DVDD
RX1
DVDD
RERR
INT
XOUT
XIN
DGND
* : Pull-down resistor internal
Top view
5. Pin Functions
Table 5.1 Pin Functions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Name
RXOUT
RX0
RX1
RX2
RX3
DGND
DVDD
RX4
RX5/VI
RX6/UI
DVDD
DGND
LPF
AVDD
AGND
RMCK
RBCK
DGND
DVDD
RLRCK
RDATA
SBCK
SLRCK
SDIN
O/I
O
O
O
I
5
O
O/I
O
I
5
I
5
I
5
I/O
O
I
5
I
I
5
I
5
Output pin of Input bi-phase selection data
Input pin of TTL-compatible digital data
Digital data input pin with built-in amplifier that supports coaxial
Input pin of TTL-compatible digital data
Input pin of TTL-compatible digital data
Digital GND
Digital power supply
Input pin of TTL-compatible digital data
TTL-compatible digital data || Validity flag input pin for modulation
TTL-compatible digital data || User data input pin for modulation
Digital power supply for PLL
Digital GND for PLL
PLL loop filter connection pin
Analog power supply for PLL
Analog GND for PLL
R system clock output pin (256fs, 512fs, XIN, VCO)
R system bit clock input/output pin (64fs)
Digital GND
Digital power supply
R system LR clock input/output pin (fs)
Output pin of serial audio data
S system bit clock output pin (32fs, 64fs, 128fs)
S system LR clock output pin (fs/2, fs, 2fs)
Input pin of serial audio data
Function
Continued on next page.
No.7202-3/59
LC89057W-VF4A-E
Continued from preceding page.
Pin No.
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Name
DGND
DVDD
XMCK
XOUT
XIN
DVDD
DGND
EMPHA/UO/CO
AUDIO/VO
CKST/PB
INT
RERR
DO
DI
CE
CL
XMODE
DGND
DVDD
TMCK/PIO0
TBCK/PIO1
TLRCK/PIO2
TDATA/PIO3
TXO/PIOEN
I/O
I/O
I/O
I/O
O/I
I/O
I/O
I/O
I/O
O
O
I
5
I
5
I
5
I
5
O
O
I
I/O
Digital GND
Digital power supply
Oscillation amplifier output pin
Quartz resonator connection output pin
Quartz resonator connection, input pin of external supply clock (24.576MHz or 12.288MHz)
Digital power supply
Digital GND
Emphasis information || U data output || C data output || Chip address setting pin
Non-PCM detection || V flag output || Chip address setting pin
Output of clock switch transitional period signal || Preamble B output || Demodulation master or slave
function switch pin
Interrupt output for Microcontroller (Possible to select an interrupt factor.) || Modulation or general-purpose
I/O switch pin
PLL clock error, data error flag output
Microcontroller I/F, read data output pin (3-state)
Microcontroller I/F, write data input pin
Microcontroller I/F, chip enable input pin
Microcontroller I/F, clock input pin
System reset input pin
Digital GND
Digital power supply
256fs or 128fs system clock input for modulation || 256fs or 512fs system clock input for external clock sync
function || General-purpose I/O pin
64fs bit clock input for modulation || General-purpose I/O pin
fs clock input for modulation || General-purpose I/O pin
serial audio data input for modulation || General-purpose I/O pin
Modulation data output || General-purpose I/O enable input pin
Function
1) Withstand voltage input/output: I or O
=
-0.3 to 3.6V, I
5
=
-0.3 to 5.5V
2) Pins 32 and 33 are input pins for chip address setting, when pin 41
=
"L".
3) Pin 34 is a demodulation function master or an input pin for slave setting, when pin 41 = "L".
4) Pin 35 is a modulation function or an input pin for general-purpose I/O function switch setting, when pin 41 = "L".
5) ON/OFF for all power supplies must be done at the same timing as a latch-up countermeasure.
No.7202-4/59
LC89057W-VF4A-E
6. Block Diagram
EMPHA/UO/CO
32
AUDIO/VO
33
INT
35
CL
48
CE
39
CI
38
XMODE
41
RXOUT
RX0
RX1
RX2
RX3
RX4
RX5/VI
RX6/UI
1
2
Cbit, Ubit
Microcontroller
I/F
37
DO
36
3
4
5
8
9
10
24
Input
Selector
Demodulation
&
Lock detect
Data
Selector
21
RERR
RDATA
SDIN
LPF
16
13
PLL
17
Clock
Selector
Modulation
or
Parallel Port
1/N
23
20
22
RMCK
RBCK
RLRCK
SBCK
SLRCK
TMCK/PIO0
TBCK/PIO1
TLRCK/PIO2
TDATA/PIO3
TXO/PIOEN
44
45
46
47
48
29
XIN
28
XOUT
27
XMCK
34
CKST/PB
7. Comparison between LC89057W-VF4 and LC89057W-VF4A
Table 7.1 Difference between LC89057W-VF4 and LC89057W-VF4A
Item
DIR function: External synchronization mode
DIR function: Setting of RERR wait time after PLL
is locked
LC89057W-VF4
256fs clock input
After preamble B is counted 6.
After preamble B is counted 12.
After preamble B is counted 24.
After preamble B is counted 48.
DIR function: Setting of clock wait time after PLL is
unlocked
50μs from when oscillation amplifier starts
100μs from when oscillation amplifier starts
200μs from when oscillation amplifier starts
400μs from when oscillation amplifier starts
DIR function: Channel status bit output
DIR function: Preamble B info output
DIT function: System clock
DIT function: Preamble B info output
Microcontroller read out
×
256fs clock input
×
LC89057W-VF4A
256fs or 512fs clock input
After preamble B is counted 3.
After preamble B is counted 6.
After preamble B is counted 12.
After preamble B is counted 24.
0μs from when oscillation amplifier starts
50μs from when oscillation amplifier starts
100μs from when oscillation amplifier starts
200μs from when oscillation amplifier starts
Microcontroller read out or terminal output
(full decode processing possible)
256fs or 128fs clock input
No.7202-5/59
