Intel® Celeron® Processor 500
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Series
Datasheet
For Platforms Based on Mobile Intel® 965 Express Chipset Family
January 2008
Revision 003
Document Number: 317665-003
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Datasheet
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Intel
Contents
1
Introduction
.............................................................................................................. 7
1.1
Terminology ....................................................................................................... 8
1.2
References ......................................................................................................... 9
Low Power Features
................................................................................................ 11
2.1
Clock Control and Low Power States .................................................................... 11
2.1.1 Core Low-Power States ........................................................................... 12
2.1.1.1 C0 State .................................................................................. 12
2.1.1.2 C1/AutoHALT Powerdown State .................................................. 12
2.1.1.3 C1/MWAIT Powerdown State ...................................................... 13
2.1.1.4 Core C2 State........................................................................... 13
2.1.1.5 Core C3 State........................................................................... 13
2.1.2 Package Low-Power States ...................................................................... 13
2.1.2.1 Normal State............................................................................ 13
2.1.2.2 Stop-Grant State ...................................................................... 13
2.1.2.3 Stop Grant Snoop State ............................................................. 14
2.1.2.4 Sleep State .............................................................................. 14
2.1.2.5 Deep Sleep State ...................................................................... 15
2.2
Low-Power FSB Features .................................................................................... 15
2.3
Processor Power Status Indicator (PSI#) Signal..................................................... 15
Electrical Specifications
........................................................................................... 17
3.1
Power and Ground Pins ...................................................................................... 17
3.2
FSB Clock (BCLK[1:0]) and Processor Clocking ...................................................... 17
3.3
Voltage Identification ......................................................................................... 17
3.4
Catastrophic Thermal Protection .......................................................................... 21
3.5
Reserved and Unused Pins.................................................................................. 21
3.6
FSB Frequency Select Signals (BSEL[2:0])............................................................ 22
3.7
FSB Signal Groups............................................................................................. 22
3.8
CMOS Signals ................................................................................................... 23
3.9
Maximum Ratings.............................................................................................. 23
3.10 Processor DC Specifications ................................................................................ 24
Package Mechanical Specifications and Pin Information
.......................................... 29
4.1
Package Mechanical Specifications ....................................................................... 29
4.2
Processor Pinout and Pin List .............................................................................. 34
4.3
Alphabetical Signals Reference ........................................................................... 53
Thermal Specifications
............................................................................................ 61
5.1
Thermal Diode .................................................................................................. 62
5.1.1 Thermal Diode Offset .............................................................................. 62
5.2
Intel® Thermal Monitor...................................................................................... 64
5.3
Digital Thermal Sensor....................................................................................... 66
5.4
Out of Specification Detection ............................................................................. 66
5.5
PROCHOT# Signal Pin ........................................................................................ 67
2
3
4
5
Datasheet
3
Figures
1
2
3
4
5
6
7
Package-Level Low-Power States ................................................................................11
Core Low-Power States .............................................................................................12
Active VCC and ICC Loadline Standard Voltage .............................................................26
1-MB Fused Micro-FCPGA Processor Package Drawing (1 of 2) ........................................30
1-MB Fused Micro-FCPGA Processor Package Drawing (2 of 2) ........................................31
1-MB Micro-FCPGA Processor Package Drawing (1 of 2) .................................................32
1-MB Micro-FCPGA Processor Package Drawing (2 of 2) .................................................33
Tables
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Coordination of Core-Level Low-Power States at the Package Level .................................11
Voltage Identification Definition ..................................................................................18
BSEL[2:0] Encoding for BCLK Frequency......................................................................22
FSB Pin Groups ........................................................................................................22
Processor Absolute Maximum Ratings..........................................................................24
DC Voltage and Current Specifications.........................................................................24
FSB Differential BCLK Specifications ............................................................................26
AGTL+ Signal Group DC Specifications ........................................................................27
CMOS Signal Group DC Specifications..........................................................................28
Open Drain Signal Group DC Specifications ..................................................................28
The Coordinates of the Processor Pins as Viewed from the Top of the Package
(Sheet 1 of 2) ..........................................................................................................34
The Coordinates of the Processor Pins as Viewed from the Top of the Package
(Sheet 2 of 2) ..........................................................................................................35
Pin Listing by Pin Name .............................................................................................37
Pin Listing by Pin Number ..........................................................................................44
Signal Description.....................................................................................................53
Standard Voltage Power Specifications ........................................................................61
Thermal Diode ntrim and Diode Correction Toffset ........................................................63
Thermal Diode Interface ............................................................................................63
Thermal Diode Parameters using Diode Mode ...............................................................63
Thermal Diode Parameters using Transistor Model ........................................................64
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Datasheet
Revision History
Document
Number
317666
317666
317665
Revision
Number
-001
-002
-003
Initial Release
Corrected Figures 4, 5, 6, & 7
Added the Intel Celeron processor 560
Description
Date
June 2007
November 2007
January 2008
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Datasheet
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ARM技术
