Power switch input. Switch connected between SW pin and GND pin.
Analog power input.
Switching frequency select input. V
IN
= 1.25MHz. Ground = 600kHz.
Connect to ground.
Function
Compensation network connection. Connected to the output of the voltage error amplifier.
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2
LM2698
Block Diagram
20012603
3
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LM2698
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V
IN
SW Voltage
FB Voltage
V
C
Voltage
SHDN Voltage
(Note 2)
FSLCT
(Note 2)
Maximum Junction
Temperature
Power Dissipation (Note 3)
Lead Temperature
−0.3V
≤
V
IN
≤
12V
−0.3V
≤
V
SW
≤
18V
−0.3V
≤
V
FB
≤
7V
0.965
<
V
C
<
1.565
−0.3V
≤
V
SHDN
≤
7V
−0.3V
≤
V
FSLCT
≤
12V
150˚C
Internally Limited
300˚C
Vapor Phase (60 sec.)
Infrared (15 sec.)
ESD Susceptibility
(Note 4)
Human Body Model
(Note 5)
Machine Model
215˚C
220˚C
2kV
200V
Operating Conditions
Operating Junction
Temperature Range
(Note 6)
Storage Temperature
Supply Voltage
SW Voltage
−40˚C to +125˚C
−65˚C to +150˚C
2.2V to 12V
0
≤
V
SW
≤
17.5V
Electrical Characteristics
Specifications in standard type face are for T
J
= 25˚C and those with
boldface type
apply over the full
Operating Tempera-
ture Range
( T
J
= −40˚C to +125˚C)Unless otherwise specified. V
IN
=2.2V and I
L
= 0A, unless otherwise specified.
Symbol
I
Q
V
FB
I
CL
%V
FB
/∆V
IN
I
B
V
IN
g
m
A
V
D
MAX
D
MIN
f
S
I
SHDN
I
L
R
DS(ON)
TH
SHDN
UVP
Parameter
Quiescent Current
Feedback Voltage
Switch Current Limit
Feedback Voltage Line
Regulation
FB Pin Bias Current
(Note 9)
Input Voltage Range
Error Amp Transconductance
∆I
= 5µA
Error Amp Voltage Gain
Maximum Duty Cycle
Minimum Duty Cycle
Switching Frequency
Shutdown Pin Current
Switch Leakage Current
Switch R
DS(ON)
SHDN Threshold Voltage
On Threshold
Off Threshold
FSLCT = Ground
FSLCT = Ground
FSLCT = V
IN
FSLCT = Ground
FSLCT = V
IN
V
SHDN
= V
IN
V
SHDN
= 0V
V
SW
= 18V
V
IN
= 2.7V, I
SW
= 1A
Output High
Output Low
0.3
1.95
1.85
480
1
78
2.2
40
135
120
85
15
30
600
1.25
0.01
−0.5
0.01
0.2
0.6
0.6
2.05
1.95
2.2
2.1
720
1.5
0.1
-1
3
0.4
0.9
µA
Ω
V
V
V
V
kHz
MHz
µA
V
IN
= 2.7V (Note 8)
2.2V
≤
V
IN
≤
12.0V
Conditions
FB = 0V (Not Switching)
V
SHDN
= 0V
1.2285
1.35
Min
(Note 6)
Typ
(Note 7)
1.3
5
1.26
1.9
0.013
0.5
Max
(Note 6)
2.0
10
1.2915
2.4
0.1
20
12
290
Units
mA
µA
V
A
%/V
nA
V
µmho
V/V
%
%
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4
LM2698
Electrical Characteristics
(Continued)
Specifications in standard type face are for T
J
= 25˚C and those with
boldface type
apply over the full
Operating Tempera-
ture Range
( T
J
= −40˚C to +125˚C)Unless otherwise specified. V
IN
=2.2V and I
L
= 0A, unless otherwise specified.
Symbol
θ
JA
Parameter
Thermal Resistance
Conditions
Junction to Ambient
(Note 10)
Junction to Ambient
(Note 11)
Junction to Ambient
(Note 12)
Junction to Ambient
(Note 13)
Junction to Ambient
(Note 14)
Min
(Note 6)
Typ
(Note 7)
235
225
220
200
195
Max
(Note 6)
Units
˚C/W
Note 1:
Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to
be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2:
Shutdown and voltage frequency select should not exceed V
IN
.
Note 3:
The maximum allowable power dissipation is a function of the maximum junction temperature, T
J
(MAX), the junction-to-ambient thermal resistance,
θ
JA
,
and the ambient temperature, T
A
. See the Electrical Characteristics table for the thermal resistance of various layouts. The maximum allowable power dissipation
at any ambient temperature is calculated using: P
D
(MAX) = (T
J(MAX)
− T
A
)/θ
JA
. Exceeding the maximum allowable power dissipation will cause excessive die
temperature, and the regulator will go into thermal shutdown.
Note 4:
The human body model is a 100 pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged
directly into each pin.
Note 5:
ESD susceptibility using the human body model is 500V for V
C
.
Note 6:
All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are 100% tested
or guaranteed through statistical analysis. All limits at temperature extremes are guaranteed via correlation using standard Statistical Quality Control (SQC) methods.
All limits are used to calculate Average Outgoing Quality Level (AOQL).
Note 7:
Typical numbers are at 25˚C and represent the most likely norm.
Note 8:
This is the switch current limit at 0% duty cycle. The switch current limit will change as a function of duty cycle. See Typical performance Characteristics
section for I
CL
vs. V
IN
Note 9:
Bias current flows into FB pin.
Note 10:
Junction to ambient thermal resistance (no external heat sink) for the MSO8 package with minimal trace widths (0.010 inches) from the pins to the circuit.
See "Scenario ’A’" in the Power Dissipation section.
Note 11:
Junction to ambient thermal resistance for the MSO8 package with minimal trace widths (0.010 inches) from the pins to the circuit and approximately
0.0191 sq. in. of copper heat sinking. See "Scenario ’B’" in the Power Dissipation section.
Note 12:
Junction to ambient thermal resistance for the MSO8 package with minimal trace widths (0.010 inches) from the pins to the circuit and approximately
0.0465 sq. in. of copper heat sinking. See "Scenario ’C’" in the Power Dissipation section.
Note 13:
Junction to ambient thermal resistance for the MSO8 package with minimal trace widths (0.010 inches) from the pins to the circuit and approximately
0.2523 sq. in. of copper heat sinking. See "Scenario ’D’" in the Power Dissipation section.
Note 14:
Junction to ambient thermal resistance for the MSO8 package with minimal trace widths (0.010 inches) from the pins to the circuit and approximately
0.0098 sq. in. of copper heat sinking on the top layer and 0.0760 sq. in. of copper heat sinking on the bottom layer, with three 0.020 in. vias connecting the planes.
See "Scenario ’E’" in the Power Dissipation section.
GD32 MCU
