PMOS source connection for synchronous rectification.
Switch pin. Drain connections of both NMOS and PMOS power devices.
Power Ground.
Output voltage feedback connection.
No internal connection made to this pin.
Shutdown control pin.
FB(pin B3):
Output voltage feedback connection. Set the
primary White LED network current with a resistor from the
FB pin to GND. Keep the current setting resistor close to the
device and connected between the FB and GND pins.
NC(pin A3):
No internal connection is made to this pin. The
maximum allowable voltage that can be applied to this pin is
7.5V.
SHDN(pin A2):
Shutdown control pin. Disable the device
with a voltage less than 0.3V and enable the device with a
voltage greater than 1.1V. The white LED current can be
controlled using a PWM signal at this pin. There is an
internal pull down on the SHDN pin, the device is in a
normally off state.
Function
AGND(pin A1):
Analog ground pin. The analog ground pin
should tie directly to the GND pin.
V
IN
(pin B1):
Analog and Power supply pin. Bypass this pin
with a capacitor, as close to the device as possible, con-
nected between the V
IN
and GND pins.
V
OUT
(pin C1):
Source connection of internal PMOS power
device. Connect the output capacitor between the V
OUT
and
GND pins as close as possible to the device.
V
SW
(pin C2):
Drain connection of internal NMOS and PMOS
switch devices. Keep the inductor connection close to this
pin to minimize EMI radiation.
GND(pin C3):
Power ground pin. Tie directly to ground
plane.
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2
LM3500
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V
IN
V
OUT
(LM3500-16)(Note 2)
V
OUT
(LM3500-21)(Note 2)
V
SW
(Note 2)
FB, SHDN, and NC Voltages
Maximum Junction Temperature
Lead Temperature
(Note 3)
ESD Ratings (Note 4)
Human Body Model
Machine Model
2kV
200V
−0.3V to 7.5V
−0.3V to 16V
−0.3V to 21V
−0.3V to V
OUT
+0.3V
−0.3V to 7.5V
150˚C
300˚C
Operating Conditions
Ambient Temperature
(Note 5)
Junction Temperature
Supply Voltage
−40˚C to +85˚C
−40˚C to +125˚C
2.7V to 7V
Thermal Properties
Junction to Ambient Thermal
Resistance (θ
JA
)(Note 6)
75˚C/W
Electrical Characteristics
Specifications in standard type face are for T
A
= 25˚C and those in
boldface type
apply over the Operating Temperature
Range of T
A
= −10˚C to +85˚C. Unless otherwise specified V
IN
=2.7V and specification apply to both LM3500-16 and LM3500-
21.
Symbol
I
Q
Parameter
Quiescent Current, Device
Not Switching
Quiescent Current, Device
Switching
Shutdown
V
FB
∆V
FB
I
CL
Feedback Voltage
Feedback Voltage Line
Regulation
Switch Current Limit
(LM3500-16)
Conditions
FB
>
0.54V
FB = 0V
SHDN = 0V
V
IN
= 2.7V to 7V
V
IN
= 2.7V to 7V
V
IN
= 2.7V,
Duty Cycle = 80%
V
IN
= 3.0V,
Duty Cycle = 70%
Switch Current Limit
(LM3500-21)
V
IN
= 2.7V,
Duty Cycle = 70%
V
IN
= 3.0V,
Duty Cycle = 63%
I
B
V
IN
R
DSON
D
Limit
FB Pin Bias Current
Input Voltage Range
NMOS Switch R
DSON
PMOS Switch R
DSON
Duty Cycle Limit
(LM3500-16)
Duty Cycle Limit
(LM3500-21)
F
SW
I
SD
Switching Frequency
SHDN Pin Current (Note 10)
SHDN = 5.5V
SHDN = 2.7V
SHDN = GND
V
IN
= 2.7V, I
SW
= 300mA
V
OUT
= 6V, I
SW
= 300mA
FB = 0V
FB = 0V
80
85
0.85
1.1
87
%
94
1.0
18
9
0.1
1.15
30
16
µA
MHz
FB = 0.5V (Note 9)
2.7
0.47
Min
(Note 7)
Typ
(Note 8)
0.95
1.8
0.1
0.5
0.1
275
255
420
450
400
400
640
670
45
Max
(Note 7)
1.2
mA
2.5
2
0.53
0.4
480
530
mA
770
800
200
7.0
0.43
2.3
nA
V
Ω
µA
V
%/V
Units
3
www.national.com
LM3500
Electrical Characteristics
(Continued)
Specifications in standard type face are for T
A
= 25˚C and those in
boldface type
apply over the Operating Temperature
Range of T
A
= −10˚C to +85˚C. Unless otherwise specified V
IN
=2.7V and specification apply to both LM3500-16 and LM3500-
21.
Symbol
I
L
Parameter
Switch Leakage Current
(LM3500-16)
Switch Leakage Current
(LM3500-21)
UVP
OVP
Input Undervoltage Lockout
Output Overvoltage
Protection (LM3500-16)
Output Overvoltage
Protection (LM3500-21)
I
Vout
V
OUT
Bias Current
(LM3500-16)
V
OUT
Bias Current
(LM3500-21)
I
VL
PMOS Switch Leakage
Current (LM3500-16)
PMOS Switch Leakage
Current (LM3500-21)
SHDN
Threshold
SHDN Low
Conditions
V
SW
= 15V
V
SW
= 20V
ON Threshold
OFF Threshold
ON Threshold
OFF Threshold
ON Threshold
OFF Threshold
V
OUT
= 15V, SHDN = V
IN
V
OUT
= 20V, SHDN = V
IN
V
OUT
= 15V, V
SW
= 0V
V
OUT
= 20V, V
SW
= 0V
2.4
2.3
15
14
20
19
Min
(Note 7)
Typ
(Note 8)
0.01
0.01
2.5
2.4
15.5
14.6
20.5
19.5
260
300
0.01
0.01
0.65
Max
(Note 7)
0.5
2.0
2.6
2.5
16
15
21
20
400
µA
460
3
µA
3
0.3
V
Units
µA
V
V
SHDN High
1.1
0.65
Specifications in standard type face are for T
J
= 25˚C and those in
boldface type
apply over the full
Operating Temperature
Range (T
J
= −40˚C to +125˚C).
Unless otherwise specified V
IN
=2.7V and specification apply to both LM3500-16 and LM3500-
21.
Symbol
Parameter
Quiescent Current, Device
Not Switching
Quiescent Current, Device
Switching
Shutdown
Conditions
FB
>
0.54V
FB = 0V
SHDN = 0V
V
IN
= 2.7V to 7V
V
IN
= 2.7V to 7V
V
IN
= 3.0V, Duty Cycle =
70%
V
IN
= 3.0V, Duty Cycle =
63%
FB = 0.5V (Note 9)
2.7
V
IN
= 2.7V, I
SW
= 300mA
V
OUT
= 6V, I
SW
= 300mA
FB = 0V
FB = 0V
0.8
1.1
87
%
94
1.0
1.2
MHz
0.47
Min
(Note 7)
Typ
(Note 8)
0.95
1.8
0.1
0.5
0.1
400
mA
670
45
200
7.0
0.43
2.3
nA
V
Ω
Max
(Note 7)
1.2
mA
2.5
2
0.53
0.4
µA
V
%/V
Units
I
Q
V
FB
∆V
FB
I
CL
Feedback Voltage
Feedback Voltage Line
Regulation
Switch Current Limit
(LM3500-16)
Switch Current Limit
(LM3500-21)
I
B
V
IN
R
DSON
D
Limit
FB Pin Bias Current
Input Voltage Range
NMOS Switch R
DSON
PMOS Switch R
DSON
Duty Cycle Limit
(LM3500-16)
Duty Cycle Limit
(LM3500-21)
F
SW
Switching Frequency
www.national.com
4
LM3500
Electrical Characteristics
(Continued)
Specifications in standard type face are for T
J
= 25˚C and those in
boldface type
apply over the full
Operating Temperature
Range (T
J
= −40˚C to +125˚C).
Unless otherwise specified V
IN
=2.7V and specification apply to both LM3500-16 and LM3500-
21.
Symbol
I
SD
Parameter
SHDN Pin Current (Note 10)
Conditions
SHDN = 5.5V
SHDN = 2.7V
SHDN = GND
I
L
Switch Leakage Current
(LM3500-16)
Switch Leakage Current
(LM3500-21)
UVP
OVP
Input Undervoltage Lockout
Output Overvoltage
Protection (LM3500-16)
Output Overvoltage
Protection (LM3500-21)
I
Vout
V
OUT
Bias Current
(LM3500-16)
V
OUT
Bias Current
(LM3500-21)
I
VL
PMOS Switch Leakage
Current (LM3500-16)
PMOS Switch Leakage
Current (LM3500-21)
SHDN
Threshold
SHDN Low
SHDN High
1.1
V
SW
= 15V
V
SW
= 20V
ON Threshold
OFF Threshold
ON Threshold
OFF Threshold
ON Threshold
OFF Threshold
V
OUT
= 15V, SHDN = V
IN
V
OUT
= 20V, SHDN = V
IN
V
OUT
= 15V, V
SW
= 0V
V
OUT
= 20V, V
SW
= 0V
2.4
2.3
15
14
20
19
Min
(Note 7)
Typ
(Note 8)
18
9
0.1
0.01
0.01
2.5
2.4
15.5
14.6
20.5
19.5
260
300
0.01
0.01
0.65
0.65
0.5
2.0
2.6
2.5
16
15
21
20
400
µA
460
3
µA
3
0.3
V
V
µA
Max
(Note 7)
30
16
µA
Units
V
Note 1:
Absolute maximum ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions for which the device is intended to
be functional, but device parameter specifications may not be guaranteed. For guaranteed specifications and test conditions, see the Electrical Characteristics.
Note 2:
This condition applies if V
IN
<
V
OUT
. If V
IN
>
V
OUT
, a voltage greater than V
IN
+ 0.3V should not be applied to the V
OUT
or V
SW
pins.
Note 3:
For more detailed soldering information and specifications, please refer to National Semiconductor Application Note 1112: Micro SMD Wafer Level Chip
Scale Package (AN-1112), available at www.national.com.
Note 4:
The human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin.
Note 5:
In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (T
A-MAX
) is dependent on the maximum operating junction temperature (T
J-MAX-OP
= 125
o
C), the maximum power
dissipation of the device in the application (P
D-MAX
), and the junction-to ambient thermal resistance of the part/package in the application (θ
JA
), as given by the
following equation: T
A-MAX
= T
J-MAX-OP
– (θ
JA
x P
D-MAX
).
Note 6:
Junction-to-ambient thermal resistance (θ
JA
) is highly application and board-layout dependent. The 75
o
C/W figure provided was measured on a 4-layer test
board conforming to JEDEC standards. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues when
designing the board layout.
Note 7:
All limits guaranteed at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits are production
tested, guaranteed through statistical analysis or guaranteed by design. All limits at temperature extremes are guaranteed via correlation using standard Statistical
Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
Note 8:
Typical numbers are at 25˚C and represent the most likely norm.
