LM9833 48-Bit Color 1200dpi USB Image Scanner
October 2001
LM9833 48-Bit Color, 1200dpi USB Image Scanner
General Description
The LM9833 is a complete USB image scanner system on a sin-
gle IC. The LM9833 provides all the functions (image sensor
control, illumination control, analog front end, pixel processing
function image data buffer/DRAM controller, microstepping
motor controller, and USB interface) necessary to create a high
performance color scanner. The LM9833 scans images in 48 bit
color/16 bit gray, and has output data formats for 48 and 24bit
color/16 and 8 bit gray. The LM9833 supports sensors with pixel
counts of up to 16384 pixels x 3 colors (1200 dpi x 13.6 inches).
The LM9833’s low operating and suspend mode supply currents
allow design of USB bus-powered scanners. The only additional
active components required are an external 4Mbit or 16Mbit
DRAM for data buffering and power transistors for the stepper
motor.
Features
• 16 bit ADC digitizes at up to 6Mpixels/s (2M RGB pixels/sec).
• Digital Pixel Processing provides 1200, 800, 600, 400, 300,
200, 150, and 100dpi horizontal resolution from a 1200dpi
sensor and 600, 400, 300, 200, 150, 100, 75, and 50dpi
horizontal resolution from a 600dpi sensor.
• Provides 50-2400dpi vertical resolution in 1 dpi increments.
• Pixel rate error correction for gain (shading) and offset errors.
• Supports 4 or 16Mbit external DRAMs.
• Multiple CCD clocking rates allows matching of CCD clock to
scan resolution and pixel depth for maximum scan speed.
• Stepper motor control tightly coupled with image data buffer
management to maximize data transfer efficiency.
• PWM stepper motor current control allows microstepping for
the price of fullstepping.
• USB interface for Plug and Play operation on USB-equipped
computers.
• Serial EEPROM option for custom Vendor and Product IDs.
• Support for USB bus-powered operation.
• Pixel depths of 1, 2, or 4 bits are packed into bytes for faster
scans of line art and low pixel depth images.
• Supports 3 channel CCDs and 1 channel CIS sensors.
• 3 (R, G, and B) 12-bit, user-programmable gamma correction
tables.
• Compatible with a wide range of color linear CCDs and
Contact Image Sensors (CIS).
• Operates with 48MHz external crystal.
• Internal bandgap voltage reference.
• 100 pin TQFP package
Applications
•
•
•
•
•
•
•
•
•
•
Color Flatbed Document Scanners
Color Sheetfed Document Scanners
Key Specifications
Analog to Digital Converter Resolution
16 Bits
Maximum Pixel Conversion Rate
6MHz
A4 Color 150dpi scan time
<10 seconds
A4 Color 300dpi scan time
<40 seconds
A4 Color 600dpi scan time
<160 seconds
Supply Voltage
- LM9833
+4.75V to +5.25V
- LM9833 DRAM I/O
+2.85 to +5.25V
Maximum Operating Current Consumption
136mA
Maximum Suspend Current Consumption
175µA
LM9833 Scanner System Block Diagram
+12V
USB
Port
2
1-3
2-6
Illumination
30
1-3
48MHz Crystal
DRAM
Serial
EEPROM
2
8
CCD/CIS
MISC
I/O
Power
Transistors
Stepper
Motor
LM9833CCVJD
Ordering Information
Commercial (0°C
≤
T
A
≤
+70°C)
LM9833CCVJD
Package
VJD100A 100 Pin Thin Quad Flatpac
©2000 National Semiconductor Corporation
1
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LM9833
Connection Diagram
ACTIVE/SUSPENDED
SENSEGND
V
REGULATOR
BUS POWR
SENSEA
SENSEB
CMODE
RESET
V
A
DGND
DGND
V
D
DGND
AGND
TEST
CP2
CP1
NC
NC
NC
RS
D+
V
D
10099 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
V
BANDGAP
V
REF LO
OS
R
V
REF MID
OS
G
V
REF HI
OS
B
AGND
V
A
A
A
B
B
D0
D15
V
DRAM
DGND
D1
D14
D2
D13
D3
D12
D4
D11
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
ø1
TR2
TR1
MISC I/O 6
MISC I/O 5
MISC I/O 4
DGND
V
D
MISC I/O 3
MISC I/O 2
MISC I/O 1
PAPER SENSE 1
PAPER SENSE 2
V
D
DGND
LAMP
B
LAMP
G
LAMP
R
DGND
V
D
24/48
CRYSTAL/EXT CLK
CRYSTAL IN
CRYSTAL OUT
SCL
LM9833CCVJD
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
A9
A8
A0
A7
A1
A6
A2
A5
A3
D5
D6
D9
D7
D10
DGND
D8
DGND
WR
CAS
RAS
RD
A4
V
DRAM
V
DRAM
SDA
Ordering Information
Commercial (0°C
≤
T
A
≤
+70°C)
LM9833CCVJD
Package
VJD100A 100 Pin Thin Quad Flatpac
2
ø2
63
62
61
60
59
58
57
56
55
54
53
52
51
D-
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LM9833
Pin Descriptions
USB Interface
D+, D-
BUS POWER
ACTIVE/
SUSPENDED
SDA
SCL
Digital I/O. USB Interface signals
Digital Input. Tie low for bus powered sys-
tems, tie high for external power.
Digital Output. Low in Suspend mode. High in
operational mode. Used to control external
regulators, other components.
Digital I/O. Serial Data to/from external
EEPROM.
Digital Output. Serial Clock Output to external
EEPROM.
Stepper Motor
A, B, A, B
SENSE
A
,
SENSE
B
SENSE
GND
Digital Outputs. Pulses to stepper motor drive
circuitry.
Analog Inputs. Current sensing for stepper
motor’s PWM current control.
Analog Input. Ground sense input for stepper
motor’s PWM current control.
Sensor Control
ø1
ø2
RS
CP1
CP2
TR1, TR2
LAMP
R
,
LAMP
G
,
LAMP
B
Digital Output. CCD/CIS clock signal phase 1.
Digital Output. CCD/CIS clock signal phase 2.
Digital Output. Reset pulse for the CCD/CIS.
Digital Output. Clamp pulse for the CCD/CIS.
Digital Output. Clamp pulse for the CCD/CIS.
Digital Outputs. Transfer pulses for the
CCD/CIS.
Digital Outputs. Used to control R, G, and B
LEDs of single output CIS, as well as bright-
ness of CCFL. The CDS signal can be seen
on LAMP
B
in a test mode (see register 5E, bit
7).
Analog
OS
R
,
OS
G
,
OS
B
V
REF LO
Analog Inputs. These inputs (for Red, Green,
and Blue) should be tied to the sensor’s out-
put signal through DC blocking capacitors. If
unused, tie to ground through DC blocking
capacitors.
Analog Output/Input. Bypass to AGND with a
0.047µF monolithic capacitor. Do not put a
DC load on this pin.
Analog Output/Input. Bypass to AGND with a
0.047µF monolithic capacitor. Do not put a
DC load on this pin.
Analog Output/Input. Bypass to AGND with a
0.047µF monolithic capacitor. Do not put a
DC load on this pin.
Analog Output. Bypass to AGND with a
0.047µF monolithic capacitor. Do not put a
DC load on this pin.
V
REF MID
Master Clock Generation
CRYSTAL IN
Digital Input. Used with CRYSTAL OUT and
an external 48MHz crystal to form a crystal
oscillator.
Digital Output. Used with CRYSTAL IN and an
external 48MHz crystal to form a crystal oscil-
lator.
Digital Input. Tie to DGND for operation with
an external crystal. Pull up to V
D
to drive
CRYSTAL OUT with an external TTL or
CMOS clock source.
Digital Input. Tie to DGND for operation with a
48MHz crystal or external clock. Pull up to V
D
for operation with a 24MHz crystal or external
clock. NOTE: Operation at 24MHz is not guar-
anteed - always use a 48MHz crystal.
V
REF HI
V
BANDGAP
CRYSTAL
OUT
CRYSTAL/
EXT CLOCK
DRAM
D0 (LSB) -D15 Digital Inputs/Outputs. This is the 16 bit data
(MSB)
path between the external DRAM and the
LM9833.
RD
WR
A0-A9
RAS
CAS
Digital Output. Read signal to external DRAM.
Digital Output. Write signal to external DRAM.
Digital Outputs. Address pins for up to 1M x
16 external DRAM.
Digital Output. Row Address Strobe signal.
Digital Output. Column Address Strobe sig-
nal.
24/48
Miscellaneous
V
REGULATOR
Digital Output. This is the regulated 3.3V sup-
ply (generated from V
D
) that powers the USB
transceiver. It should be used as the terminal
voltage for the 1.5k D+ pullup resistor, and
bypassed to DGND with a 0.047µF monolithic
capacitor.
Digital input. Take high to force device into
Power On Reset state, low to exit reset state.
Analog Output.
Digital Input. Test mode, always tie high.
Scanner Support I/O
PAPER
SENSE 1-2
MISC I/O 1-6
Digital Inputs. Programmable, used for sens-
ing home position, paper, front panel
switches, etc.
Digital Inputs/Outputs. Programmable, used
for front panel switches, status LEDs, etc. At
power-on and in Suspend Mode, MISC I/Os
1-3 are inputs and MISC I/Os 4-6 are outputs.
RESET
TEST
CMODE
3
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LM9833
Pin Descriptions
(Continued)
Analog Power Supplies (4 pins)
V
A
(2)
This is the positive supply pin for the analog
supply. It should be connected to a voltage
source of +5V and bypassed to AGND with a
0.1µF monolithic capacitor in parallel with a
10µF tantalum capacitor.
This is the ground return for the analog sup-
ply.
AGND (2)
Digital Power Supplies (17 pins)
V
D
(5)
This is the positive supply pin for the digital
supply. It should be connected to a voltage
source of +5V and bypassed to DGND with a
0.1µF monolithic capacitor.
This is the positive supply pin for the digital
supply for the LM9833’s external DRAM I/O. It
also powers the A, B, A, and B stepper motor
outputs. It should be connected to a 3 or 5V
supply and bypassed to the closest DGND pin
with a 0.1µF monolithic capacitor.
This is the ground return for V
D
and V
DRAM
.
V
DRAM
(3)
DGND (9)
4
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LM9833
Absolute Maximum Ratings
(Notes 1 & 2)
Positive Supply Voltage
With Respect to GND=AGND=DGND
Voltage On Any Input or Output Pin
Input Current at any pin (Note 3)
Package Input Current (Note 3)
Package Dissipation at T
A
= 25°C
ESD Susceptibility (Note 5)
Human Body Model
Machine Model
Soldering Information
Infrared, 10 seconds (Note 6)
Storage Temperature
(V
+
=V
A
=V
D
=V
DRAM
)
6.5V
+
+0.3V
-0.3V to V
±25mA
±50mA
(Note 4)
2000 V
250 V
235°C
-65°C to +150°
Operating Ratings
(Notes 1 & 2)
Operating Temperature Range
T
MIN
≤T
A
≤T
MAX
LM9833CCVJD
0°C≤T
A
≤+70°C
V
A
Supply Voltage
+4.75V to +5.25V
V
D
Supply Voltage
+4.75V to +5.25V
V
DRAM
Supply Voltage
+2.85V
≤
V
DRAM
≤
V
D
+100mV
|V
A
-V
D
|
≤
100mV
Input Voltage Range
-0.05V to V
+
+ 0.05V
Electrical Characteristics
The following specifications apply for AGND=DGND=0V, V
A
=V
D
=V
DRAM
=+5.0V
DC
, f
CRYSTAL IN
= 48MHz, Analog Bias Current =
100%, unless otherwise noted.
Boldface limits apply for T
A
=T
J
=T
MIN
to T
MAX
; all other limits T
A
=T
J
=25°C. (Notes 8, 9, & 10)
Symbol
Parameter
Conditions
Typical
(Note 9)
Limits
(Note 10)
Units
(Limits)
Full Channel Characteristics (in units of 12 bit LSBs unless otherwise noted)
Resolution with No Missing Codes
DNL
Differential Non-Linearity
(Note 14)
Integral Non-Linearity Error
(Notes 11 & 14)
Analog Channel Gain Constant
(ADC Codes/V), referred to 16 bits.
Pre-Boost Analog Channel Offset Error
Bias Current = 80%,
V
DRAM
=3.3V
Bias Current = 80%,
V
DRAM
=3.3V
Includes voltage reference
variation, gain setting = 1
16
-0.45
+0.75
-2.3
+1.7
32768
12
-0.9
+2.4
-8.5
+7.5
29648
37200
-34
+76
-80
+31
-75
+26
bits (min)
LSB (min)
LSB (max)
LSB (min)
LSB (max)
LSB (min)
LSB (max)
mV (min)
mV (max)
mV (min)
mV (max)
mV (min)
mV (max)
INL
C
V
OS1
V
OS2
V
OS3
26
Pre-PGA Analog Channel Offset Error
-30
Post-PGA Analog Channel Offset Error
-26
Coarse Color Balance PGA Characteristics (Configuration Registers 3B, 3C, and 3D)
Monotonicity
G
0
(Minimum PGA Gain)
G
31
(Maximum PGA Gain)
x3 Boost Gain
PGA Setting = 0
0.93
5
0.90
0.96
2.95
3.10
2.85
3.04
-0.6
+0.9
bits (min)
V/V (min)
V/V (max)
V/V (min)
V/V (max)
V/V (min)
V/V (max)
% (min)
% (max)
PGA Setting = 31
x3 Boost Setting On
(bit B5 of Gain Register is set)
3.00
2.94
Gain Error at any gain (Note 13)
Static Offset DAC Characteristics (Configuration Registers 38, 39, and 3A)
Monotonicity
Offset DAC LSB size
Offset DAC Adjustment Range
PGA gain = 1
PGA gain = 1
5
0.3
6
9
±278
6
12
±256
bits (min)
mV (min)
mV (max)
mV (min)
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