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LMH2180SDX

75 MHz Dual Clock Buffer

器件类别:逻辑    逻辑   

厂商名称:National Semiconductor(TI )

厂商官网:http://www.ti.com

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器件参数
参数名称
属性值
是否Rohs认证
不符合
包装说明
LLP-8
Reach Compliance Code
compli
系列
2180
输入调节
STANDARD
JESD-30 代码
S-XDSO-N8
JESD-609代码
e0
长度
3 mm
逻辑集成电路类型
LOW SKEW CLOCK DRIVER
功能数量
2
反相输出次数
端子数量
8
实输出次数
2
最高工作温度
85 °C
最低工作温度
-40 °C
封装主体材料
UNSPECIFIED
封装代码
HVSON
封装等效代码
SOLCC8,.11,20
封装形状
SQUARE
封装形式
SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
电源
2.5/5 V
认证状态
Not Qualified
座面最大高度
0.8 mm
最大供电电压 (Vsup)
5 V
最小供电电压 (Vsup)
2.4 V
标称供电电压 (Vsup)
2.7 V
表面贴装
YES
技术
CMOS
温度等级
INDUSTRIAL
端子面层
Tin/Lead (Sn/Pb)
端子形式
NO LEAD
端子节距
0.5 mm
端子位置
DUAL
宽度
3 mm
最小 fmax
75 MHz
Base Number Matches
1
文档预览
LMH2180 75 MHz Dual Clock Buffer
January 24, 2008
LMH2180
75 MHz Dual Clock Buffer
General Description
The LMH2180 is a high speed dual clock buffer designed for
portable communications and applications requiring multiple
accurate multi-clock systems. The LMH2180 integrates two
75 MHz low noise buffers with independent shutdown pins
into a small package. The LMH2180 ensures superb system
operation between the baseband and the oscillator signal
path by eliminating crosstalk between the multiple clock sig-
nals.
Unique technology and design provides the LMH2180 with
the ability to accurately drive both large capacitive and resis-
tive loads. Low supply current combined with shutdown pins
for each channel means the LMH2180 is ideal for battery
powered applications. The LMH2180's rapid recovery after
disable optimizes performance and current consumption.
This part does not use an internal ground reference, thus pro-
viding additional system flexibility. The LMH2180 operates
both with single and split supplies.
The flexible buffers provide system designers the capacity to
manage complex clock signals in the latest wireless applica-
tions. Each buffer delivers 106 V/μs internal slew rate with
independent shutdown and duty cycle precision. The patent-
ed analog circuit of each buffer drives capacitive loads greater
than 20 pF. Each input is internally biased to 1V, removing
the need for external resistors. Both channels have rail-to-rail
inputs and outputs, a gain of one, and are AC coupled with
the use of one capacitor.
Replacing a discrete buffer solution with the LMH2180 pro-
vides many benefits: simplified board layout, minimized par-
asitic components, simplified BOM, design durability across
multiple applications, simplification of clock paths, and the
ability to reduce the number of clock signal generators in the
system. The LMH2180 is produced in the tiny 8-pin LLP solder
bump and no pullback packages minimizing the required PCB
space. National’s advanced packaging offers direct PCB-IC
evaluation via pin access.
Features
(Typical values are: V
SUPPLY
= 2.7V and C
L
= 10 pF, unless
otherwise specified.)
78 MHz
Small signal bandwidth
Supply voltage range
2.4V to 5V
-123dBc/Hz
Phase noise (V
IN
= 1 V
PP
,
f
C
= 38.4 MHz,
Δf
= 1kHz)
106 V/μs
Slew rate
2.3 mA
Total supply current
30 µA
Shutdown current
Rail-to-rail input and output
Individual buffer enable pins
Rapid T
on
technology
Crosstalk rejection circuitry
8-pin LLP, pin access packaging
−40°C to 85°C
Temperature range
Applications
3G mobile applications
WLAN–WiMAX modules
TD_SCDMA multi-mode MP3 and camera
GSM modules
Oscillator modules
Typical Application
30024602
© 2008 National Semiconductor Corporation
300246
www.national.com
LMH2180
Absolute Maximum Ratings
(Note 1)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Supply Voltages (V
+
– V
)
ESD Tolerance
Human Body (Note 4)
Machine Model (Note 5)
Charged Device Model
Storage Temperature Range
5.5V
2000V
200V
1000V
−65°C to +150°C
Junction Temperature (Note 3)
Soldering Information
Infrared or Convection (35 sec.)
+150°C
235°C
Operating Ratings
(Note 1)
Supply Voltage (V
+
– V
)
2.4V to 5.0V
Temperature Range (Notes 2, 3)
−40°C to +85°C
Package Thermal Resistance (Notes 2, 3)
LLP-8 (θ
JA
)
217°C/W
2.7V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for T
J
= 25°C, V
DD
= 2.7V, V
SS
= 0V, V
CM
= 1V, Enable
1,2
= V
DD
, C
L
= 10 pF,
R
L
= 30 kΩ, Load is connected to V
SS
, C
COUPLING
= 10 nF.
Boldface
limits apply at temperature range extremes of operating
condition. See (Note 2)
Symbol
Parameter
Conditions
Min
(Note 7)
Typ
(Note 6)
78
60
4.9
−123
−132
13
84
41
6
5
1 V
PP
Step
0.1 V
PP
Step
V
IN
= 2 V
PP
Enable
1,2
= V
DD
; No Load
Enable
1
= V
DD
, Enable
2
= V
SS
, No
Load
Enable
1,2
= V
SS
; No Load
PSRR
A
CL
V
OS
TC V
OS
R
OUT
Power Supply Rejection Ratio
Small Signal Voltage Gain
Output Offset Voltage
Temperature Coefficient Output
Offset Voltage (Note 9)
Output Resistance
f = 100 kHz
f = 38.4 MHz
DC (3.0V to 5.0V)
V
IN
= 0.2 V
PP
65
64
0.95
120
37
106
2.7
2.9
1.5
1.6
41
46
Max
(Note 7)
Units
Frequency Domain Response
SSBW
LSBW
GFN
φ
n
e
n
I
SOLATION
CT
t
r
t
f
t
s
OS
SR
I
S
Small Signal Bandwidth
Large Signal Bandwidth
Gain Flatness < 0.1 dB
Phase Noise
V
IN
= 100 mV
PP
; −3 dB
V
IN
= 1.0 V
PP
; −3 dB
f > 100 kHz
V
IN
= 1 V
PP
, f
C
= 38.4 MHz,
Δf
= 1 kHz
V
IN
= 1 V
PP
, f
C
= 38.4 MHz,
Δf
= 10 kHz
Input-Referred Voltage Noise
Output to Input
Crosstalk Rejection
Rise Time
Fall Time
Settling Time to 0.1%
Overshoot
Slew Rate (Note 8)
Supply Current
f = 1 MHz, R
SOURCE
= 50Ω
f = 1 MHz, R
SOURCE
= 50Ω
f = 38.4 MHz, V
IN
= 1 V
PP
0.1 V
PP
Step (10-90%)
MHz
MHz
MHz
dBc/Hz
dBc/Hz
nV/
dB
dB
ns
ns
ns
%
V/µs
Distortion and Noise Performance
Time Domain Response
Static DC Performance
2.3
1.3
30
68
1.0
-0.5
2.8
0.6
166
1.05
17
18
mA
mA
μA
dB
V/V
mV
µV/°C
www.national.com
2
LMH2180
Symbol
Parameter
Conditions
Min
(Note 7)
Typ
(Note 6)
137
137
1.3
1.3
4.5
4.2
Max
(Note 7)
Units
Miscellaneous Performance
R
IN
C
IN
Z
IN
V
O
Input Resistance per Buffer
Input Capacitance per Buffer
Input Impedance
Output Swing Positive
Output Swing Negative
I
SC
Output Short-Circuit Current
(Notes 10, 11)
Enable = V
DD
Enable = V
SS
Enable = V
DD
Enable = V
SS
f = 38.4 MHz, Enable = V
DD
f = 38.4 MHz, Enable = V
SS
V
IN
= V
DD
V
IN
= V
SS
Sourcing, V
IN
= V
DD
, V
OUT
= V
SS
Sinking, V
IN
= V
SS
, V
OUT
= V
DD
V
en_hmin
V
en_lmax
Enable High Active Minimum Voltage
Enable Low Inactive Maximum
Voltage
−21
−18
23
15
2.66
2.65
kΩ
pF
kΩ
V
35
37
mV
2.69
19
−25
mA
25
1.2
0.6
V
5V Electrical Characteristics
Unless otherwise specified, all limits are guaranteed for T
J
= 25°C, V
DD
= 5V, V
SS
= 0V, V
CM
= 1V, Enable
1,2
= V
DD
, C
L
= 10 pF,
R
L
= 30 kΩ, Load is connected to V
SS
, C
COUPLING
= 10 nF.
Boldface
limits apply at temperature range extremes of operating
condition. See (Note 2)
Symbol
Parameter
Conditions
Min
(Note 7)
Typ
(Note 6)
87
68
25
−123
−132
12
84
59
6
6
1 V
PP
Step
0.1V
PP
Step
V
IN
= 2 V
PP
Enable
1,2
= V
DD
; No Load
Enable
1
= V
DD
, Enable
2
= V
SS
; No
Load
Enable
1,2
= V
SS
; No Load
70
13
124
4.0
4.1
2.2
2.3
43
49
Max
(Note 7)
Units
Frequency Domain Response
SSBW
LSBW
GFN
φ
n
e
n
I
SOLATION
CT
t
r
t
f
t
s
OS
SR
I
S
Small Signal Bandwidth
Large Signal Bandwidth
Gain Flatness < 0.1 dB
Phase Noise
V
IN
= 100 mV
PP
; −3 dB
V
IN
= 1.0 V
PP
; −3 dB
f > 100 kHz
V
IN
= 1 V
PP
, f
C
= 38.4 MHz,
Δf
= 1 kHz
V
IN
= 1 V
PP
, f
C
= 38.4 MHz,
Δf
= 10 kHz
Input-Referred Voltage Noise
Output to Input
Crosstalk Rejection
Rise Time
Fall Time
Settling Time to 0.1%
Overshoot
Slew Rate (Note 8)
Supply Current
f = 1 MHz, R
SOURCE
= 50Ω
f = 1 MHz, R
SOURCE
= 50Ω
f = 38.4 MHz, P
IN
= 0 dBm
0.1 V
PP
Step (10-90%)
MHz
MHz
MHz
dBc/Hz
dBc/Hz
nV/
dB
dB
ns
ns
ns
%
V/µs
Distortion and Noise Performance
Time Domain Response
Static DC Performance
3.4
1.8
32
mA
mA
μA
3
www.national.com
LMH2180
Symbol
PSRR
A
CL
V
OS
TC V
OS
R
OUT
Parameter
Power Supply Rejection Ratio
Small Signal Voltage Gain
Output Offset Voltage
Temperature Coefficient Output
Offset Voltage (Note 9)
Output Resistance
f = 100 kHz
f = 38.4 MHz
Conditions
DC (3.0V to 5.0V)
V
IN
= 0.2 V
PP
Min
(Note 7)
65
64
0.95
Typ
(Note 6)
68
1.0
−1.4
2.4
0.5
126
138
138
1.3
1.3
4.3
4.2
Max
(Note 7)
Units
dB
1.05
21
22
V/V
mV
µV/°C
Miscellaneous Performance
R
IN
C
IN
Z
IN
V
O
Input Resistance per Buffer
Input Capacitance per Buffer
Input Impedance
Output Swing Positive
Output Swing Negative
I
SC
Output Short-Circuit Current
(Notes 10, 11)
Enable = V
DD
Enable = V
SS
Enable = V
DD
Enable = V
SS
f = 38.4 MHz, Enable = V
DD
f = 38.4 MHz, Enable = V
SS
V
IN
= V
DD
V
IN
= V
SS
Sourcing, V
IN
= V
DD
, V
OUT
= V
SS
Sinking, V
IN
= V
SS
, V
OUT
= V
DD
V
en_hmin
V
en_lmax
Enable High Active Minimum Voltage
Enable Low Inactive Maximum
Voltage
−80
−62
60
43
4.96
4.95
kΩ
pF
kΩ
V
35
50
mV
4.99
10
−90
mA
65
1.2
0.6
V
Note 1:
“Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of the device reliability
and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in
the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the
device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified.
Note 2:
The Electrical Characteristics tables list guaranteed specifications under the listed Recommended Operating Conditions except as otherwise modified
or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not guaranteed.
Note 3:
The maximum power dissipation must be derated at elevated temperatures and is dictated by T
J(MAX)
, θ
JA
, and the ambient temperature T
A
. The maximum
allowable power dissipation is P
DMAX
= (T
JMAX
− T
A
) / θ
JA
or the number given in the
Absolute Maximum Ratings,
whichever is lower.
Note 4:
Human body model, applicable std. JESD22–A114C.
Note 5:
Machine model, applicable std. JESD22–A115–A.
Note 6:
Typical values represent the most likely parametric norms at T
A
= +25°C, and at the Recommended Operation Conditions at the time of product
characterization and are not guaranteed.
Note 7:
Datasheet min/max specification limits are guaranteed by test or statistical analysis.
Note 8:
Slew rate is the average of the rising and falling slew rates.
Note 9:
Average Temperature Coefficient is determined by dividing the changing in a parameter at temperature extremes by the total temperature change.
Note 10:
Short−Circuit test is a momentary test. Continuous short circuit operation at elevated ambient temperature can result in exceeding the maximum allowed
junction temperature of 150°C.
Note 11:
Positive current corresponds to current flowing into the device.
www.national.com
4
LMH2180
Block Diagram
30024601
Pin Descriptions
Pin No.
1
2
3
4
5
6
7
8
Pin Name
V
DD
IN 1
IN 2
ENABLE 2
V
SS
OUT 2
OUT 1
ENABLE 1
Voltage supply connection
Input 1
Input 2
Enable buffer 2
Ground connection
Output 2
Output 1
Enable buffer 1
Description
Connection Diagram
8-Pin LLP
30024631
Top View
Ordering Information
Package
8-Pin LLP
Solder Bump
8-Pin LLP
No Pullback
Part Number
LMH2180YD
LMH2180YDX
LMH2180SD
LMH2180SDX
Package Marking
LMH2180YD
LMH2180SD
Transport Media
1k Units Tape and Reel
4.5k Units Tape and Reel
1k Units Tape and Reel
4.5 Units Tape and Reel
NSC Drawing
YDA08A
SDA08A
5
www.national.com
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参数对比
与LMH2180SDX相近的元器件有:LMH2180、LMH2180SD、LMH2180YD、LMH2180YDX。描述及对比如下:
型号 LMH2180SDX LMH2180 LMH2180SD LMH2180YD LMH2180YDX
描述 75 MHz Dual Clock Buffer 75 MHz Dual Clock Buffer 75 MHz Dual Clock Buffer 75 MHz Dual Clock Buffer 75 MHz Dual Clock Buffer
是否Rohs认证 不符合 - 不符合 符合 符合
包装说明 LLP-8 - LLP-8 LLP-8 LLP-8
Reach Compliance Code compli - not_compliant unknow unknow
系列 2180 - 2180 2180 2180
输入调节 STANDARD - STANDARD STANDARD STANDARD
JESD-30 代码 S-XDSO-N8 - S-XDSO-N8 S-XDSO-N8 S-XDSO-N8
JESD-609代码 e0 - e0 e1 e1
长度 3 mm - 3 mm 3 mm 3 mm
逻辑集成电路类型 LOW SKEW CLOCK DRIVER - LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER LOW SKEW CLOCK DRIVER
功能数量 2 - 2 2 2
端子数量 8 - 8 8 8
实输出次数 2 - 2 2 2
最高工作温度 85 °C - 85 °C 85 °C 85 °C
最低工作温度 -40 °C - -40 °C -40 °C -40 °C
封装主体材料 UNSPECIFIED - UNSPECIFIED UNSPECIFIED UNSPECIFIED
封装代码 HVSON - HVSON HVSON HVSON
封装等效代码 SOLCC8,.11,20 - SOLCC8,.11,20 SOLCC8,.11,20 SOLCC8,.11,20
封装形状 SQUARE - SQUARE SQUARE SQUARE
封装形式 SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE - SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE
电源 2.5/5 V - 2.5/5 V 2.5/5 V 2.5/5 V
认证状态 Not Qualified - Not Qualified Not Qualified Not Qualified
座面最大高度 0.8 mm - 0.8 mm 0.8 mm 0.8 mm
最大供电电压 (Vsup) 5 V - 5 V 5 V 5 V
最小供电电压 (Vsup) 2.4 V - 2.4 V 2.4 V 2.4 V
标称供电电压 (Vsup) 2.7 V - 2.7 V 2.7 V 2.7 V
表面贴装 YES - YES YES YES
技术 CMOS - CMOS CMOS CMOS
温度等级 INDUSTRIAL - INDUSTRIAL INDUSTRIAL INDUSTRIAL
端子面层 Tin/Lead (Sn/Pb) - Tin/Lead (Sn85Pb15) Tin/Silver/Copper (Sn/Ag/Cu) Tin/Silver/Copper (Sn/Ag/Cu)
端子形式 NO LEAD - NO LEAD NO LEAD NO LEAD
端子节距 0.5 mm - 0.5 mm 0.5 mm 0.5 mm
端子位置 DUAL - DUAL DUAL DUAL
宽度 3 mm - 3 mm 3 mm 3 mm
最小 fmax 75 MHz - 75 MHz 75 MHz 75 MHz
Base Number Matches 1 - - 1 1
湿度敏感等级 - - 1 1 1
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