LP5952 350mA Dual Rail Linear Regulator
June 10, 2008
LP5952
350mA Dual Rail Linear Regulator
General Description
The LP5952 is a Dual Supply Rail Linear Regulator optimized
for powering ultra-low voltage circuits from a single Li-Ion cell
or 3 cell NiMH/NiCd batteries.
In the typical post regulation application V
BATT
is directly con-
nected to the battery (range 2.5V...5.5V) and V
IN
is supplied
by the output voltage of the DC-DC Converter (range 0.7V...
4.5V).
The device offers superior dropout and transient features
combined with very low quiescent currents. In shutdown
mode (Enable pin pulled low) the device turns off and reduces
battery consumption to 0.1µA (typ.).
The LP5952 also features internal protection against over-
temperature, over-current and under-voltage conditions.
Performance is specified for a -40°C to 125°C junction tem-
perature range.
The device is available in a tiny 5-bump micro SMD and a 6-
pin Chip On Lead LLP package, lead free.
The device is available in fixed output voltages in the range
of 0.5V to 2.0V. For availability, please contact your local NSC
sales office.
Features
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Excellent load transient response: ±15mV typical
Excellent line transient response: ±1mV typical
0.7V
≤
V
IN
≤
4.5V
2.5V
≤
V
BATT
≤
5.5V
0.5V
≤
V
OUT
≤
2.0V
For I
LOAD
= 350mA:
V
BATT
≥
V
OUT(NOM)
+ 1.5V or 2.5V whichever is higher
For I
LOAD
= 150mA:
V
BATT
≥
V
OUT(NOM)
+ 1.3V or 2.5V whichever is higher
50µA typical quiescent current from V
BATT
10µA typical quiescent current from V
IN
0.1µA typical quiescent current in shutdown
Guaranteed 350mA output current
Noise voltage = 100µV
RMS
typical
Operates from a single Li-Ion cell or 3 cell NiMH/NiCd
batteries
Only one or two tiny surface-mount external components
required depending on application
Small, thin 5-bump micro SMD package and 6-pin Chip On
Lead LLP package, lead free
Thermal-overload and short-circuit protection
-40°C to +125°C junction temperature range
Applications
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Mobile Phones
Hand-Held Radios
Personal Digital Assistants
Palm-Top PCs
Portable Instruments
Battery Powered Devices
Typical Application Circuit
20208501
FIGURE 1. Typical Application Circuit with DC-DC Converter as Pre-Regulator for V
IN
© 2008 National Semiconductor Corporation
202085
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LP5952
20208502
FIGURE 2. Typical Application Circuit
Connection Diagrams
5-Bump Micro SMD Package
20208503
Connection Diagram 5-Bump Thin Micro SMD Package, Large Bump, 0.5mm Pitch
See NS Package Number TLA05
Package Marking
20208506
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2
LP5952
LLP-6 Package
20208524
Connection Diagram 6-Pin Chip On Lead LLP package, 0.5mm pitch
See NS Package Number LCA06B
Note:
The actual physical placement of the package marking will vary from part to part. The package marking “X” designates the
date code. “T” is a NSC internal code for die traceability. Both will vary considerably. “U” identifies the device (part number, option,
etc.).
Pin Descriptions
Pin Number
Micro SMD
A1
A3
B2
C1
C3
Pin Number
LLP
3
4
2
1
6
5
Pin Name
V
IN
V
OUT
GND
V
BATT
EN
NC
Description
Power input voltage; input range: 0.7V to 4.5V, V
IN
≤
V
BATT
Regulated output voltage
Ground
Bias input voltage; input range: 2.5V to 5.5V
Enable pin logic input: low = shutdown, high = active, normal operation.
This pin should not be left floating. Tie to V
BATT
if this function is not used.
Do not make connections to this pin
Order Information (5-bump micro SMD)
Output Voltage
(V)
0.7
1.0
1.2
1.3
1.4
1.5
1.6
1.8
2.0
LP5952 Supplied as 250 Units,
Tape and Reel, lead free
LP5952TL-0.7
LP5952TL-1.0
LP5952TL-1.2
LP5952TL-1.3
LP5952TL-1.4
LP5952TL-1.5
LP5952TL-1.6
LP5952TL-1.8
LP5952TL-2.0
LP5952 Supplied as 3000 Units,
Tape and Reel, lead free
LP5952TLX-0.7
LP5952TLX-1.0
LP5952TLX-1.2
LP5952TLX-1.3
LP5952TLX-1.4
LP5952TLX-1.5
LP5952TLX-1.6
LP5952TLX-1.8
LP5952TLX-2.0
Flow
NOPB
NOPB
NOPB
NOPB
NOPB
NOPB
NOPB
NOPB
NOPB
Package
Marking
4
L
7
U
A
T
B
8
5
3
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LP5952
Order Information (COL LLP-6)
Output Voltage
(V)
1.2
1.3
1.5
1.8
LP5952 Supplied as 1000 Units,
Tape and Reel, lead free
LP5952LC-1.2
LP5952LC-1.3
LP5952LC-1.5
LP5952LC-1.8
LP5952 Supplied as 4500 Units,
Tape and Reel, lead free
LP5952LCX-1.2
LP5952LCX-1.3
LP5952LCX-1.5
LP5952LCX-1.8
Flow
NOPB
NOPB
NOPB
NOPB
Package
Marking
L28
L43
L25
L29
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4
LP5952
Absolute Maximum Ratings
(Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
V
IN
, V
BATT
pins: Voltage to GND,
V
IN
≤
V
BATT
:
V
BATT
pin to V
IN
pin:
EN pin, Voltage to GND:
Continuous Power Dissipation
(Note 3):
Junction Temperature (T
J-MAX
):
Storage Temperature Range:
Package Peak Reflow Temperature
(Pb-free, 10-20 sec.) (Note 4):
ESD Rating (Note 5):
Human Body Model:
Machine Model:
-0.2V to 6.0V
0.2V
-0.2V to 6.0V
Internally Limited
150°C
-65°C to + 150°C
260°C
2.0kV
200V
Operating Ratings
Input Voltage Range V
IN
Input Voltage Range V
BATT
V
EN
Input Voltage
Recommended Load Current
Junction Temperature (T
J
) Range
Ambient Temperature (T
A
) Range
(Note 6)
0.7V to 4.5V
2.5V to 5.5V
0 to V
BATT
0mA to 350mA
-40°C to + 125°C
-40°C to + 85°C
Thermal Properties
Junction-to-Ambient Thermal
Resistance (θ
JA
)
TLA05 package (Note 7)
LCA06B package (Note 7)
95°C/W
150°C/W
ESD Caution Notice
National Semiconductor recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper
ESD handling techniques can result in damage.
Electrical Characteristics
(Notes 2, 8, 11)
Typical values and limits appearing in standard typeface are for T
A
= 25°C. Limits appearing in
boldface
type apply over the full
operating temperature range: -40°C
≤
T
J
≤
+125°C. Unless otherwise noted, specifications apply to the typical application circuit
with V
IN
= V
OUT(NOM)
+ 1.0V, V
BATT
= V
OUT(NOM)
+ 1.5V or 2.5V, whichever is higher, I
OUT
= 1mA, C
VIN
= 1.0µF, C
OUT
= 2.2µF,
V
EN
= V
BATT
.
Symbol
ΔV
OUT
/ V
OUT
ΔV
OUT
/ ΔV
IN
ΔV
OUT
/ ΔV
BATT
ΔV
OUT
/ ΔmA
Load Regulation Error
Output Current
(short circuit)
Parameter
Output Voltage Tolerance
Condition
V
IN
= V
OUT(NOM)
+ 0.3V
V
IN
= V
OUT(NOM)
+ 0.3V to 4.5V, V
BATT
=
4.5V
V
BATT
= V
OUT(NOM)
+ 1.5V (
≥
2.5V) to 5.5V
I
OUT
= 1mA to 350mA, micro SMD
package
I
OUT
= 1mA to 350mA, LLP-6 package
I
SC
V
OUT
= 0V, V
EN
= V
IN
= V
BATT
= V
OUT
(NOM)
+ 1.5V
I
OUT
= 350mA, V
IN
= V
OUT(NOM)
+ 0.3V,
micro SMD package
V
DO_VBATT
(Note 10)
Output Voltage Dropout V
BATT
(Note 9)
I
OUT
= 350mA, V
IN
= V
OUT(NOM)
+ 0.3V,
LLP-6 package
I
OUT
= 150mA, V
IN
= V
OUT(NOM)
+ 0.3V,
micro SMD package
I
OUT
= 150mA, V
IN
= V
OUT(NOM)
+ 0.3V,
LLP-6 package
I
OUT
= 350mA, V
BATT
= V
OUT(NOM)
+ 1.5V
or 2.5V, micro SMD package
I
OUT
= 350mA, V
BATT
= V
OUT(NOM)
+ 1.5V
or 2.5V, LLP-6 package
10Hz to 100kHz
0.3
0.5
15
43
500
1.07
1.08
0.96
0.97
88
128
100
350
1.5
1.5
1.3
1.3
200
250
Typ
Limit
Min
-1.5
-2.0
Max
1.5
2.0
1.0
2.2
30
60
µV/mA
µV/mA
mA
V
V
V
V
mV
mV
µV
RMS
Units
%
%
mV/V
Line Regulation Error
V
DO_VIN
Output Voltage Dropout V
IN
E
N
Output Noise
5
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