LPC-H1114 development board
Users Manual
All boards produced by Olimex are ROHS compliant
Revision B, June 2012
Copyright(c) 2011, OLIMEX Ltd, All rights reserved
Page 1
INTRODUCTION
LPC-P1114
is development board with LPC1114FBD48 ARM Cortex-M0
based microcontroller for embedded applications from NXP. LPC-P1114 featuring a
high level of integration and low power consumption. This microcontroller sup-
ports various interfaces such as one Fast-mode Plus I
2
C-bus interface, one RS-
485/EIA-485 UART, two SSP interfaces, four general purpose timers, a 10-bit ADC.
On the board are available Debug Interface and extension headers for all microcon-
troller ports.
BOARD FEATURES
•
•
•
•
•
MCU:
LPC1114FBD48/301/302
Cortex-M0, up to 50 Mhz, 32 kB Flash,
8kB SRAM, UART RS-485, two SSP, I
2
C/Fast+, ADC
Debug interface – SWD (Serial Wire Debug)
Extension connectors
FR-4, 1.5 mm, soldermask, component print
Dimensions:38.00x38.00mm (1.50 x 1.50")
ELECTROSTATIC WARNING
The
LPC-H1114
board is shipped in protective anti-static packaging. The board
must not be subject to high electrostatic potentials. General practice for working
with static sensitive devices should be applied when working with this board.
BOARD USE REQUIREMENTS
Cables:
The cable you will need depends on the programmer/debugger you use. If
you use
ARM-JTAG-EW,
you will need USB A-B cable.
Hardware:
Programmer/Debugger
ARM-JTAG-EW,
which works with IAR for
ARM up to version 6.20 or other compatible programming/debugging tool.
ARM-USB-OCD, ARM-USB-OCD-H, ARM-USB-TINY, ARM-USB-TINY-H
-
JTAGs +
ARM-JTAG-SWD
adapter can be used with Rowley Crossworks
.
PROCESSOR FEATURES
LPC-P1114
board use ARM Cortex™-M0 microcontroller
LPC1114FBD48/301/302
from NXP Semiconductors with these features:
–
ARM Cortex-M0 processor, running at frequencies of up to 50 MHz.
–
ARM Cortex-M0 built-in Nested Vectored Interrupt Controller (NVIC).
–
32 kB on-chip flash programming memory.
–
8 kB SRAM.
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–
In-System Programming (ISP) and In-Application Programming (IAP) via
on-chip bootloader software.
–
Serial interfaces:
- UART with fractional baud rate generation, internal FIFO, and RS-
485 support.
- Two SSP controllers with FIFO and multi-protocol capabilities
- I
2
C-bus interface supporting full I
2
C-bus specification and Fast-
mode Plus with a data rate of 1 Mbit/s with multiple address
recognition and monitor mode.
–
Other peripherals:
- 42 General Purpose I/O (GPIO) pins with configurable pull-
up/pull-down resistors. In addition, a configurable open-drain
mode is supported on the LPC1114FBD48/302
- Four general purpose timers/counters with a total of four capture
inputs and 13 match outputs.
- Programmable WatchDog Timer (WDT).
- Programmable windowed WDT on LPC1114FBD48/302 only.
- System tick timer.
–
Serial Wire Debug.
–
High-current output driver (20 mA) on one pin.
–
High-current sink drivers (20 mA) on two I
2
C-bus pins in Fast-mode Plus.
–
Integrated PMU (Power Management Unit) to minimize power consumption
during Sleep, Deep-sleep, and Deep power-down modes.
–
Power profiles residing in boot ROM allowing to optimize performance and
minimize power consumption for any given application through one
simple function call. (on LPC1114FBD48/302 only.)
–
Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
–
Single 3.3 V power supply (2.0 V to 3.6 V).
–
10-bit ADC with input multiplexing among 8 pins.
–
GPIO pins can be used as edge and level sensitive interrupt sources.
–
Clock output function with divider that can reflect the system oscillator clock, IRC
clock, CPU clock, and the Watchdog clock
to 13 of the functional pins.
–
Processor wake-up from Deep-sleep mode via a dedicated start logic using
–
Brownout detect with four separate thresholds for interrupt and one
up
for forced reset.
threshold
–
Power-On Reset (POR).
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–
Crystal oscillator with an operating range of 1 MHz to 25 MHz.
–
12 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally
used as a system clock.
be
–
PLL allows CPU operation up to the maximum CPU rate without the need
for a high-frequency crystal. May be run from the main oscillator, the
internal RC oscillator, or the watchdog oscillator.
BLOCK DIAGRAM
Page 4
MEMORY MAP
Page 5
单片机
