LPC-P1343 development board
user's manual
All boards produced by Olimex are ROHS compliant
Revision C, February 2013
Copyright(c) 2011, OLIMEX Ltd, All rights reserved
INTRODUCTION
LPC-P1343 is a development board with LPC1343 ARM Cortex-M3 based
microcontroller for embedded applications from NXP. LPC-P1343 featuring a high
level of integration and low power consumption. This microcontroller supports
various interfaces such as one Fast-mode Plus I
2
C-bus interface, USB, UART, SSP in-
terfaces, four general purpose timers, a 10-bit ADC. On the board are available
UEXT, Debug Interface, user buttons, USB device and user LEDs. This allows you to
build a diversity of powerful software that can be used in a wide range of applica-
tions.
BOARD FEATURES
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MCU:
LPC1343
Cortex-M3, up to 70 MHz, 32 kB Flash, 8kB SRAM,
UART RS-485, USB, SSP, I
2
C/Fast+, ADC
Power supply circuit
Power-on led
USB connector and functionality
USBC LED
Debug interface – SWD (Serial Wire Debug)
UEXT connector
Eight user LEDs
Two user buttons
Reset button
Prototype area
FR-4, 1.5 mm, red soldermask, white component print
Dimensions:80x50mm (3.15 x 1.97")
ELECTROSTATIC WARNING
The
LPC-P1343
board is shipped in protective anti-static packaging. The board
must not be subject to high electrostatic potentials. General practice for working
with static sensitive devices should be applied when working with this board.
BOARD USE REQUIREMENTS
Cables:
The cable you will need depends on the programmer/debugger you use.
For instance, if you use
https://www.olimex.com/Products/ARM/JTAG/ARM-
JTAG-COOCOX/,
you will need USB A-B cable.
Hardware:
Programmer/debugger or other compatible programming/debugging
tool with SWD interface. The only Olimex programmer that has SWD interface at
the moment is ARM-JTAG-COOCOX –
https://www.olimex.com/Products/ARM/JTAG/ARM-JTAG-COOCOX.
OpenOCD debuggers (ARM-JTAG-TINY, ARM-JTAG-TINY-H, ARM-JTAG-OCD,
ARM-JTAG-OCD-H) can also be adapted to work with SWD interface by getting
https://www.olimex.com/Products/ARM/JTAG/ARM-JTAG-SWD/.
NOTE that
at the current moment only Rowley Crossworks supports this combination.
PROCESSOR FEATURES
LPC-P1343
board use ARM Cortex™-M3 microcontroller
LPC1343FBD48/301
from
NXP Semiconductors with these features:
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ARM Cortex-M3 processor, running at frequencies of up to 72 MHz
ARM Cortex-M3 built-in Nested Vectored Interrupt Controller (NVIC).
32kB on-chip flash programming memory. Enhanced flash memory
accelerator enables high- peed 72 MHz operation with zero wait states
In-System Programming (ISP) and In-Application Programming (IAP) via
on-chip bootloader software.
Serial interfaces:
- USB 2.0 full-speed device controller with on-chip PHY for device
- UART with fractional baud rate generation, modem, internal FIFO
and RS-485/EIA-485 support.
- SSP controller with FIFO and multi-protocol capabilities.
- I
2
C-bus interface supporting full I
2
C-bus specification and Fast-
mode Plus with a data rate of 1 Mbit/s with multiple address
recognition and monitor mode.
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Other peripherals:
- 42 General Purpose I/O (GPIO) pins with configurable pull-
up/down resistors and a new, configurable open-drain operating
mode.
- Four general purpose timers/counters, with a total of four capture
inputs and 13 match outputs.
- Programmable WatchDog Timer (WDT).
- System tick timer.
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Serial Wire Debug and Serial Wire Trace Port.
High-current output driver (20 mA) on one pin.
High-current sink drivers (20 mA) on two I2C-bus pins in Fast-mode Plus.
Integrated PMU (Power Management Unit) to minimize power
consumption during Sleep, Deep-sleep, and Deep power-down modes.
Three reduced power modes: Sleep, Deep-sleep, and Deep power-down.
Single 3.3 V power supply (2.0 V to 3.6 V).
10-bit ADC with input multiplexing among 8 pins.
40 GPIO pins can be used as edge and level sensitive interrupt sources.
Clock output function with divider that can reflect the main oscillator clock,
IRC clock, CPU clock, Watchdog clock, and the USB clock.
Processor wake-up from Deep-sleep mode via GPIO interrupts.
Brownout detect with four separate thresholds for interrupt and one
threshold for forced reset.
Power-On Reset (POR).
Crystal oscillator with an operating range of 1 MHz to 25 MHz.
12 MHz internal RC oscillator trimmed to 1 % accuracy that can optionally
be used as a system clock.
PLL allows CPU operation up to the maximum CPU rate without the need
for a high-frequency crystal. May be run from the main oscillator, the
internal RC oscillator, or the Watchdog oscillator.
Code Read Protection (CRP) with different security levels.
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BLOCK DIAGRAM
